195 lines
4.1 KiB
Plaintext
195 lines
4.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source
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*
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* Copyright (c) 2016 Samsung Electronics Co., Ltd.
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* Chanwoo Choi <cw00.choi@samsung.com>
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*/
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&soc {
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bus_g2d_400: bus0 {
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compatible = "samsung,exynos-bus";
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clocks = <&cmu_top CLK_ACLK_G2D_400>;
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clock-names = "bus";
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operating-points-v2 = <&bus_g2d_400_opp_table>;
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status = "disabled";
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};
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bus_g2d_266: bus1 {
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compatible = "samsung,exynos-bus";
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clocks = <&cmu_top CLK_ACLK_G2D_266>;
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clock-names = "bus";
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operating-points-v2 = <&bus_g2d_266_opp_table>;
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status = "disabled";
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};
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bus_gscl: bus2 {
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compatible = "samsung,exynos-bus";
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clocks = <&cmu_top CLK_ACLK_GSCL_333>;
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clock-names = "bus";
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operating-points-v2 = <&bus_gscl_opp_table>;
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status = "disabled";
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};
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bus_hevc: bus3 {
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compatible = "samsung,exynos-bus";
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clocks = <&cmu_top CLK_ACLK_HEVC_400>;
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clock-names = "bus";
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operating-points-v2 = <&bus_hevc_opp_table>;
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status = "disabled";
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};
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bus_jpeg: bus4 {
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compatible = "samsung,exynos-bus";
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clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>;
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clock-names = "bus";
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operating-points-v2 = <&bus_g2d_400_opp_table>;
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status = "disabled";
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};
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bus_mfc: bus5 {
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compatible = "samsung,exynos-bus";
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clocks = <&cmu_top CLK_ACLK_MFC_400>;
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clock-names = "bus";
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operating-points-v2 = <&bus_g2d_400_opp_table>;
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status = "disabled";
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};
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bus_mscl: bus6 {
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compatible = "samsung,exynos-bus";
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clocks = <&cmu_top CLK_ACLK_MSCL_400>;
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clock-names = "bus";
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operating-points-v2 = <&bus_g2d_400_opp_table>;
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status = "disabled";
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};
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bus_noc0: bus7 {
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compatible = "samsung,exynos-bus";
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clocks = <&cmu_top CLK_ACLK_BUS0_400>;
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clock-names = "bus";
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operating-points-v2 = <&bus_hevc_opp_table>;
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status = "disabled";
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};
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bus_noc1: bus8 {
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compatible = "samsung,exynos-bus";
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clocks = <&cmu_top CLK_ACLK_BUS1_400>;
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clock-names = "bus";
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operating-points-v2 = <&bus_hevc_opp_table>;
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status = "disabled";
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};
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bus_noc2: bus9 {
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compatible = "samsung,exynos-bus";
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clocks = <&cmu_mif CLK_ACLK_BUS2_400>;
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clock-names = "bus";
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operating-points-v2 = <&bus_noc2_opp_table>;
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status = "disabled";
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};
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bus_g2d_400_opp_table: opp-table-2 {
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compatible = "operating-points-v2";
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opp-shared;
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opp-400000000 {
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opp-hz = /bits/ 64 <400000000>;
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opp-microvolt = <1075000>;
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};
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opp-267000000 {
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opp-hz = /bits/ 64 <267000000>;
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opp-microvolt = <1000000>;
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};
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opp-200000000 {
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opp-hz = /bits/ 64 <200000000>;
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opp-microvolt = <975000>;
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};
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opp-160000000 {
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opp-hz = /bits/ 64 <160000000>;
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opp-microvolt = <962500>;
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};
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opp-134000000 {
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opp-hz = /bits/ 64 <134000000>;
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opp-microvolt = <950000>;
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};
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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opp-microvolt = <937500>;
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};
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};
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bus_g2d_266_opp_table: opp-table-3 {
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compatible = "operating-points-v2";
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opp-267000000 {
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opp-hz = /bits/ 64 <267000000>;
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};
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opp-200000000 {
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opp-hz = /bits/ 64 <200000000>;
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};
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opp-160000000 {
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opp-hz = /bits/ 64 <160000000>;
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};
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opp-134000000 {
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opp-hz = /bits/ 64 <134000000>;
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};
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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};
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};
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bus_gscl_opp_table: opp-table-4 {
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compatible = "operating-points-v2";
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opp-333000000 {
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opp-hz = /bits/ 64 <333000000>;
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};
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opp-222000000 {
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opp-hz = /bits/ 64 <222000000>;
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};
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opp-166500000 {
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opp-hz = /bits/ 64 <166500000>;
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};
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};
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bus_hevc_opp_table: opp-table-5 {
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compatible = "operating-points-v2";
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opp-shared;
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opp-400000000 {
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opp-hz = /bits/ 64 <400000000>;
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};
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opp-267000000 {
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opp-hz = /bits/ 64 <267000000>;
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};
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opp-200000000 {
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opp-hz = /bits/ 64 <200000000>;
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};
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opp-160000000 {
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opp-hz = /bits/ 64 <160000000>;
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};
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opp-134000000 {
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opp-hz = /bits/ 64 <134000000>;
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};
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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};
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};
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bus_noc2_opp_table: opp-table-6 {
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compatible = "operating-points-v2";
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opp-400000000 {
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opp-hz = /bits/ 64 <400000000>;
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};
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opp-200000000 {
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opp-hz = /bits/ 64 <200000000>;
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};
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opp-134000000 {
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opp-hz = /bits/ 64 <134000000>;
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};
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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};
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};
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};
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