543 lines
14 KiB
Plaintext
543 lines
14 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Apple T8103 "M1" SoC
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*
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* Other names: H13G, "Tonga"
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*
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* Copyright The Asahi Linux Contributors
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/apple-aic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/pinctrl/apple.h>
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/ {
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compatible = "apple,t8103", "apple,arm-platform";
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#address-cells = <2>;
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#size-cells = <2>;
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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compatible = "apple,icestorm";
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device_type = "cpu";
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reg = <0x0 0x0>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu1: cpu@1 {
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compatible = "apple,icestorm";
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device_type = "cpu";
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reg = <0x0 0x1>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu2: cpu@2 {
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compatible = "apple,icestorm";
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device_type = "cpu";
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reg = <0x0 0x2>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu3: cpu@3 {
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compatible = "apple,icestorm";
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device_type = "cpu";
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reg = <0x0 0x3>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu4: cpu@10100 {
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compatible = "apple,firestorm";
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device_type = "cpu";
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reg = <0x0 0x10100>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu5: cpu@10101 {
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compatible = "apple,firestorm";
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device_type = "cpu";
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reg = <0x0 0x10101>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu6: cpu@10102 {
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compatible = "apple,firestorm";
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device_type = "cpu";
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reg = <0x0 0x10102>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu7: cpu@10103 {
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compatible = "apple,firestorm";
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device_type = "cpu";
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reg = <0x0 0x10103>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupt-parent = <&aic>;
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interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
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interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
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<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,
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<AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
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<AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
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};
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pmu-e {
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compatible = "apple,icestorm-pmu";
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interrupt-parent = <&aic>;
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interrupts = <AIC_FIQ AIC_CPU_PMU_E IRQ_TYPE_LEVEL_HIGH>;
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};
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pmu-p {
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compatible = "apple,firestorm-pmu";
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interrupt-parent = <&aic>;
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interrupts = <AIC_FIQ AIC_CPU_PMU_P IRQ_TYPE_LEVEL_HIGH>;
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};
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clkref: clock-ref {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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clock-output-names = "clkref";
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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nonposted-mmio;
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i2c0: i2c@235010000 {
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compatible = "apple,t8103-i2c", "apple,i2c";
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reg = <0x2 0x35010000 0x0 0x4000>;
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clocks = <&clkref>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&i2c0_pins>;
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pinctrl-names = "default";
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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power-domains = <&ps_i2c0>;
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};
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i2c1: i2c@235014000 {
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compatible = "apple,t8103-i2c", "apple,i2c";
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reg = <0x2 0x35014000 0x0 0x4000>;
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clocks = <&clkref>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 628 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&i2c1_pins>;
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pinctrl-names = "default";
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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power-domains = <&ps_i2c1>;
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};
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i2c2: i2c@235018000 {
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compatible = "apple,t8103-i2c", "apple,i2c";
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reg = <0x2 0x35018000 0x0 0x4000>;
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clocks = <&clkref>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 629 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&i2c2_pins>;
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pinctrl-names = "default";
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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status = "disabled"; /* not used in all devices */
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power-domains = <&ps_i2c2>;
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};
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i2c3: i2c@23501c000 {
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compatible = "apple,t8103-i2c", "apple,i2c";
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reg = <0x2 0x3501c000 0x0 0x4000>;
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clocks = <&clkref>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 630 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&i2c3_pins>;
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pinctrl-names = "default";
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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power-domains = <&ps_i2c3>;
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};
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i2c4: i2c@235020000 {
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compatible = "apple,t8103-i2c", "apple,i2c";
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reg = <0x2 0x35020000 0x0 0x4000>;
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clocks = <&clkref>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 631 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&i2c4_pins>;
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pinctrl-names = "default";
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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power-domains = <&ps_i2c4>;
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status = "disabled"; /* only used in J293 */
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};
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serial0: serial@235200000 {
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compatible = "apple,s5l-uart";
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reg = <0x2 0x35200000 0x0 0x1000>;
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reg-io-width = <4>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 605 IRQ_TYPE_LEVEL_HIGH>;
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/*
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* TODO: figure out the clocking properly, there may
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* be a third selectable clock.
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*/
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clocks = <&clkref>, <&clkref>;
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clock-names = "uart", "clk_uart_baud0";
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power-domains = <&ps_uart0>;
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status = "disabled";
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};
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serial2: serial@235208000 {
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compatible = "apple,s5l-uart";
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reg = <0x2 0x35208000 0x0 0x1000>;
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reg-io-width = <4>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 607 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkref>, <&clkref>;
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clock-names = "uart", "clk_uart_baud0";
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power-domains = <&ps_uart2>;
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status = "disabled";
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};
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aic: interrupt-controller@23b100000 {
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compatible = "apple,t8103-aic", "apple,aic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x2 0x3b100000 0x0 0x8000>;
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power-domains = <&ps_aic>;
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affinities {
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e-core-pmu-affinity {
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apple,fiq-index = <AIC_CPU_PMU_E>;
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cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
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};
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p-core-pmu-affinity {
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apple,fiq-index = <AIC_CPU_PMU_P>;
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cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
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};
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};
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};
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pmgr: power-management@23b700000 {
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compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x2 0x3b700000 0 0x14000>;
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};
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pinctrl_ap: pinctrl@23c100000 {
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compatible = "apple,t8103-pinctrl", "apple,pinctrl";
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reg = <0x2 0x3c100000 0x0 0x100000>;
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power-domains = <&ps_gpio>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl_ap 0 0 212>;
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apple,npins = <212>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 190 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 191 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 192 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 193 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 194 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH>;
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i2c0_pins: i2c0-pins {
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pinmux = <APPLE_PINMUX(192, 1)>,
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<APPLE_PINMUX(188, 1)>;
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};
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i2c1_pins: i2c1-pins {
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pinmux = <APPLE_PINMUX(201, 1)>,
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<APPLE_PINMUX(199, 1)>;
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};
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i2c2_pins: i2c2-pins {
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pinmux = <APPLE_PINMUX(163, 1)>,
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<APPLE_PINMUX(162, 1)>;
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};
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i2c3_pins: i2c3-pins {
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pinmux = <APPLE_PINMUX(73, 1)>,
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<APPLE_PINMUX(72, 1)>;
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};
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i2c4_pins: i2c4-pins {
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pinmux = <APPLE_PINMUX(135, 1)>,
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<APPLE_PINMUX(134, 1)>;
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};
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pcie_pins: pcie-pins {
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pinmux = <APPLE_PINMUX(150, 1)>,
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<APPLE_PINMUX(151, 1)>,
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<APPLE_PINMUX(32, 1)>;
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};
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};
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pinctrl_nub: pinctrl@23d1f0000 {
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compatible = "apple,t8103-pinctrl", "apple,pinctrl";
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reg = <0x2 0x3d1f0000 0x0 0x4000>;
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power-domains = <&ps_nub_gpio>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl_nub 0 0 23>;
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apple,npins = <23>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 330 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 331 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 332 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 333 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 334 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 335 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 336 IRQ_TYPE_LEVEL_HIGH>;
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};
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pmgr_mini: power-management@23d280000 {
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compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x2 0x3d280000 0 0x4000>;
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};
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wdt: watchdog@23d2b0000 {
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compatible = "apple,t8103-wdt", "apple,wdt";
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reg = <0x2 0x3d2b0000 0x0 0x4000>;
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clocks = <&clkref>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 338 IRQ_TYPE_LEVEL_HIGH>;
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};
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pinctrl_smc: pinctrl@23e820000 {
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compatible = "apple,t8103-pinctrl", "apple,pinctrl";
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reg = <0x2 0x3e820000 0x0 0x4000>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl_smc 0 0 16>;
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apple,npins = <16>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 391 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 392 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 393 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 394 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 395 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 396 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>;
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};
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pinctrl_aop: pinctrl@24a820000 {
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compatible = "apple,t8103-pinctrl", "apple,pinctrl";
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reg = <0x2 0x4a820000 0x0 0x4000>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl_aop 0 0 42>;
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apple,npins = <42>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 270 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 271 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 272 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 273 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>;
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};
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ans_mbox: mbox@277408000 {
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compatible = "apple,t8103-asc-mailbox", "apple,asc-mailbox-v4";
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reg = <0x2 0x77408000 0x0 0x4000>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 583 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 584 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 585 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 586 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "send-empty", "send-not-empty",
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"recv-empty", "recv-not-empty";
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#mbox-cells = <0>;
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power-domains = <&ps_ans2>;
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};
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sart: iommu@27bc50000 {
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compatible = "apple,t8103-sart";
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reg = <0x2 0x7bc50000 0x0 0x10000>;
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power-domains = <&ps_ans2>;
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};
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nvme@27bcc0000 {
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compatible = "apple,t8103-nvme-ans2", "apple,nvme-ans2";
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reg = <0x2 0x7bcc0000 0x0 0x40000>,
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<0x2 0x77400000 0x0 0x4000>;
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reg-names = "nvme", "ans";
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 590 IRQ_TYPE_LEVEL_HIGH>;
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mboxes = <&ans_mbox>;
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apple,sart = <&sart>;
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power-domains = <&ps_ans2>, <&ps_apcie_st>;
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power-domain-names = "ans", "apcie0";
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resets = <&ps_ans2>;
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};
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pcie0_dart_0: iommu@681008000 {
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compatible = "apple,t8103-dart";
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reg = <0x6 0x81008000 0x0 0x4000>;
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#iommu-cells = <1>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&ps_apcie_gp>;
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};
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pcie0_dart_1: iommu@682008000 {
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compatible = "apple,t8103-dart";
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reg = <0x6 0x82008000 0x0 0x4000>;
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#iommu-cells = <1>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&ps_apcie_gp>;
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status = "disabled";
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};
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pcie0_dart_2: iommu@683008000 {
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compatible = "apple,t8103-dart";
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reg = <0x6 0x83008000 0x0 0x4000>;
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#iommu-cells = <1>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&ps_apcie_gp>;
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status = "disabled";
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};
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pcie0: pcie@690000000 {
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compatible = "apple,t8103-pcie", "apple,pcie";
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device_type = "pci";
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reg = <0x6 0x90000000 0x0 0x1000000>,
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<0x6 0x80000000 0x0 0x100000>,
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<0x6 0x81000000 0x0 0x4000>,
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<0x6 0x82000000 0x0 0x4000>,
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<0x6 0x83000000 0x0 0x4000>;
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reg-names = "config", "rc", "port0", "port1", "port2";
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 695 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 698 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 701 IRQ_TYPE_LEVEL_HIGH>;
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msi-controller;
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msi-parent = <&pcie0>;
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msi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;
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iommu-map = <0x100 &pcie0_dart_0 1 1>,
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<0x200 &pcie0_dart_1 1 1>,
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<0x300 &pcie0_dart_2 1 1>;
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iommu-map-mask = <0xff00>;
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bus-range = <0 3>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,
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<0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;
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power-domains = <&ps_apcie_gp>;
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pinctrl-0 = <&pcie_pins>;
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pinctrl-names = "default";
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port00: pci@0,0 {
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device_type = "pci";
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reg = <0x0 0x0 0x0 0x0 0x0>;
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reset-gpios = <&pinctrl_ap 152 GPIO_ACTIVE_LOW>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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interrupt-controller;
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#interrupt-cells = <1>;
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|
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
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<0 0 0 2 &port00 0 0 0 1>,
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<0 0 0 3 &port00 0 0 0 2>,
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<0 0 0 4 &port00 0 0 0 3>;
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};
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|
|
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port01: pci@1,0 {
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device_type = "pci";
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reg = <0x800 0x0 0x0 0x0 0x0>;
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reset-gpios = <&pinctrl_ap 153 GPIO_ACTIVE_LOW>;
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|
|
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#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
ranges;
|
|
|
|
interrupt-controller;
|
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#interrupt-cells = <1>;
|
|
|
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interrupt-map-mask = <0 0 0 7>;
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|
interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
|
|
<0 0 0 2 &port01 0 0 0 1>,
|
|
<0 0 0 3 &port01 0 0 0 2>,
|
|
<0 0 0 4 &port01 0 0 0 3>;
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status = "disabled";
|
|
};
|
|
|
|
port02: pci@2,0 {
|
|
device_type = "pci";
|
|
reg = <0x1000 0x0 0x0 0x0 0x0>;
|
|
reset-gpios = <&pinctrl_ap 33 GPIO_ACTIVE_LOW>;
|
|
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
ranges;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
|
|
interrupt-map-mask = <0 0 0 7>;
|
|
interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
|
|
<0 0 0 2 &port02 0 0 0 1>,
|
|
<0 0 0 3 &port02 0 0 0 2>,
|
|
<0 0 0 4 &port02 0 0 0 3>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
};
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|
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#include "t8103-pmgr.dtsi"
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