72 lines
2.2 KiB
Plaintext
72 lines
2.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
|
|
/*
|
|
* Copyright 2018-2022 TQ-Systems GmbH
|
|
* Author: Markus Niebel <Markus.Niebel@tq-group.com>
|
|
*/
|
|
|
|
#include "imx6ul.dtsi"
|
|
#include "imx6ul-tqma6ul-common.dtsi"
|
|
#include "imx6ul-tqma6ulx-common.dtsi"
|
|
|
|
/ {
|
|
model = "TQ-Systems TQMa6UL2 SoM";
|
|
compatible = "tq,imx6ul-tqma6ul2", "fsl,imx6ul";
|
|
};
|
|
|
|
&usdhc2 {
|
|
fsl,tuning-step = <6>;
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl_usdhc2: usdhc2grp {
|
|
fsl,pins = <
|
|
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x00017051
|
|
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x00017051
|
|
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x00017051
|
|
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x00017051
|
|
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x00017051
|
|
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x00017051
|
|
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x00017051
|
|
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x00017051
|
|
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x00017051
|
|
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x00017051
|
|
/* rst */
|
|
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
|
fsl,pins = <
|
|
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x000170e1
|
|
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x000170f1
|
|
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x000170f1
|
|
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x000170f1
|
|
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x000170f1
|
|
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x000170f1
|
|
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x000170f1
|
|
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x000170f1
|
|
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x000170f1
|
|
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x000170f1
|
|
/* rst */
|
|
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
|
fsl,pins = <
|
|
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x000170f1
|
|
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x000170e1
|
|
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x000170e1
|
|
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x000170e1
|
|
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x000170e1
|
|
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x000170e1
|
|
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x000170e1
|
|
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x000170e1
|
|
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x000170e1
|
|
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x000170e1
|
|
/* rst */
|
|
MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051
|
|
>;
|
|
};
|
|
};
|