446 lines
18 KiB
ReStructuredText
446 lines
18 KiB
ReStructuredText
=======================================
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Oracle Data Analytics Accelerator (DAX)
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=======================================
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DAX is a coprocessor which resides on the SPARC M7 (DAX1) and M8
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(DAX2) processor chips, and has direct access to the CPU's L3 caches
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as well as physical memory. It can perform several operations on data
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streams with various input and output formats. A driver provides a
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transport mechanism and has limited knowledge of the various opcodes
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and data formats. A user space library provides high level services
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and translates these into low level commands which are then passed
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into the driver and subsequently the Hypervisor and the coprocessor.
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The library is the recommended way for applications to use the
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coprocessor, and the driver interface is not intended for general use.
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This document describes the general flow of the driver, its
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structures, and its programmatic interface. It also provides example
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code sufficient to write user or kernel applications that use DAX
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functionality.
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The user library is open source and available at:
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https://oss.oracle.com/git/gitweb.cgi?p=libdax.git
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The Hypervisor interface to the coprocessor is described in detail in
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the accompanying document, dax-hv-api.txt, which is a plain text
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excerpt of the (Oracle internal) "UltraSPARC Virtual Machine
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Specification" version 3.0.20+15, dated 2017-09-25.
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High Level Overview
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===================
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A coprocessor request is described by a Command Control Block
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(CCB). The CCB contains an opcode and various parameters. The opcode
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specifies what operation is to be done, and the parameters specify
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options, flags, sizes, and addresses. The CCB (or an array of CCBs)
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is passed to the Hypervisor, which handles queueing and scheduling of
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requests to the available coprocessor execution units. A status code
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returned indicates if the request was submitted successfully or if
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there was an error. One of the addresses given in each CCB is a
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pointer to a "completion area", which is a 128 byte memory block that
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is written by the coprocessor to provide execution status. No
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interrupt is generated upon completion; the completion area must be
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polled by software to find out when a transaction has finished, but
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the M7 and later processors provide a mechanism to pause the virtual
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processor until the completion status has been updated by the
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coprocessor. This is done using the monitored load and mwait
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instructions, which are described in more detail later. The DAX
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coprocessor was designed so that after a request is submitted, the
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kernel is no longer involved in the processing of it. The polling is
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done at the user level, which results in almost zero latency between
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completion of a request and resumption of execution of the requesting
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thread.
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Addressing Memory
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=================
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The kernel does not have access to physical memory in the Sun4v
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architecture, as there is an additional level of memory virtualization
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present. This intermediate level is called "real" memory, and the
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kernel treats this as if it were physical. The Hypervisor handles the
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translations between real memory and physical so that each logical
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domain (LDOM) can have a partition of physical memory that is isolated
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from that of other LDOMs. When the kernel sets up a virtual mapping,
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it specifies a virtual address and the real address to which it should
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be mapped.
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The DAX coprocessor can only operate on physical memory, so before a
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request can be fed to the coprocessor, all the addresses in a CCB must
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be converted into physical addresses. The kernel cannot do this since
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it has no visibility into physical addresses. So a CCB may contain
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either the virtual or real addresses of the buffers or a combination
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of them. An "address type" field is available for each address that
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may be given in the CCB. In all cases, the Hypervisor will translate
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all the addresses to physical before dispatching to hardware. Address
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translations are performed using the context of the process initiating
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the request.
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The Driver API
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==============
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An application makes requests to the driver via the write() system
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call, and gets results (if any) via read(). The completion areas are
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made accessible via mmap(), and are read-only for the application.
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The request may either be an immediate command or an array of CCBs to
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be submitted to the hardware.
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Each open instance of the device is exclusive to the thread that
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opened it, and must be used by that thread for all subsequent
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operations. The driver open function creates a new context for the
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thread and initializes it for use. This context contains pointers and
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values used internally by the driver to keep track of submitted
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requests. The completion area buffer is also allocated, and this is
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large enough to contain the completion areas for many concurrent
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requests. When the device is closed, any outstanding transactions are
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flushed and the context is cleaned up.
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On a DAX1 system (M7), the device will be called "oradax1", while on a
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DAX2 system (M8) it will be "oradax2". If an application requires one
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or the other, it should simply attempt to open the appropriate
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device. Only one of the devices will exist on any given system, so the
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name can be used to determine what the platform supports.
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The immediate commands are CCB_DEQUEUE, CCB_KILL, and CCB_INFO. For
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all of these, success is indicated by a return value from write()
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equal to the number of bytes given in the call. Otherwise -1 is
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returned and errno is set.
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CCB_DEQUEUE
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-----------
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Tells the driver to clean up resources associated with past
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requests. Since no interrupt is generated upon the completion of a
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request, the driver must be told when it may reclaim resources. No
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further status information is returned, so the user should not
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subsequently call read().
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CCB_KILL
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--------
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Kills a CCB during execution. The CCB is guaranteed to not continue
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executing once this call returns successfully. On success, read() must
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be called to retrieve the result of the action.
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CCB_INFO
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--------
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Retrieves information about a currently executing CCB. Note that some
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Hypervisors might return 'notfound' when the CCB is in 'inprogress'
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state. To ensure a CCB in the 'notfound' state will never be executed,
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CCB_KILL must be invoked on that CCB. Upon success, read() must be
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called to retrieve the details of the action.
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Submission of an array of CCBs for execution
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---------------------------------------------
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A write() whose length is a multiple of the CCB size is treated as a
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submit operation. The file offset is treated as the index of the
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completion area to use, and may be set via lseek() or using the
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pwrite() system call. If -1 is returned then errno is set to indicate
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the error. Otherwise, the return value is the length of the array that
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was actually accepted by the coprocessor. If the accepted length is
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equal to the requested length, then the submission was completely
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successful and there is no further status needed; hence, the user
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should not subsequently call read(). Partial acceptance of the CCB
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array is indicated by a return value less than the requested length,
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and read() must be called to retrieve further status information. The
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status will reflect the error caused by the first CCB that was not
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accepted, and status_data will provide additional data in some cases.
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MMAP
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----
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The mmap() function provides access to the completion area allocated
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in the driver. Note that the completion area is not writeable by the
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user process, and the mmap call must not specify PROT_WRITE.
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Completion of a Request
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=======================
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The first byte in each completion area is the command status which is
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updated by the coprocessor hardware. Software may take advantage of
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new M7/M8 processor capabilities to efficiently poll this status byte.
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First, a "monitored load" is achieved via a Load from Alternate Space
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(ldxa, lduba, etc.) with ASI 0x84 (ASI_MONITOR_PRIMARY). Second, a
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"monitored wait" is achieved via the mwait instruction (a write to
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%asr28). This instruction is like pause in that it suspends execution
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of the virtual processor for the given number of nanoseconds, but in
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addition will terminate early when one of several events occur. If the
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block of data containing the monitored location is modified, then the
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mwait terminates. This causes software to resume execution immediately
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(without a context switch or kernel to user transition) after a
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transaction completes. Thus the latency between transaction completion
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and resumption of execution may be just a few nanoseconds.
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Application Life Cycle of a DAX Submission
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==========================================
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- open dax device
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- call mmap() to get the completion area address
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- allocate a CCB and fill in the opcode, flags, parameters, addresses, etc.
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- submit CCB via write() or pwrite()
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- go into a loop executing monitored load + monitored wait and
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terminate when the command status indicates the request is complete
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(CCB_KILL or CCB_INFO may be used any time as necessary)
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- perform a CCB_DEQUEUE
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- call munmap() for completion area
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- close the dax device
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Memory Constraints
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==================
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The DAX hardware operates only on physical addresses. Therefore, it is
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not aware of virtual memory mappings and the discontiguities that may
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exist in the physical memory that a virtual buffer maps to. There is
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no I/O TLB or any scatter/gather mechanism. All buffers, whether input
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or output, must reside in a physically contiguous region of memory.
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The Hypervisor translates all addresses within a CCB to physical
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before handing off the CCB to DAX. The Hypervisor determines the
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virtual page size for each virtual address given, and uses this to
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program a size limit for each address. This prevents the coprocessor
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from reading or writing beyond the bound of the virtual page, even
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though it is accessing physical memory directly. A simpler way of
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saying this is that a DAX operation will never "cross" a virtual page
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boundary. If an 8k virtual page is used, then the data is strictly
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limited to 8k. If a user's buffer is larger than 8k, then a larger
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page size must be used, or the transaction size will be truncated to
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8k.
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Huge pages. A user may allocate huge pages using standard interfaces.
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Memory buffers residing on huge pages may be used to achieve much
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larger DAX transaction sizes, but the rules must still be followed,
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and no transaction will cross a page boundary, even a huge page. A
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major caveat is that Linux on Sparc presents 8Mb as one of the huge
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page sizes. Sparc does not actually provide a 8Mb hardware page size,
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and this size is synthesized by pasting together two 4Mb pages. The
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reasons for this are historical, and it creates an issue because only
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half of this 8Mb page can actually be used for any given buffer in a
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DAX request, and it must be either the first half or the second half;
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it cannot be a 4Mb chunk in the middle, since that crosses a
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(hardware) page boundary. Note that this entire issue may be hidden by
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higher level libraries.
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CCB Structure
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-------------
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A CCB is an array of 8 64-bit words. Several of these words provide
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command opcodes, parameters, flags, etc., and the rest are addresses
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for the completion area, output buffer, and various inputs::
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struct ccb {
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u64 control;
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u64 completion;
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u64 input0;
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u64 access;
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u64 input1;
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u64 op_data;
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u64 output;
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u64 table;
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};
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See libdax/common/sys/dax1/dax1_ccb.h for a detailed description of
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each of these fields, and see dax-hv-api.txt for a complete description
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of the Hypervisor API available to the guest OS (ie, Linux kernel).
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The first word (control) is examined by the driver for the following:
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- CCB version, which must be consistent with hardware version
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- Opcode, which must be one of the documented allowable commands
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- Address types, which must be set to "virtual" for all the addresses
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given by the user, thereby ensuring that the application can
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only access memory that it owns
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Example Code
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============
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The DAX is accessible to both user and kernel code. The kernel code
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can make hypercalls directly while the user code must use wrappers
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provided by the driver. The setup of the CCB is nearly identical for
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both; the only difference is in preparation of the completion area. An
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example of user code is given now, with kernel code afterwards.
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In order to program using the driver API, the file
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arch/sparc/include/uapi/asm/oradax.h must be included.
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First, the proper device must be opened. For M7 it will be
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/dev/oradax1 and for M8 it will be /dev/oradax2. The simplest
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procedure is to attempt to open both, as only one will succeed::
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fd = open("/dev/oradax1", O_RDWR);
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if (fd < 0)
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fd = open("/dev/oradax2", O_RDWR);
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if (fd < 0)
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/* No DAX found */
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Next, the completion area must be mapped::
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completion_area = mmap(NULL, DAX_MMAP_LEN, PROT_READ, MAP_SHARED, fd, 0);
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All input and output buffers must be fully contained in one hardware
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page, since as explained above, the DAX is strictly constrained by
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virtual page boundaries. In addition, the output buffer must be
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64-byte aligned and its size must be a multiple of 64 bytes because
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the coprocessor writes in units of cache lines.
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This example demonstrates the DAX Scan command, which takes as input a
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vector and a match value, and produces a bitmap as the output. For
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each input element that matches the value, the corresponding bit is
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set in the output.
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In this example, the input vector consists of a series of single bits,
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and the match value is 0. So each 0 bit in the input will produce a 1
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in the output, and vice versa, which produces an output bitmap which
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is the input bitmap inverted.
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For details of all the parameters and bits used in this CCB, please
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refer to section 36.2.1.3 of the DAX Hypervisor API document, which
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describes the Scan command in detail::
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ccb->control = /* Table 36.1, CCB Header Format */
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(2L << 48) /* command = Scan Value */
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| (3L << 40) /* output address type = primary virtual */
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| (3L << 34) /* primary input address type = primary virtual */
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/* Section 36.2.1, Query CCB Command Formats */
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| (1 << 28) /* 36.2.1.1.1 primary input format = fixed width bit packed */
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| (0 << 23) /* 36.2.1.1.2 primary input element size = 0 (1 bit) */
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| (8 << 10) /* 36.2.1.1.6 output format = bit vector */
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| (0 << 5) /* 36.2.1.3 First scan criteria size = 0 (1 byte) */
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| (31 << 0); /* 36.2.1.3 Disable second scan criteria */
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ccb->completion = 0; /* Completion area address, to be filled in by driver */
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ccb->input0 = (unsigned long) input; /* primary input address */
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ccb->access = /* Section 36.2.1.2, Data Access Control */
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(2 << 24) /* Primary input length format = bits */
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| (nbits - 1); /* number of bits in primary input stream, minus 1 */
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ccb->input1 = 0; /* secondary input address, unused */
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ccb->op_data = 0; /* scan criteria (value to be matched) */
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ccb->output = (unsigned long) output; /* output address */
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ccb->table = 0; /* table address, unused */
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The CCB submission is a write() or pwrite() system call to the
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driver. If the call fails, then a read() must be used to retrieve the
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status::
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if (pwrite(fd, ccb, 64, 0) != 64) {
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struct ccb_exec_result status;
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read(fd, &status, sizeof(status));
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/* bail out */
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}
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After a successful submission of the CCB, the completion area may be
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polled to determine when the DAX is finished. Detailed information on
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the contents of the completion area can be found in section 36.2.2 of
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the DAX HV API document::
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while (1) {
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/* Monitored Load */
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__asm__ __volatile__("lduba [%1] 0x84, %0\n"
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: "=r" (status)
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: "r" (completion_area));
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if (status) /* 0 indicates command in progress */
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break;
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/* MWAIT */
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__asm__ __volatile__("wr %%g0, 1000, %%asr28\n" ::); /* 1000 ns */
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}
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A completion area status of 1 indicates successful completion of the
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CCB and validity of the output bitmap, which may be used immediately.
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All other non-zero values indicate error conditions which are
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described in section 36.2.2::
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if (completion_area[0] != 1) { /* section 36.2.2, 1 = command ran and succeeded */
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/* completion_area[0] contains the completion status */
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/* completion_area[1] contains an error code, see 36.2.2 */
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}
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After the completion area has been processed, the driver must be
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notified that it can release any resources associated with the
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request. This is done via the dequeue operation::
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struct dax_command cmd;
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cmd.command = CCB_DEQUEUE;
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if (write(fd, &cmd, sizeof(cmd)) != sizeof(cmd)) {
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/* bail out */
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}
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Finally, normal program cleanup should be done, i.e., unmapping
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completion area, closing the dax device, freeing memory etc.
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Kernel example
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--------------
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The only difference in using the DAX in kernel code is the treatment
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of the completion area. Unlike user applications which mmap the
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completion area allocated by the driver, kernel code must allocate its
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own memory to use for the completion area, and this address and its
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type must be given in the CCB::
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ccb->control |= /* Table 36.1, CCB Header Format */
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(3L << 32); /* completion area address type = primary virtual */
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ccb->completion = (unsigned long) completion_area; /* Completion area address */
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The dax submit hypercall is made directly. The flags used in the
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ccb_submit call are documented in the DAX HV API in section 36.3.1/
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::
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#include <asm/hypervisor.h>
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hv_rv = sun4v_ccb_submit((unsigned long)ccb, 64,
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HV_CCB_QUERY_CMD |
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HV_CCB_ARG0_PRIVILEGED | HV_CCB_ARG0_TYPE_PRIMARY |
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HV_CCB_VA_PRIVILEGED,
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0, &bytes_accepted, &status_data);
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if (hv_rv != HV_EOK) {
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/* hv_rv is an error code, status_data contains */
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/* potential additional status, see 36.3.1.1 */
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}
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After the submission, the completion area polling code is identical to
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that in user land::
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while (1) {
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/* Monitored Load */
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__asm__ __volatile__("lduba [%1] 0x84, %0\n"
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: "=r" (status)
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: "r" (completion_area));
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if (status) /* 0 indicates command in progress */
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break;
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/* MWAIT */
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__asm__ __volatile__("wr %%g0, 1000, %%asr28\n" ::); /* 1000 ns */
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}
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if (completion_area[0] != 1) { /* section 36.2.2, 1 = command ran and succeeded */
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/* completion_area[0] contains the completion status */
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/* completion_area[1] contains an error code, see 36.2.2 */
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}
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The output bitmap is ready for consumption immediately after the
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completion status indicates success.
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Excer[t from UltraSPARC Virtual Machine Specification
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=====================================================
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.. include:: dax-hv-api.txt
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:literal:
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