253 lines
9.2 KiB
ReStructuredText
253 lines
9.2 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
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=============
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Devlink DPIPE
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=============
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Background
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==========
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While performing the hardware offloading process, much of the hardware
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specifics cannot be presented. These details are useful for debugging, and
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``devlink-dpipe`` provides a standardized way to provide visibility into the
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offloading process.
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For example, the routing longest prefix match (LPM) algorithm used by the
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Linux kernel may differ from the hardware implementation. The pipeline debug
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API (DPIPE) is aimed at providing the user visibility into the ASIC's
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pipeline in a generic way.
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The hardware offload process is expected to be done in a way that the user
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should not be able to distinguish between the hardware vs. software
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implementation. In this process, hardware specifics are neglected. In
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reality those details can have lots of meaning and should be exposed in some
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standard way.
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This problem is made even more complex when one wishes to offload the
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control path of the whole networking stack to a switch ASIC. Due to
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differences in the hardware and software models some processes cannot be
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represented correctly.
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One example is the kernel's LPM algorithm which in many cases differs
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greatly to the hardware implementation. The configuration API is the same,
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but one cannot rely on the Forward Information Base (FIB) to look like the
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Level Path Compression trie (LPC-trie) in hardware.
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In many situations trying to analyze systems failure solely based on the
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kernel's dump may not be enough. By combining this data with complementary
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information about the underlying hardware, this debugging can be made
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easier; additionally, the information can be useful when debugging
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performance issues.
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Overview
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========
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The ``devlink-dpipe`` interface closes this gap. The hardware's pipeline is
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modeled as a graph of match/action tables. Each table represents a specific
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hardware block. This model is not new, first being used by the P4 language.
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Traditionally it has been used as an alternative model for hardware
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configuration, but the ``devlink-dpipe`` interface uses it for visibility
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purposes as a standard complementary tool. The system's view from
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``devlink-dpipe`` should change according to the changes done by the
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standard configuration tools.
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For example, it’s quite common to implement Access Control Lists (ACL)
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using Ternary Content Addressable Memory (TCAM). The TCAM memory can be
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divided into TCAM regions. Complex TC filters can have multiple rules with
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different priorities and different lookup keys. On the other hand hardware
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TCAM regions have a predefined lookup key. Offloading the TC filter rules
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using TCAM engine can result in multiple TCAM regions being interconnected
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in a chain (which may affect the data path latency). In response to a new TC
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filter new tables should be created describing those regions.
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Model
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=====
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The ``DPIPE`` model introduces several objects:
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* headers
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* tables
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* entries
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A ``header`` describes packet formats and provides names for fields within
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the packet. A ``table`` describes hardware blocks. An ``entry`` describes
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the actual content of a specific table.
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The hardware pipeline is not port specific, but rather describes the whole
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ASIC. Thus it is tied to the top of the ``devlink`` infrastructure.
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Drivers can register and unregister tables at run time, in order to support
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dynamic behavior. This dynamic behavior is mandatory for describing hardware
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blocks like TCAM regions which can be allocated and freed dynamically.
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``devlink-dpipe`` generally is not intended for configuration. The exception
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is hardware counting for a specific table.
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The following commands are used to obtain the ``dpipe`` objects from
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userspace:
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* ``table_get``: Receive a table's description.
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* ``headers_get``: Receive a device's supported headers.
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* ``entries_get``: Receive a table's current entries.
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* ``counters_set``: Enable or disable counters on a table.
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Table
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-----
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The driver should implement the following operations for each table:
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* ``matches_dump``: Dump the supported matches.
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* ``actions_dump``: Dump the supported actions.
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* ``entries_dump``: Dump the actual content of the table.
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* ``counters_set_update``: Synchronize hardware with counters enabled or
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disabled.
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Header/Field
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------------
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In a similar way to P4 headers and fields are used to describe a table's
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behavior. There is a slight difference between the standard protocol headers
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and specific ASIC metadata. The protocol headers should be declared in the
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``devlink`` core API. On the other hand ASIC meta data is driver specific
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and should be defined in the driver. Additionally, each driver-specific
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devlink documentation file should document the driver-specific ``dpipe``
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headers it implements. The headers and fields are identified by enumeration.
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In order to provide further visibility some ASIC metadata fields could be
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mapped to kernel objects. For example, internal router interface indexes can
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be directly mapped to the net device ifindex. FIB table indexes used by
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different Virtual Routing and Forwarding (VRF) tables can be mapped to
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internal routing table indexes.
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Match
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-----
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Matches are kept primitive and close to hardware operation. Match types like
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LPM are not supported due to the fact that this is exactly a process we wish
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to describe in full detail. Example of matches:
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* ``field_exact``: Exact match on a specific field.
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* ``field_exact_mask``: Exact match on a specific field after masking.
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* ``field_range``: Match on a specific range.
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The id's of the header and the field should be specified in order to
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identify the specific field. Furthermore, the header index should be
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specified in order to distinguish multiple headers of the same type in a
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packet (tunneling).
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Action
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------
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Similar to match, the actions are kept primitive and close to hardware
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operation. For example:
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* ``field_modify``: Modify the field value.
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* ``field_inc``: Increment the field value.
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* ``push_header``: Add a header.
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* ``pop_header``: Remove a header.
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Entry
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-----
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Entries of a specific table can be dumped on demand. Each eentry is
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identified with an index and its properties are described by a list of
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match/action values and specific counter. By dumping the tables content the
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interactions between tables can be resolved.
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Abstraction Example
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===================
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The following is an example of the abstraction model of the L3 part of
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Mellanox Spectrum ASIC. The blocks are described in the order they appear in
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the pipeline. The table sizes in the following examples are not real
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hardware sizes and are provided for demonstration purposes.
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LPM
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---
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The LPM algorithm can be implemented as a list of hash tables. Each hash
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table contains routes with the same prefix length. The root of the list is
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/32, and in case of a miss the hardware will continue to the next hash
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table. The depth of the search will affect the data path latency.
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In case of a hit the entry contains information about the next stage of the
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pipeline which resolves the MAC address. The next stage can be either local
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host table for directly connected routes, or adjacency table for next-hops.
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The ``meta.lpm_prefix`` field is used to connect two LPM tables.
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.. code::
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table lpm_prefix_16 {
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size: 4096,
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counters_enabled: true,
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match: { meta.vr_id: exact,
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ipv4.dst_addr: exact_mask,
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ipv6.dst_addr: exact_mask,
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meta.lpm_prefix: exact },
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action: { meta.adj_index: set,
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meta.adj_group_size: set,
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meta.rif_port: set,
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meta.lpm_prefix: set },
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}
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Local Host
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----------
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In the case of local routes the LPM lookup already resolves the egress
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router interface (RIF), yet the exact MAC address is not known. The local
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host table is a hash table combining the output interface id with
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destination IP address as a key. The result is the MAC address.
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.. code::
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table local_host {
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size: 4096,
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counters_enabled: true,
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match: { meta.rif_port: exact,
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ipv4.dst_addr: exact},
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action: { ethernet.daddr: set }
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}
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Adjacency
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---------
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In case of remote routes this table does the ECMP. The LPM lookup results in
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ECMP group size and index that serves as a global offset into this table.
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Concurrently a hash of the packet is generated. Based on the ECMP group size
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and the packet's hash a local offset is generated. Multiple LPM entries can
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point to the same adjacency group.
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.. code::
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table adjacency {
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size: 4096,
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counters_enabled: true,
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match: { meta.adj_index: exact,
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meta.adj_group_size: exact,
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meta.packet_hash_index: exact },
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action: { ethernet.daddr: set,
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meta.erif: set }
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}
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ERIF
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----
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In case the egress RIF and destination MAC have been resolved by previous
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tables this table does multiple operations like TTL decrease and MTU check.
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Then the decision of forward/drop is taken and the port L3 statistics are
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updated based on the packet's type (broadcast, unicast, multicast).
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.. code::
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table erif {
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size: 800,
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counters_enabled: true,
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match: { meta.rif_port: exact,
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meta.is_l3_unicast: exact,
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meta.is_l3_broadcast: exact,
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meta.is_l3_multicast, exact },
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action: { meta.l3_drop: set,
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meta.l3_forward: set }
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}
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