108 lines
3.7 KiB
YAML
108 lines
3.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Peripheral-specific properties for a SPI bus.
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description:
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Many SPI controllers need to add properties to peripheral devices. They could
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be common properties like spi-max-frequency, spi-cpha, etc. or they could be
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controller specific like delay in clock or data lines, etc. These properties
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need to be defined in the peripheral node because they are per-peripheral and
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there can be multiple peripherals attached to a controller. All those
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properties are listed here. The controller specific properties should go in
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their own separate schema that should be referenced from here.
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maintainers:
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- Mark Brown <broonie@kernel.org>
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properties:
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reg:
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minItems: 1
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maxItems: 256
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items:
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items:
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- minimum: 0
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maximum: 256
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description:
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Chip select used by the device.
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spi-cs-high:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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The device requires the chip select active high.
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spi-lsb-first:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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The device requires the LSB first mode.
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spi-max-frequency:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Maximum SPI clocking speed of the device in Hz.
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spi-rx-bus-width:
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description:
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Bus width to the SPI bus used for read transfers.
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If 0 is provided, then no RX will be possible on this device.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1, 2, 4, 8]
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default: 1
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spi-rx-delay-us:
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description:
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Delay, in microseconds, after a read transfer.
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rx-sample-delay-ns:
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description: SPI Rx sample delay offset, unit is nanoseconds.
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The delay from the default sample time before the actual
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sample of the rxd input signal occurs.
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spi-tx-bus-width:
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description:
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Bus width to the SPI bus used for write transfers.
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If 0 is provided, then no TX will be possible on this device.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1, 2, 4, 8]
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default: 1
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spi-tx-delay-us:
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description:
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Delay, in microseconds, after a write transfer.
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stacked-memories:
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description: Several SPI memories can be wired in stacked mode.
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This basically means that either a device features several chip
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selects, or that different devices must be seen as a single
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bigger chip. This basically doubles (or more) the total address
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space with only a single additional wire, while still needing
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to repeat the commands when crossing a chip boundary. The size of
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each chip should be provided as members of the array.
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$ref: /schemas/types.yaml#/definitions/uint64-array
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minItems: 2
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maxItems: 4
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parallel-memories:
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description: Several SPI memories can be wired in parallel mode.
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The devices are physically on a different buses but will always
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act synchronously as each data word is spread across the
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different memories (eg. even bits are stored in one memory, odd
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bits in the other). This basically doubles the address space and
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the throughput while greatly complexifying the wiring because as
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many busses as devices must be wired. The size of each chip should
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be provided as members of the array.
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$ref: /schemas/types.yaml#/definitions/uint64-array
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minItems: 2
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maxItems: 4
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# The controller specific properties go here.
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allOf:
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- $ref: cdns,qspi-nor-peripheral-props.yaml#
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- $ref: samsung,spi-peripheral-props.yaml#
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- $ref: nvidia,tegra210-quad-peripheral-props.yaml#
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additionalProperties: true
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