78 lines
1.8 KiB
YAML
78 lines
1.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2020-21 Cadence
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/spi/cdns,xspi.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Cadence XSPI Controller
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maintainers:
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- Parshuram Thombare <pthombar@cadence.com>
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description: |
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The XSPI controller allows SPI protocol communication in
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single, dual, quad or octal wire transmission modes for
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read/write access to slaves such as SPI-NOR flash.
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allOf:
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- $ref: "spi-controller.yaml#"
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properties:
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compatible:
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const: cdns,xspi-nor
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reg:
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items:
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- description: address and length of the controller register set
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- description: address and length of the Slave DMA data port
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- description: address and length of the auxiliary registers
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reg-names:
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items:
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- const: io
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- const: sdma
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- const: aux
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interrupts:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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xspi: spi@a0010000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "cdns,xspi-nor";
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reg = <0x0 0xa0010000 0x0 0x1040>,
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<0x0 0xb0000000 0x0 0x1000>,
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<0x0 0xa0020000 0x0 0x100>;
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reg-names = "io", "sdma", "aux";
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interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&gic>;
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flash@0 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <75000000>;
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reg = <0>;
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};
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flash@1 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <75000000>;
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reg = <1>;
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};
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};
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};
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