224 lines
4.9 KiB
YAML
224 lines
4.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mtd/qcom,nandc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm NAND controller
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maintainers:
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- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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properties:
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compatible:
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enum:
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- qcom,ipq806x-nand
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- qcom,ipq4019-nand
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- qcom,ipq6018-nand
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- qcom,ipq8074-nand
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- qcom,sdx55-nand
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reg:
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maxItems: 1
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clocks:
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items:
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- description: Core Clock
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- description: Always ON Clock
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clock-names:
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items:
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- const: core
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- const: aon
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"#address-cells": true
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"#size-cells": true
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patternProperties:
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"^nand@[a-f0-9]$":
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type: object
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properties:
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nand-bus-width:
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const: 8
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nand-ecc-strength:
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enum: [1, 4, 8]
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nand-ecc-step-size:
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enum:
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- 512
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allOf:
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- $ref: "nand-controller.yaml#"
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- if:
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properties:
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compatible:
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contains:
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const: qcom,ipq806x-nand
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then:
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properties:
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dmas:
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items:
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- description: rxtx DMA channel
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dma-names:
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items:
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- const: rxtx
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qcom,cmd-crci:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Must contain the ADM command type CRCI block instance number
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specified for the NAND controller on the given platform
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qcom,data-crci:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Must contain the ADM data type CRCI block instance number
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specified for the NAND controller on the given platform
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,ipq4019-nand
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- qcom,ipq6018-nand
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- qcom,ipq8074-nand
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- qcom,sdx55-nand
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then:
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properties:
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dmas:
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items:
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- description: tx DMA channel
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- description: rx DMA channel
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- description: cmd DMA channel
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dma-names:
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items:
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- const: tx
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- const: rx
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- const: cmd
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,ipq806x-nand
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then:
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properties:
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qcom,boot-partitions:
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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items:
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items:
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- description: offset
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- description: size
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description:
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Boot partition use a different layout where the 4 bytes of spare
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data are not protected by ECC. Use this to declare these special
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partitions by defining first the offset and then the size.
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It's in the form of <offset1 size1 offset2 size2 offset3 ...>
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and should be declared in ascending order.
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Refer to the ipq8064 example on how to use this special binding.
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-ipq806x.h>
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nand-controller@1ac00000 {
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compatible = "qcom,ipq806x-nand";
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reg = <0x1ac00000 0x800>;
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clocks = <&gcc EBI2_CLK>,
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<&gcc EBI2_AON_CLK>;
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clock-names = "core", "aon";
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dmas = <&adm_dma 3>;
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dma-names = "rxtx";
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qcom,cmd-crci = <15>;
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qcom,data-crci = <3>;
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#address-cells = <1>;
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#size-cells = <0>;
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nand@0 {
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reg = <0>;
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nand-ecc-strength = <4>;
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nand-bus-width = <8>;
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qcom,boot-partitions = <0x0 0x58a0000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "boot-nand";
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reg = <0 0x58a0000>;
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};
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partition@58a0000 {
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label = "fs-nand";
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reg = <0x58a0000 0x4000000>;
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};
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};
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};
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};
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#include <dt-bindings/clock/qcom,gcc-ipq4019.h>
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nand-controller@79b0000 {
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compatible = "qcom,ipq4019-nand";
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reg = <0x79b0000 0x1000>;
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clocks = <&gcc GCC_QPIC_CLK>,
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<&gcc GCC_QPIC_AHB_CLK>;
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clock-names = "core", "aon";
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dmas = <&qpicbam 0>,
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<&qpicbam 1>,
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<&qpicbam 2>;
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dma-names = "tx", "rx", "cmd";
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#address-cells = <1>;
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#size-cells = <0>;
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nand@0 {
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reg = <0>;
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nand-ecc-strength = <4>;
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nand-bus-width = <8>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "boot-nand";
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reg = <0 0x58a0000>;
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};
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partition@58a0000 {
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label = "fs-nand";
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reg = <0x58a0000 0x4000000>;
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};
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};
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};
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};
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...
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