95 lines
2.1 KiB
YAML
95 lines
2.1 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-video-engine.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Allwinner A10 Video Engine
|
|
|
|
maintainers:
|
|
- Chen-Yu Tsai <wens@csie.org>
|
|
- Maxime Ripard <mripard@kernel.org>
|
|
|
|
properties:
|
|
compatible:
|
|
enum:
|
|
- allwinner,sun4i-a10-video-engine
|
|
- allwinner,sun5i-a13-video-engine
|
|
- allwinner,sun7i-a20-video-engine
|
|
- allwinner,sun8i-a33-video-engine
|
|
- allwinner,sun8i-h3-video-engine
|
|
- allwinner,sun8i-v3s-video-engine
|
|
- allwinner,sun8i-r40-video-engine
|
|
- allwinner,sun20i-d1-video-engine
|
|
- allwinner,sun50i-a64-video-engine
|
|
- allwinner,sun50i-h5-video-engine
|
|
- allwinner,sun50i-h6-video-engine
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
interrupts:
|
|
maxItems: 1
|
|
|
|
clocks:
|
|
items:
|
|
- description: Bus Clock
|
|
- description: Module Clock
|
|
- description: RAM Clock
|
|
|
|
clock-names:
|
|
items:
|
|
- const: ahb
|
|
- const: mod
|
|
- const: ram
|
|
|
|
resets:
|
|
maxItems: 1
|
|
|
|
allwinner,sram:
|
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
|
items:
|
|
- items:
|
|
- description: phandle to SRAM
|
|
- description: register value for device
|
|
description: Phandle to the device SRAM
|
|
|
|
iommus:
|
|
maxItems: 1
|
|
|
|
memory-region:
|
|
maxItems: 1
|
|
description:
|
|
CMA pool to use for buffers allocation instead of the default
|
|
CMA pool.
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- interrupts
|
|
- clocks
|
|
- clock-names
|
|
- resets
|
|
- allwinner,sram
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
#include <dt-bindings/clock/sun7i-a20-ccu.h>
|
|
#include <dt-bindings/reset/sun4i-a10-ccu.h>
|
|
|
|
video-codec@1c0e000 {
|
|
compatible = "allwinner,sun7i-a20-video-engine";
|
|
reg = <0x01c0e000 0x1000>;
|
|
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
|
|
<&ccu CLK_DRAM_VE>;
|
|
clock-names = "ahb", "mod", "ram";
|
|
resets = <&ccu RST_VE>;
|
|
allwinner,sram = <&ve_sram 1>;
|
|
};
|
|
|
|
...
|