51 lines
867 B
YAML
51 lines
867 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/clock/amlogic,meson8-ddr-clkc.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Amlogic DDR Clock Controller
|
|
|
|
maintainers:
|
|
- Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
|
|
|
properties:
|
|
compatible:
|
|
enum:
|
|
- amlogic,meson8-ddr-clkc
|
|
- amlogic,meson8b-ddr-clkc
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
clocks:
|
|
maxItems: 1
|
|
|
|
clock-names:
|
|
items:
|
|
- const: xtal
|
|
|
|
"#clock-cells":
|
|
const: 1
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- clocks
|
|
- clock-names
|
|
- "#clock-cells"
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
ddr_clkc: clock-controller@400 {
|
|
compatible = "amlogic,meson8-ddr-clkc";
|
|
reg = <0x400 0x20>;
|
|
clocks = <&xtal>;
|
|
clock-names = "xtal";
|
|
#clock-cells = <1>;
|
|
};
|
|
|
|
...
|