linuxdebug/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml

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2.0 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/microchip,sparx5.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip Sparx5 Boards
maintainers:
- Lars Povlsen <lars.povlsen@microchip.com>
description: |+
The Microchip Sparx5 SoC is a ARMv8-based used in a family of
gigabit TSN-capable gigabit switches.
The SparX-5 Ethernet switch family provides a rich set of switching
features such as advanced TCAM-based VLAN and QoS processing
enabling delivery of differentiated services, and security through
TCAM-based frame processing using versatile content aware processor
(VCAP)
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: The Sparx5 pcb125 board is a modular board,
which has both spi-nor and eMMC storage. The modular design
allows for connection of different network ports.
items:
- const: microchip,sparx5-pcb125
- const: microchip,sparx5
- description: The Sparx5 pcb134 is a pizzabox form factor
gigabit switch with 20 SFP ports. It features spi-nor and
either spi-nand or eMMC storage (mount option).
items:
- const: microchip,sparx5-pcb134
- const: microchip,sparx5
- description: The Sparx5 pcb135 is a pizzabox form factor
gigabit switch with 48+4 Cu ports. It features spi-nor and
either spi-nand or eMMC storage (mount option).
items:
- const: microchip,sparx5-pcb135
- const: microchip,sparx5
axi@600000000:
type: object
description: the root node in the Sparx5 platforms must contain
an axi bus child node. They are always at physical address
0x600000000 in all the Sparx5 variants.
properties:
compatible:
items:
- const: simple-bus
required:
- compatible
required:
- compatible
- axi@600000000
additionalProperties: true
...