790 lines
19 KiB
C
790 lines
19 KiB
C
// SPDX-License-Identifier: ISC
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/* Copyright (C) 2020 MediaTek Inc. */
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#include "mt7915.h"
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#include "mac.h"
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#include "mcu.h"
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#include "testmode.h"
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enum {
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TM_CHANGED_TXPOWER,
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TM_CHANGED_FREQ_OFFSET,
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/* must be last */
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NUM_TM_CHANGED
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};
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static const u8 tm_change_map[] = {
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[TM_CHANGED_TXPOWER] = MT76_TM_ATTR_TX_POWER,
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[TM_CHANGED_FREQ_OFFSET] = MT76_TM_ATTR_FREQ_OFFSET,
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};
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struct reg_band {
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u32 band[2];
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};
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#define REG_BAND(_list, _reg) \
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{ _list.band[0] = MT_##_reg(0); \
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_list.band[1] = MT_##_reg(1); }
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#define REG_BAND_IDX(_list, _reg, _idx) \
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{ _list.band[0] = MT_##_reg(0, _idx); \
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_list.band[1] = MT_##_reg(1, _idx); }
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#define TM_REG_MAX_ID 17
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static struct reg_band reg_backup_list[TM_REG_MAX_ID];
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static int
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mt7915_tm_set_tx_power(struct mt7915_phy *phy)
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{
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struct mt7915_dev *dev = phy->dev;
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struct mt76_phy *mphy = phy->mt76;
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struct cfg80211_chan_def *chandef = &mphy->chandef;
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int freq = chandef->center_freq1;
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int ret;
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struct {
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u8 format_id;
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u8 dbdc_idx;
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s8 tx_power;
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u8 ant_idx; /* Only 0 is valid */
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u8 center_chan;
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u8 rsv[3];
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} __packed req = {
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.format_id = 0xf,
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.dbdc_idx = phy != &dev->phy,
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.center_chan = ieee80211_frequency_to_channel(freq),
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};
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u8 *tx_power = NULL;
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if (phy->mt76->test.state != MT76_TM_STATE_OFF)
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tx_power = phy->mt76->test.tx_power;
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/* Tx power of the other antennas are the same as antenna 0 */
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if (tx_power && tx_power[0])
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req.tx_power = tx_power[0];
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ret = mt76_mcu_send_msg(&dev->mt76,
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MCU_EXT_CMD(TX_POWER_FEATURE_CTRL),
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&req, sizeof(req), false);
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return ret;
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}
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static int
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mt7915_tm_set_freq_offset(struct mt7915_phy *phy, bool en, u32 val)
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{
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struct mt7915_dev *dev = phy->dev;
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struct mt7915_tm_cmd req = {
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.testmode_en = en,
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.param_idx = MCU_ATE_SET_FREQ_OFFSET,
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.param.freq.band = phy != &dev->phy,
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.param.freq.freq_offset = cpu_to_le32(val),
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};
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return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req,
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sizeof(req), false);
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}
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static int
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mt7915_tm_mode_ctrl(struct mt7915_dev *dev, bool enable)
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{
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struct {
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u8 format_id;
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bool enable;
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u8 rsv[2];
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} __packed req = {
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.format_id = 0x6,
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.enable = enable,
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};
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return mt76_mcu_send_msg(&dev->mt76,
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MCU_EXT_CMD(TX_POWER_FEATURE_CTRL),
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&req, sizeof(req), false);
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}
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static int
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mt7915_tm_set_trx(struct mt7915_phy *phy, int type, bool en)
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{
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struct mt7915_dev *dev = phy->dev;
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struct mt7915_tm_cmd req = {
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.testmode_en = 1,
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.param_idx = MCU_ATE_SET_TRX,
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.param.trx.type = type,
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.param.trx.enable = en,
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.param.trx.band = phy != &dev->phy,
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};
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return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req,
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sizeof(req), false);
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}
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static int
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mt7915_tm_clean_hwq(struct mt7915_phy *phy, u8 wcid)
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{
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struct mt7915_dev *dev = phy->dev;
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struct mt7915_tm_cmd req = {
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.testmode_en = 1,
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.param_idx = MCU_ATE_CLEAN_TXQUEUE,
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.param.clean.wcid = wcid,
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.param.clean.band = phy != &dev->phy,
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};
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return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req,
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sizeof(req), false);
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}
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static int
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mt7915_tm_set_slot_time(struct mt7915_phy *phy, u8 slot_time, u8 sifs)
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{
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struct mt7915_dev *dev = phy->dev;
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struct mt7915_tm_cmd req = {
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.testmode_en = !(phy->mt76->test.state == MT76_TM_STATE_OFF),
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.param_idx = MCU_ATE_SET_SLOT_TIME,
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.param.slot.slot_time = slot_time,
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.param.slot.sifs = sifs,
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.param.slot.rifs = 2,
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.param.slot.eifs = cpu_to_le16(60),
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.param.slot.band = phy != &dev->phy,
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};
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return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req,
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sizeof(req), false);
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}
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static int
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mt7915_tm_set_tam_arb(struct mt7915_phy *phy, bool enable, bool mu)
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{
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struct mt7915_dev *dev = phy->dev;
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u32 op_mode;
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if (!enable)
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op_mode = TAM_ARB_OP_MODE_NORMAL;
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else if (mu)
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op_mode = TAM_ARB_OP_MODE_TEST;
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else
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op_mode = TAM_ARB_OP_MODE_FORCE_SU;
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return mt7915_mcu_set_muru_ctrl(dev, MURU_SET_ARB_OP_MODE, op_mode);
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}
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static int
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mt7915_tm_set_wmm_qid(struct mt7915_phy *phy, u8 qid, u8 aifs, u8 cw_min,
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u16 cw_max, u16 txop)
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{
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struct mt7915_vif *mvif = (struct mt7915_vif *)phy->monitor_vif->drv_priv;
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struct mt7915_mcu_tx req = { .total = 1 };
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struct edca *e = &req.edca[0];
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e->queue = qid + mvif->mt76.wmm_idx * MT76_CONNAC_MAX_WMM_SETS;
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e->set = WMM_PARAM_SET;
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e->aifs = aifs;
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e->cw_min = cw_min;
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e->cw_max = cpu_to_le16(cw_max);
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e->txop = cpu_to_le16(txop);
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return mt7915_mcu_update_edca(phy->dev, &req);
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}
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static int
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mt7915_tm_set_ipg_params(struct mt7915_phy *phy, u32 ipg, u8 mode)
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{
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#define TM_DEFAULT_SIFS 10
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#define TM_MAX_SIFS 127
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#define TM_MAX_AIFSN 0xf
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#define TM_MIN_AIFSN 0x1
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#define BBP_PROC_TIME 1500
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struct mt7915_dev *dev = phy->dev;
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u8 sig_ext = (mode == MT76_TM_TX_MODE_CCK) ? 0 : 6;
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u8 slot_time = 9, sifs = TM_DEFAULT_SIFS;
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u8 aifsn = TM_MIN_AIFSN;
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u32 i2t_time, tr2t_time, txv_time;
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u16 cw = 0;
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if (ipg < sig_ext + slot_time + sifs)
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ipg = 0;
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if (!ipg)
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goto done;
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ipg -= sig_ext;
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if (ipg <= (TM_MAX_SIFS + slot_time)) {
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sifs = ipg - slot_time;
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} else {
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u32 val = (ipg + slot_time) / slot_time;
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while (val >>= 1)
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cw++;
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if (cw > 16)
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cw = 16;
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ipg -= ((1 << cw) - 1) * slot_time;
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aifsn = ipg / slot_time;
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if (aifsn > TM_MAX_AIFSN)
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aifsn = TM_MAX_AIFSN;
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ipg -= aifsn * slot_time;
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if (ipg > TM_DEFAULT_SIFS)
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sifs = min_t(u32, ipg, TM_MAX_SIFS);
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}
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done:
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txv_time = mt76_get_field(dev, MT_TMAC_ATCR(phy->band_idx),
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MT_TMAC_ATCR_TXV_TOUT);
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txv_time *= 50; /* normal clock time */
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i2t_time = (slot_time * 1000 - txv_time - BBP_PROC_TIME) / 50;
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tr2t_time = (sifs * 1000 - txv_time - BBP_PROC_TIME) / 50;
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mt76_set(dev, MT_TMAC_TRCR0(phy->band_idx),
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FIELD_PREP(MT_TMAC_TRCR0_TR2T_CHK, tr2t_time) |
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FIELD_PREP(MT_TMAC_TRCR0_I2T_CHK, i2t_time));
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mt7915_tm_set_slot_time(phy, slot_time, sifs);
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return mt7915_tm_set_wmm_qid(phy,
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mt76_connac_lmac_mapping(IEEE80211_AC_BE),
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aifsn, cw, cw, 0);
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}
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static int
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mt7915_tm_set_tx_len(struct mt7915_phy *phy, u32 tx_time)
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{
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struct mt76_phy *mphy = phy->mt76;
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struct mt76_testmode_data *td = &mphy->test;
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struct ieee80211_supported_band *sband;
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struct rate_info rate = {};
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u16 flags = 0, tx_len;
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u32 bitrate;
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int ret;
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if (!tx_time)
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return 0;
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rate.mcs = td->tx_rate_idx;
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rate.nss = td->tx_rate_nss;
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switch (td->tx_rate_mode) {
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case MT76_TM_TX_MODE_CCK:
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case MT76_TM_TX_MODE_OFDM:
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if (mphy->chandef.chan->band == NL80211_BAND_5GHZ)
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sband = &mphy->sband_5g.sband;
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else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ)
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sband = &mphy->sband_6g.sband;
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else
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sband = &mphy->sband_2g.sband;
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rate.legacy = sband->bitrates[rate.mcs].bitrate;
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break;
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case MT76_TM_TX_MODE_HT:
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rate.mcs += rate.nss * 8;
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flags |= RATE_INFO_FLAGS_MCS;
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if (td->tx_rate_sgi)
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flags |= RATE_INFO_FLAGS_SHORT_GI;
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break;
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case MT76_TM_TX_MODE_VHT:
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flags |= RATE_INFO_FLAGS_VHT_MCS;
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if (td->tx_rate_sgi)
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flags |= RATE_INFO_FLAGS_SHORT_GI;
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break;
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case MT76_TM_TX_MODE_HE_SU:
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case MT76_TM_TX_MODE_HE_EXT_SU:
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case MT76_TM_TX_MODE_HE_TB:
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case MT76_TM_TX_MODE_HE_MU:
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rate.he_gi = td->tx_rate_sgi;
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flags |= RATE_INFO_FLAGS_HE_MCS;
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break;
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default:
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break;
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}
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rate.flags = flags;
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switch (mphy->chandef.width) {
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case NL80211_CHAN_WIDTH_160:
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case NL80211_CHAN_WIDTH_80P80:
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rate.bw = RATE_INFO_BW_160;
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break;
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case NL80211_CHAN_WIDTH_80:
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rate.bw = RATE_INFO_BW_80;
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break;
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case NL80211_CHAN_WIDTH_40:
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rate.bw = RATE_INFO_BW_40;
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break;
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default:
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rate.bw = RATE_INFO_BW_20;
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break;
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}
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bitrate = cfg80211_calculate_bitrate(&rate);
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tx_len = bitrate * tx_time / 10 / 8;
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ret = mt76_testmode_alloc_skb(phy->mt76, tx_len);
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if (ret)
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return ret;
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return 0;
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}
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static void
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mt7915_tm_reg_backup_restore(struct mt7915_phy *phy)
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{
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int n_regs = ARRAY_SIZE(reg_backup_list);
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struct mt7915_dev *dev = phy->dev;
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u32 *b = phy->test.reg_backup;
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int i;
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REG_BAND_IDX(reg_backup_list[0], AGG_PCR0, 0);
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REG_BAND_IDX(reg_backup_list[1], AGG_PCR0, 1);
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REG_BAND_IDX(reg_backup_list[2], AGG_AWSCR0, 0);
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REG_BAND_IDX(reg_backup_list[3], AGG_AWSCR0, 1);
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REG_BAND_IDX(reg_backup_list[4], AGG_AWSCR0, 2);
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REG_BAND_IDX(reg_backup_list[5], AGG_AWSCR0, 3);
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REG_BAND(reg_backup_list[6], AGG_MRCR);
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REG_BAND(reg_backup_list[7], TMAC_TFCR0);
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REG_BAND(reg_backup_list[8], TMAC_TCR0);
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REG_BAND(reg_backup_list[9], AGG_ATCR1);
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REG_BAND(reg_backup_list[10], AGG_ATCR3);
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REG_BAND(reg_backup_list[11], TMAC_TRCR0);
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REG_BAND(reg_backup_list[12], TMAC_ICR0);
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REG_BAND_IDX(reg_backup_list[13], ARB_DRNGR0, 0);
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REG_BAND_IDX(reg_backup_list[14], ARB_DRNGR0, 1);
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REG_BAND(reg_backup_list[15], WF_RFCR);
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REG_BAND(reg_backup_list[16], WF_RFCR1);
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if (phy->mt76->test.state == MT76_TM_STATE_OFF) {
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for (i = 0; i < n_regs; i++)
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mt76_wr(dev, reg_backup_list[i].band[phy->band_idx], b[i]);
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return;
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}
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if (!b) {
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b = devm_kzalloc(dev->mt76.dev, 4 * n_regs, GFP_KERNEL);
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if (!b)
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return;
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phy->test.reg_backup = b;
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for (i = 0; i < n_regs; i++)
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b[i] = mt76_rr(dev, reg_backup_list[i].band[phy->band_idx]);
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}
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mt76_clear(dev, MT_AGG_PCR0(phy->band_idx, 0), MT_AGG_PCR0_MM_PROT |
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MT_AGG_PCR0_GF_PROT | MT_AGG_PCR0_ERP_PROT |
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MT_AGG_PCR0_VHT_PROT | MT_AGG_PCR0_BW20_PROT |
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MT_AGG_PCR0_BW40_PROT | MT_AGG_PCR0_BW80_PROT);
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mt76_set(dev, MT_AGG_PCR0(phy->band_idx, 0), MT_AGG_PCR0_PTA_WIN_DIS);
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mt76_wr(dev, MT_AGG_PCR0(phy->band_idx, 1), MT_AGG_PCR1_RTS0_NUM_THRES |
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MT_AGG_PCR1_RTS0_LEN_THRES);
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mt76_clear(dev, MT_AGG_MRCR(phy->band_idx), MT_AGG_MRCR_BAR_CNT_LIMIT |
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MT_AGG_MRCR_LAST_RTS_CTS_RN | MT_AGG_MRCR_RTS_FAIL_LIMIT |
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MT_AGG_MRCR_TXCMD_RTS_FAIL_LIMIT);
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mt76_rmw(dev, MT_AGG_MRCR(phy->band_idx), MT_AGG_MRCR_RTS_FAIL_LIMIT |
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MT_AGG_MRCR_TXCMD_RTS_FAIL_LIMIT,
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FIELD_PREP(MT_AGG_MRCR_RTS_FAIL_LIMIT, 1) |
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FIELD_PREP(MT_AGG_MRCR_TXCMD_RTS_FAIL_LIMIT, 1));
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mt76_wr(dev, MT_TMAC_TFCR0(phy->band_idx), 0);
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mt76_clear(dev, MT_TMAC_TCR0(phy->band_idx), MT_TMAC_TCR0_TBTT_STOP_CTRL);
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/* config rx filter for testmode rx */
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mt76_wr(dev, MT_WF_RFCR(phy->band_idx), 0xcf70a);
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mt76_wr(dev, MT_WF_RFCR1(phy->band_idx), 0);
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}
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static void
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mt7915_tm_init(struct mt7915_phy *phy, bool en)
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{
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struct mt7915_dev *dev = phy->dev;
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if (!test_bit(MT76_STATE_RUNNING, &phy->mt76->state))
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return;
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mt7915_mcu_set_sku_en(phy, !en);
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mt7915_tm_mode_ctrl(dev, en);
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mt7915_tm_reg_backup_restore(phy);
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mt7915_tm_set_trx(phy, TM_MAC_TXRX, !en);
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mt7915_mcu_add_bss_info(phy, phy->monitor_vif, en);
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mt7915_mcu_add_sta(dev, phy->monitor_vif, NULL, en);
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if (!en)
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mt7915_tm_set_tam_arb(phy, en, 0);
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}
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static void
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mt7915_tm_update_channel(struct mt7915_phy *phy)
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{
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mutex_unlock(&phy->dev->mt76.mutex);
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mt7915_set_channel(phy);
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mutex_lock(&phy->dev->mt76.mutex);
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mt7915_mcu_set_chan_info(phy, MCU_EXT_CMD(SET_RX_PATH));
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}
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static void
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mt7915_tm_set_tx_frames(struct mt7915_phy *phy, bool en)
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{
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static const u8 spe_idx_map[] = {0, 0, 1, 0, 3, 2, 4, 0,
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9, 8, 6, 10, 16, 12, 18, 0};
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struct mt76_testmode_data *td = &phy->mt76->test;
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struct mt7915_dev *dev = phy->dev;
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struct ieee80211_tx_info *info;
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u8 duty_cycle = td->tx_duty_cycle;
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u32 tx_time = td->tx_time;
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u32 ipg = td->tx_ipg;
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mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, false);
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mt7915_tm_clean_hwq(phy, dev->mt76.global_wcid.idx);
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if (en) {
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mt7915_tm_update_channel(phy);
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if (td->tx_spe_idx) {
|
|
phy->test.spe_idx = td->tx_spe_idx;
|
|
} else {
|
|
u8 tx_ant = td->tx_antenna_mask;
|
|
|
|
if (phy != &dev->phy)
|
|
tx_ant >>= dev->chainshift;
|
|
phy->test.spe_idx = spe_idx_map[tx_ant];
|
|
}
|
|
}
|
|
|
|
mt7915_tm_set_tam_arb(phy, en,
|
|
td->tx_rate_mode == MT76_TM_TX_MODE_HE_MU);
|
|
|
|
/* if all three params are set, duty_cycle will be ignored */
|
|
if (duty_cycle && tx_time && !ipg) {
|
|
ipg = tx_time * 100 / duty_cycle - tx_time;
|
|
} else if (duty_cycle && !tx_time && ipg) {
|
|
if (duty_cycle < 100)
|
|
tx_time = duty_cycle * ipg / (100 - duty_cycle);
|
|
}
|
|
|
|
mt7915_tm_set_ipg_params(phy, ipg, td->tx_rate_mode);
|
|
mt7915_tm_set_tx_len(phy, tx_time);
|
|
|
|
if (ipg)
|
|
td->tx_queued_limit = MT76_TM_TIMEOUT * 1000000 / ipg / 2;
|
|
|
|
if (!en || !td->tx_skb)
|
|
return;
|
|
|
|
info = IEEE80211_SKB_CB(td->tx_skb);
|
|
info->control.vif = phy->monitor_vif;
|
|
|
|
mt7915_tm_set_trx(phy, TM_MAC_TX, en);
|
|
}
|
|
|
|
static void
|
|
mt7915_tm_set_rx_frames(struct mt7915_phy *phy, bool en)
|
|
{
|
|
mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, false);
|
|
|
|
if (en) {
|
|
struct mt7915_dev *dev = phy->dev;
|
|
|
|
mt7915_tm_update_channel(phy);
|
|
|
|
/* read-clear */
|
|
mt76_rr(dev, MT_MIB_SDR3(phy != &dev->phy));
|
|
mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, en);
|
|
}
|
|
}
|
|
|
|
static int
|
|
mt7915_tm_rf_switch_mode(struct mt7915_dev *dev, u32 oper)
|
|
{
|
|
struct mt7915_tm_rf_test req = {
|
|
.op.op_mode = cpu_to_le32(oper),
|
|
};
|
|
|
|
return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RF_TEST), &req,
|
|
sizeof(req), true);
|
|
}
|
|
|
|
static int
|
|
mt7915_tm_set_tx_cont(struct mt7915_phy *phy, bool en)
|
|
{
|
|
#define TX_CONT_START 0x05
|
|
#define TX_CONT_STOP 0x06
|
|
struct mt7915_dev *dev = phy->dev;
|
|
struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
|
|
int freq1 = ieee80211_frequency_to_channel(chandef->center_freq1);
|
|
struct mt76_testmode_data *td = &phy->mt76->test;
|
|
u32 func_idx = en ? TX_CONT_START : TX_CONT_STOP;
|
|
u8 rate_idx = td->tx_rate_idx, mode;
|
|
u16 rateval;
|
|
struct mt7915_tm_rf_test req = {
|
|
.action = 1,
|
|
.icap_len = 120,
|
|
.op.rf.func_idx = cpu_to_le32(func_idx),
|
|
};
|
|
struct tm_tx_cont *tx_cont = &req.op.rf.param.tx_cont;
|
|
|
|
tx_cont->control_ch = chandef->chan->hw_value;
|
|
tx_cont->center_ch = freq1;
|
|
tx_cont->tx_ant = td->tx_antenna_mask;
|
|
tx_cont->band = phy != &dev->phy;
|
|
|
|
switch (chandef->width) {
|
|
case NL80211_CHAN_WIDTH_40:
|
|
tx_cont->bw = CMD_CBW_40MHZ;
|
|
break;
|
|
case NL80211_CHAN_WIDTH_80:
|
|
tx_cont->bw = CMD_CBW_80MHZ;
|
|
break;
|
|
case NL80211_CHAN_WIDTH_80P80:
|
|
tx_cont->bw = CMD_CBW_8080MHZ;
|
|
break;
|
|
case NL80211_CHAN_WIDTH_160:
|
|
tx_cont->bw = CMD_CBW_160MHZ;
|
|
break;
|
|
case NL80211_CHAN_WIDTH_5:
|
|
tx_cont->bw = CMD_CBW_5MHZ;
|
|
break;
|
|
case NL80211_CHAN_WIDTH_10:
|
|
tx_cont->bw = CMD_CBW_10MHZ;
|
|
break;
|
|
case NL80211_CHAN_WIDTH_20:
|
|
tx_cont->bw = CMD_CBW_20MHZ;
|
|
break;
|
|
case NL80211_CHAN_WIDTH_20_NOHT:
|
|
tx_cont->bw = CMD_CBW_20MHZ;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (!en) {
|
|
req.op.rf.param.func_data = cpu_to_le32(phy != &dev->phy);
|
|
goto out;
|
|
}
|
|
|
|
if (td->tx_rate_mode <= MT76_TM_TX_MODE_OFDM) {
|
|
struct ieee80211_supported_band *sband;
|
|
u8 idx = rate_idx;
|
|
|
|
if (chandef->chan->band == NL80211_BAND_5GHZ)
|
|
sband = &phy->mt76->sband_5g.sband;
|
|
else if (chandef->chan->band == NL80211_BAND_6GHZ)
|
|
sband = &phy->mt76->sband_6g.sband;
|
|
else
|
|
sband = &phy->mt76->sband_2g.sband;
|
|
|
|
if (td->tx_rate_mode == MT76_TM_TX_MODE_OFDM)
|
|
idx += 4;
|
|
rate_idx = sband->bitrates[idx].hw_value & 0xff;
|
|
}
|
|
|
|
switch (td->tx_rate_mode) {
|
|
case MT76_TM_TX_MODE_CCK:
|
|
mode = MT_PHY_TYPE_CCK;
|
|
break;
|
|
case MT76_TM_TX_MODE_OFDM:
|
|
mode = MT_PHY_TYPE_OFDM;
|
|
break;
|
|
case MT76_TM_TX_MODE_HT:
|
|
mode = MT_PHY_TYPE_HT;
|
|
break;
|
|
case MT76_TM_TX_MODE_VHT:
|
|
mode = MT_PHY_TYPE_VHT;
|
|
break;
|
|
case MT76_TM_TX_MODE_HE_SU:
|
|
mode = MT_PHY_TYPE_HE_SU;
|
|
break;
|
|
case MT76_TM_TX_MODE_HE_EXT_SU:
|
|
mode = MT_PHY_TYPE_HE_EXT_SU;
|
|
break;
|
|
case MT76_TM_TX_MODE_HE_TB:
|
|
mode = MT_PHY_TYPE_HE_TB;
|
|
break;
|
|
case MT76_TM_TX_MODE_HE_MU:
|
|
mode = MT_PHY_TYPE_HE_MU;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
rateval = mode << 6 | rate_idx;
|
|
tx_cont->rateval = cpu_to_le16(rateval);
|
|
|
|
out:
|
|
if (!en) {
|
|
int ret;
|
|
|
|
ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RF_TEST), &req,
|
|
sizeof(req), true);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return mt7915_tm_rf_switch_mode(dev, RF_OPER_NORMAL);
|
|
}
|
|
|
|
mt7915_tm_rf_switch_mode(dev, RF_OPER_RF_TEST);
|
|
mt7915_tm_update_channel(phy);
|
|
|
|
return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RF_TEST), &req,
|
|
sizeof(req), true);
|
|
}
|
|
|
|
static void
|
|
mt7915_tm_update_params(struct mt7915_phy *phy, u32 changed)
|
|
{
|
|
struct mt76_testmode_data *td = &phy->mt76->test;
|
|
bool en = phy->mt76->test.state != MT76_TM_STATE_OFF;
|
|
|
|
if (changed & BIT(TM_CHANGED_FREQ_OFFSET))
|
|
mt7915_tm_set_freq_offset(phy, en, en ? td->freq_offset : 0);
|
|
if (changed & BIT(TM_CHANGED_TXPOWER))
|
|
mt7915_tm_set_tx_power(phy);
|
|
}
|
|
|
|
static int
|
|
mt7915_tm_set_state(struct mt76_phy *mphy, enum mt76_testmode_state state)
|
|
{
|
|
struct mt76_testmode_data *td = &mphy->test;
|
|
struct mt7915_phy *phy = mphy->priv;
|
|
enum mt76_testmode_state prev_state = td->state;
|
|
|
|
mphy->test.state = state;
|
|
|
|
if (prev_state == MT76_TM_STATE_TX_FRAMES ||
|
|
state == MT76_TM_STATE_TX_FRAMES)
|
|
mt7915_tm_set_tx_frames(phy, state == MT76_TM_STATE_TX_FRAMES);
|
|
else if (prev_state == MT76_TM_STATE_RX_FRAMES ||
|
|
state == MT76_TM_STATE_RX_FRAMES)
|
|
mt7915_tm_set_rx_frames(phy, state == MT76_TM_STATE_RX_FRAMES);
|
|
else if (prev_state == MT76_TM_STATE_TX_CONT ||
|
|
state == MT76_TM_STATE_TX_CONT)
|
|
mt7915_tm_set_tx_cont(phy, state == MT76_TM_STATE_TX_CONT);
|
|
else if (prev_state == MT76_TM_STATE_OFF ||
|
|
state == MT76_TM_STATE_OFF)
|
|
mt7915_tm_init(phy, !(state == MT76_TM_STATE_OFF));
|
|
|
|
if ((state == MT76_TM_STATE_IDLE &&
|
|
prev_state == MT76_TM_STATE_OFF) ||
|
|
(state == MT76_TM_STATE_OFF &&
|
|
prev_state == MT76_TM_STATE_IDLE)) {
|
|
u32 changed = 0;
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(tm_change_map); i++) {
|
|
u16 cur = tm_change_map[i];
|
|
|
|
if (td->param_set[cur / 32] & BIT(cur % 32))
|
|
changed |= BIT(i);
|
|
}
|
|
|
|
mt7915_tm_update_params(phy, changed);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
mt7915_tm_set_params(struct mt76_phy *mphy, struct nlattr **tb,
|
|
enum mt76_testmode_state new_state)
|
|
{
|
|
struct mt76_testmode_data *td = &mphy->test;
|
|
struct mt7915_phy *phy = mphy->priv;
|
|
u32 changed = 0;
|
|
int i;
|
|
|
|
BUILD_BUG_ON(NUM_TM_CHANGED >= 32);
|
|
|
|
if (new_state == MT76_TM_STATE_OFF ||
|
|
td->state == MT76_TM_STATE_OFF)
|
|
return 0;
|
|
|
|
if (td->tx_antenna_mask & ~mphy->chainmask)
|
|
return -EINVAL;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(tm_change_map); i++) {
|
|
if (tb[tm_change_map[i]])
|
|
changed |= BIT(i);
|
|
}
|
|
|
|
mt7915_tm_update_params(phy, changed);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
mt7915_tm_dump_stats(struct mt76_phy *mphy, struct sk_buff *msg)
|
|
{
|
|
struct mt7915_phy *phy = mphy->priv;
|
|
struct mt7915_dev *dev = phy->dev;
|
|
enum mt76_rxq_id q;
|
|
void *rx, *rssi;
|
|
u16 fcs_err;
|
|
int i;
|
|
u32 cnt;
|
|
|
|
rx = nla_nest_start(msg, MT76_TM_STATS_ATTR_LAST_RX);
|
|
if (!rx)
|
|
return -ENOMEM;
|
|
|
|
if (nla_put_s32(msg, MT76_TM_RX_ATTR_FREQ_OFFSET, phy->test.last_freq_offset))
|
|
return -ENOMEM;
|
|
|
|
rssi = nla_nest_start(msg, MT76_TM_RX_ATTR_RCPI);
|
|
if (!rssi)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(phy->test.last_rcpi); i++)
|
|
if (nla_put_u8(msg, i, phy->test.last_rcpi[i]))
|
|
return -ENOMEM;
|
|
|
|
nla_nest_end(msg, rssi);
|
|
|
|
rssi = nla_nest_start(msg, MT76_TM_RX_ATTR_IB_RSSI);
|
|
if (!rssi)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(phy->test.last_ib_rssi); i++)
|
|
if (nla_put_s8(msg, i, phy->test.last_ib_rssi[i]))
|
|
return -ENOMEM;
|
|
|
|
nla_nest_end(msg, rssi);
|
|
|
|
rssi = nla_nest_start(msg, MT76_TM_RX_ATTR_WB_RSSI);
|
|
if (!rssi)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(phy->test.last_wb_rssi); i++)
|
|
if (nla_put_s8(msg, i, phy->test.last_wb_rssi[i]))
|
|
return -ENOMEM;
|
|
|
|
nla_nest_end(msg, rssi);
|
|
|
|
if (nla_put_u8(msg, MT76_TM_RX_ATTR_SNR, phy->test.last_snr))
|
|
return -ENOMEM;
|
|
|
|
nla_nest_end(msg, rx);
|
|
|
|
cnt = mt76_rr(dev, MT_MIB_SDR3(phy->band_idx));
|
|
fcs_err = is_mt7915(&dev->mt76) ? FIELD_GET(MT_MIB_SDR3_FCS_ERR_MASK, cnt) :
|
|
FIELD_GET(MT_MIB_SDR3_FCS_ERR_MASK_MT7916, cnt);
|
|
|
|
q = phy->band_idx ? MT_RXQ_BAND1 : MT_RXQ_MAIN;
|
|
mphy->test.rx_stats.packets[q] += fcs_err;
|
|
mphy->test.rx_stats.fcs_error[q] += fcs_err;
|
|
|
|
return 0;
|
|
}
|
|
|
|
const struct mt76_testmode_ops mt7915_testmode_ops = {
|
|
.set_state = mt7915_tm_set_state,
|
|
.set_params = mt7915_tm_set_params,
|
|
.dump_stats = mt7915_tm_dump_stats,
|
|
};
|