316 lines
7.8 KiB
C
316 lines
7.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) ST-Ericsson SA 2010
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* Author: Shujuan Chen <shujuan.chen@stericsson.com> for ST-Ericsson.
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* Author: Jonas Linde <jonas.linde@stericsson.com> for ST-Ericsson.
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* Author: Joakim Bech <joakim.xx.bech@stericsson.com> for ST-Ericsson.
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* Author: Berne Hebark <berne.herbark@stericsson.com> for ST-Ericsson.
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* Author: Niklas Hernaeus <niklas.hernaeus@stericsson.com> for ST-Ericsson.
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*/
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#ifndef _CRYP_H_
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#define _CRYP_H_
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#include <linux/completion.h>
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#include <linux/dmaengine.h>
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#include <linux/klist.h>
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#include <linux/mutex.h>
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#define DEV_DBG_NAME "crypX crypX:"
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/* CRYP enable/disable */
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enum cryp_crypen {
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CRYP_CRYPEN_DISABLE = 0,
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CRYP_CRYPEN_ENABLE = 1
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};
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/* CRYP Start Computation enable/disable */
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enum cryp_start {
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CRYP_START_DISABLE = 0,
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CRYP_START_ENABLE = 1
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};
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/* CRYP Init Signal enable/disable */
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enum cryp_init {
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CRYP_INIT_DISABLE = 0,
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CRYP_INIT_ENABLE = 1
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};
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/* Cryp State enable/disable */
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enum cryp_state {
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CRYP_STATE_DISABLE = 0,
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CRYP_STATE_ENABLE = 1
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};
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/* Key preparation bit enable */
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enum cryp_key_prep {
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KSE_DISABLED = 0,
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KSE_ENABLED = 1
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};
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/* Key size for AES */
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#define CRYP_KEY_SIZE_128 (0)
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#define CRYP_KEY_SIZE_192 (1)
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#define CRYP_KEY_SIZE_256 (2)
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/* AES modes */
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enum cryp_algo_mode {
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CRYP_ALGO_TDES_ECB,
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CRYP_ALGO_TDES_CBC,
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CRYP_ALGO_DES_ECB,
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CRYP_ALGO_DES_CBC,
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CRYP_ALGO_AES_ECB,
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CRYP_ALGO_AES_CBC,
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CRYP_ALGO_AES_CTR,
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CRYP_ALGO_AES_XTS
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};
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/* Cryp Encryption or Decryption */
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enum cryp_algorithm_dir {
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CRYP_ALGORITHM_ENCRYPT,
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CRYP_ALGORITHM_DECRYPT
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};
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/* Hardware access method */
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enum cryp_mode {
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CRYP_MODE_POLLING,
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CRYP_MODE_INTERRUPT,
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CRYP_MODE_DMA
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};
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/**
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* struct cryp_config -
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* @keysize: Key size for AES
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* @algomode: AES modes
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* @algodir: Cryp Encryption or Decryption
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*
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* CRYP configuration structure to be passed to set configuration
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*/
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struct cryp_config {
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int keysize;
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enum cryp_algo_mode algomode;
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enum cryp_algorithm_dir algodir;
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};
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/**
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* struct cryp_protection_config -
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* @privilege_access: Privileged cryp state enable/disable
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* @secure_access: Secure cryp state enable/disable
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*
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* Protection configuration structure for setting privilage access
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*/
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struct cryp_protection_config {
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enum cryp_state privilege_access;
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enum cryp_state secure_access;
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};
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/* Cryp status */
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enum cryp_status_id {
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CRYP_STATUS_BUSY = 0x10,
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CRYP_STATUS_OUTPUT_FIFO_FULL = 0x08,
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CRYP_STATUS_OUTPUT_FIFO_NOT_EMPTY = 0x04,
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CRYP_STATUS_INPUT_FIFO_NOT_FULL = 0x02,
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CRYP_STATUS_INPUT_FIFO_EMPTY = 0x01
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};
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/* Cryp DMA interface */
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#define CRYP_DMA_TX_FIFO 0x08
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#define CRYP_DMA_RX_FIFO 0x10
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enum cryp_dma_req_type {
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CRYP_DMA_DISABLE_BOTH,
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CRYP_DMA_ENABLE_IN_DATA,
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CRYP_DMA_ENABLE_OUT_DATA,
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CRYP_DMA_ENABLE_BOTH_DIRECTIONS
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};
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enum cryp_dma_channel {
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CRYP_DMA_RX = 0,
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CRYP_DMA_TX
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};
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/* Key registers */
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enum cryp_key_reg_index {
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CRYP_KEY_REG_1,
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CRYP_KEY_REG_2,
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CRYP_KEY_REG_3,
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CRYP_KEY_REG_4
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};
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/* Key register left and right */
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struct cryp_key_value {
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u32 key_value_left;
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u32 key_value_right;
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};
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/* Cryp Initialization structure */
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enum cryp_init_vector_index {
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CRYP_INIT_VECTOR_INDEX_0,
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CRYP_INIT_VECTOR_INDEX_1
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};
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/* struct cryp_init_vector_value -
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* @init_value_left
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* @init_value_right
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* */
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struct cryp_init_vector_value {
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u32 init_value_left;
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u32 init_value_right;
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};
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/**
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* struct cryp_device_context - structure for a cryp context.
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* @cr: control register
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* @dmacr: DMA control register
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* @imsc: Interrupt mask set/clear register
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* @key_1_l: Key 1l register
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* @key_1_r: Key 1r register
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* @key_2_l: Key 2l register
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* @key_2_r: Key 2r register
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* @key_3_l: Key 3l register
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* @key_3_r: Key 3r register
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* @key_4_l: Key 4l register
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* @key_4_r: Key 4r register
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* @init_vect_0_l: Initialization vector 0l register
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* @init_vect_0_r: Initialization vector 0r register
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* @init_vect_1_l: Initialization vector 1l register
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* @init_vect_1_r: Initialization vector 0r register
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* @din: Data in register
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* @dout: Data out register
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*
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* CRYP power management specifc structure.
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*/
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struct cryp_device_context {
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u32 cr;
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u32 dmacr;
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u32 imsc;
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u32 key_1_l;
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u32 key_1_r;
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u32 key_2_l;
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u32 key_2_r;
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u32 key_3_l;
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u32 key_3_r;
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u32 key_4_l;
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u32 key_4_r;
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u32 init_vect_0_l;
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u32 init_vect_0_r;
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u32 init_vect_1_l;
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u32 init_vect_1_r;
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u32 din;
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u32 dout;
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};
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struct cryp_dma {
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dma_cap_mask_t mask;
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struct completion cryp_dma_complete;
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struct dma_chan *chan_cryp2mem;
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struct dma_chan *chan_mem2cryp;
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struct stedma40_chan_cfg *cfg_cryp2mem;
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struct stedma40_chan_cfg *cfg_mem2cryp;
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int sg_src_len;
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int sg_dst_len;
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struct scatterlist *sg_src;
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struct scatterlist *sg_dst;
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int nents_src;
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int nents_dst;
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};
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/**
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* struct cryp_device_data - structure for a cryp device.
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* @base: Pointer to virtual base address of the cryp device.
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* @phybase: Pointer to physical memory location of the cryp device.
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* @dev: Pointer to the devices dev structure.
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* @clk: Pointer to the device's clock control.
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* @irq: IRQ number
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* @pwr_regulator: Pointer to the device's power control.
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* @power_status: Current status of the power.
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* @ctx_lock: Lock for current_ctx.
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* @current_ctx: Pointer to the currently allocated context.
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* @list_node: For inclusion into a klist.
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* @dma: The dma structure holding channel configuration.
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* @power_state: TRUE = power state on, FALSE = power state off.
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* @power_state_spinlock: Spinlock for power_state.
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* @restore_dev_ctx: TRUE = saved ctx, FALSE = no saved ctx.
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*/
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struct cryp_device_data {
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struct cryp_register __iomem *base;
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phys_addr_t phybase;
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struct device *dev;
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struct clk *clk;
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int irq;
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struct regulator *pwr_regulator;
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int power_status;
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spinlock_t ctx_lock;
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struct cryp_ctx *current_ctx;
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struct klist_node list_node;
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struct cryp_dma dma;
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bool power_state;
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spinlock_t power_state_spinlock;
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bool restore_dev_ctx;
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};
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void cryp_wait_until_done(struct cryp_device_data *device_data);
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/* Initialization functions */
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int cryp_check(struct cryp_device_data *device_data);
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void cryp_activity(struct cryp_device_data *device_data,
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enum cryp_crypen cryp_crypen);
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void cryp_flush_inoutfifo(struct cryp_device_data *device_data);
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int cryp_set_configuration(struct cryp_device_data *device_data,
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struct cryp_config *cryp_config,
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u32 *control_register);
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void cryp_configure_for_dma(struct cryp_device_data *device_data,
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enum cryp_dma_req_type dma_req);
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int cryp_configure_key_values(struct cryp_device_data *device_data,
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enum cryp_key_reg_index key_reg_index,
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struct cryp_key_value key_value);
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int cryp_configure_init_vector(struct cryp_device_data *device_data,
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enum cryp_init_vector_index
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init_vector_index,
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struct cryp_init_vector_value
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init_vector_value);
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int cryp_configure_protection(struct cryp_device_data *device_data,
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struct cryp_protection_config *p_protect_config);
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/* Power management funtions */
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void cryp_save_device_context(struct cryp_device_data *device_data,
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struct cryp_device_context *ctx,
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int cryp_mode);
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void cryp_restore_device_context(struct cryp_device_data *device_data,
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struct cryp_device_context *ctx);
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/* Data transfer and status bits. */
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int cryp_is_logic_busy(struct cryp_device_data *device_data);
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int cryp_get_status(struct cryp_device_data *device_data);
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/**
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* cryp_write_indata - This routine writes 32 bit data into the data input
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* register of the cryptography IP.
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* @device_data: Pointer to the device data struct for base address.
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* @write_data: Data to write.
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*/
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int cryp_write_indata(struct cryp_device_data *device_data, u32 write_data);
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/**
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* cryp_read_outdata - This routine reads the data from the data output
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* register of the CRYP logic
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* @device_data: Pointer to the device data struct for base address.
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* @read_data: Read the data from the output FIFO.
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*/
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int cryp_read_outdata(struct cryp_device_data *device_data, u32 *read_data);
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#endif /* _CRYP_H_ */
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