834 lines
22 KiB
C
834 lines
22 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright (C) 2021-2022 Intel Corporation */
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#undef pr_fmt
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#define pr_fmt(fmt) "tdx: " fmt
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#include <linux/cpufeature.h>
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#include <asm/coco.h>
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#include <asm/tdx.h>
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#include <asm/vmx.h>
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#include <asm/insn.h>
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#include <asm/insn-eval.h>
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#include <asm/pgtable.h>
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/* TDX module Call Leaf IDs */
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#define TDX_GET_INFO 1
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#define TDX_GET_VEINFO 3
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#define TDX_ACCEPT_PAGE 6
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/* TDX hypercall Leaf IDs */
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#define TDVMCALL_MAP_GPA 0x10001
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/* MMIO direction */
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#define EPT_READ 0
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#define EPT_WRITE 1
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/* Port I/O direction */
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#define PORT_READ 0
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#define PORT_WRITE 1
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/* See Exit Qualification for I/O Instructions in VMX documentation */
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#define VE_IS_IO_IN(e) ((e) & BIT(3))
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#define VE_GET_IO_SIZE(e) (((e) & GENMASK(2, 0)) + 1)
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#define VE_GET_PORT_NUM(e) ((e) >> 16)
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#define VE_IS_IO_STRING(e) ((e) & BIT(4))
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#define ATTR_SEPT_VE_DISABLE BIT(28)
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/*
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* Wrapper for standard use of __tdx_hypercall with no output aside from
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* return code.
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*/
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static inline u64 _tdx_hypercall(u64 fn, u64 r12, u64 r13, u64 r14, u64 r15)
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{
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struct tdx_hypercall_args args = {
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.r10 = TDX_HYPERCALL_STANDARD,
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.r11 = fn,
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.r12 = r12,
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.r13 = r13,
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.r14 = r14,
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.r15 = r15,
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};
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return __tdx_hypercall(&args, 0);
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}
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/* Called from __tdx_hypercall() for unrecoverable failure */
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void __tdx_hypercall_failed(void)
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{
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panic("TDVMCALL failed. TDX module bug?");
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}
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/*
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* The TDG.VP.VMCALL-Instruction-execution sub-functions are defined
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* independently from but are currently matched 1:1 with VMX EXIT_REASONs.
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* Reusing the KVM EXIT_REASON macros makes it easier to connect the host and
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* guest sides of these calls.
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*/
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static u64 hcall_func(u64 exit_reason)
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{
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return exit_reason;
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}
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#ifdef CONFIG_KVM_GUEST
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long tdx_kvm_hypercall(unsigned int nr, unsigned long p1, unsigned long p2,
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unsigned long p3, unsigned long p4)
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{
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struct tdx_hypercall_args args = {
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.r10 = nr,
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.r11 = p1,
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.r12 = p2,
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.r13 = p3,
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.r14 = p4,
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};
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return __tdx_hypercall(&args, 0);
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}
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EXPORT_SYMBOL_GPL(tdx_kvm_hypercall);
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#endif
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/*
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* Used for TDX guests to make calls directly to the TD module. This
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* should only be used for calls that have no legitimate reason to fail
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* or where the kernel can not survive the call failing.
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*/
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static inline void tdx_module_call(u64 fn, u64 rcx, u64 rdx, u64 r8, u64 r9,
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struct tdx_module_output *out)
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{
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if (__tdx_module_call(fn, rcx, rdx, r8, r9, out))
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panic("TDCALL %lld failed (Buggy TDX module!)\n", fn);
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}
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static void tdx_parse_tdinfo(u64 *cc_mask)
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{
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struct tdx_module_output out;
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unsigned int gpa_width;
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u64 td_attr;
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/*
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* TDINFO TDX module call is used to get the TD execution environment
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* information like GPA width, number of available vcpus, debug mode
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* information, etc. More details about the ABI can be found in TDX
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* Guest-Host-Communication Interface (GHCI), section 2.4.2 TDCALL
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* [TDG.VP.INFO].
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*/
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tdx_module_call(TDX_GET_INFO, 0, 0, 0, 0, &out);
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/*
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* The highest bit of a guest physical address is the "sharing" bit.
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* Set it for shared pages and clear it for private pages.
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*
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* The GPA width that comes out of this call is critical. TDX guests
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* can not meaningfully run without it.
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*/
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gpa_width = out.rcx & GENMASK(5, 0);
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*cc_mask = BIT_ULL(gpa_width - 1);
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/*
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* The kernel can not handle #VE's when accessing normal kernel
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* memory. Ensure that no #VE will be delivered for accesses to
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* TD-private memory. Only VMM-shared memory (MMIO) will #VE.
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*/
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td_attr = out.rdx;
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if (!(td_attr & ATTR_SEPT_VE_DISABLE))
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panic("TD misconfiguration: SEPT_VE_DISABLE attibute must be set.\n");
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}
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/*
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* The TDX module spec states that #VE may be injected for a limited set of
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* reasons:
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*
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* - Emulation of the architectural #VE injection on EPT violation;
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*
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* - As a result of guest TD execution of a disallowed instruction,
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* a disallowed MSR access, or CPUID virtualization;
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*
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* - A notification to the guest TD about anomalous behavior;
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*
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* The last one is opt-in and is not used by the kernel.
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*
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* The Intel Software Developer's Manual describes cases when instruction
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* length field can be used in section "Information for VM Exits Due to
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* Instruction Execution".
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*
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* For TDX, it ultimately means GET_VEINFO provides reliable instruction length
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* information if #VE occurred due to instruction execution, but not for EPT
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* violations.
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*/
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static int ve_instr_len(struct ve_info *ve)
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{
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switch (ve->exit_reason) {
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case EXIT_REASON_HLT:
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case EXIT_REASON_MSR_READ:
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case EXIT_REASON_MSR_WRITE:
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case EXIT_REASON_CPUID:
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case EXIT_REASON_IO_INSTRUCTION:
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/* It is safe to use ve->instr_len for #VE due instructions */
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return ve->instr_len;
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case EXIT_REASON_EPT_VIOLATION:
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/*
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* For EPT violations, ve->insn_len is not defined. For those,
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* the kernel must decode instructions manually and should not
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* be using this function.
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*/
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WARN_ONCE(1, "ve->instr_len is not defined for EPT violations");
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return 0;
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default:
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WARN_ONCE(1, "Unexpected #VE-type: %lld\n", ve->exit_reason);
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return ve->instr_len;
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}
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}
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static u64 __cpuidle __halt(const bool irq_disabled, const bool do_sti)
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{
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struct tdx_hypercall_args args = {
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.r10 = TDX_HYPERCALL_STANDARD,
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.r11 = hcall_func(EXIT_REASON_HLT),
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.r12 = irq_disabled,
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};
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/*
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* Emulate HLT operation via hypercall. More info about ABI
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* can be found in TDX Guest-Host-Communication Interface
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* (GHCI), section 3.8 TDG.VP.VMCALL<Instruction.HLT>.
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*
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* The VMM uses the "IRQ disabled" param to understand IRQ
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* enabled status (RFLAGS.IF) of the TD guest and to determine
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* whether or not it should schedule the halted vCPU if an
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* IRQ becomes pending. E.g. if IRQs are disabled, the VMM
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* can keep the vCPU in virtual HLT, even if an IRQ is
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* pending, without hanging/breaking the guest.
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*/
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return __tdx_hypercall(&args, do_sti ? TDX_HCALL_ISSUE_STI : 0);
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}
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static int handle_halt(struct ve_info *ve)
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{
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/*
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* Since non safe halt is mainly used in CPU offlining
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* and the guest will always stay in the halt state, don't
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* call the STI instruction (set do_sti as false).
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*/
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const bool irq_disabled = irqs_disabled();
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const bool do_sti = false;
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if (__halt(irq_disabled, do_sti))
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return -EIO;
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return ve_instr_len(ve);
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}
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void __cpuidle tdx_safe_halt(void)
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{
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/*
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* For do_sti=true case, __tdx_hypercall() function enables
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* interrupts using the STI instruction before the TDCALL. So
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* set irq_disabled as false.
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*/
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const bool irq_disabled = false;
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const bool do_sti = true;
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/*
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* Use WARN_ONCE() to report the failure.
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*/
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if (__halt(irq_disabled, do_sti))
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WARN_ONCE(1, "HLT instruction emulation failed\n");
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}
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static int read_msr(struct pt_regs *regs, struct ve_info *ve)
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{
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struct tdx_hypercall_args args = {
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.r10 = TDX_HYPERCALL_STANDARD,
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.r11 = hcall_func(EXIT_REASON_MSR_READ),
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.r12 = regs->cx,
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};
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/*
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* Emulate the MSR read via hypercall. More info about ABI
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* can be found in TDX Guest-Host-Communication Interface
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* (GHCI), section titled "TDG.VP.VMCALL<Instruction.RDMSR>".
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*/
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if (__tdx_hypercall(&args, TDX_HCALL_HAS_OUTPUT))
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return -EIO;
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regs->ax = lower_32_bits(args.r11);
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regs->dx = upper_32_bits(args.r11);
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return ve_instr_len(ve);
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}
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static int write_msr(struct pt_regs *regs, struct ve_info *ve)
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{
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struct tdx_hypercall_args args = {
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.r10 = TDX_HYPERCALL_STANDARD,
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.r11 = hcall_func(EXIT_REASON_MSR_WRITE),
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.r12 = regs->cx,
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.r13 = (u64)regs->dx << 32 | regs->ax,
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};
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/*
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* Emulate the MSR write via hypercall. More info about ABI
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* can be found in TDX Guest-Host-Communication Interface
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* (GHCI) section titled "TDG.VP.VMCALL<Instruction.WRMSR>".
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*/
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if (__tdx_hypercall(&args, 0))
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return -EIO;
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return ve_instr_len(ve);
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}
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static int handle_cpuid(struct pt_regs *regs, struct ve_info *ve)
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{
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struct tdx_hypercall_args args = {
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.r10 = TDX_HYPERCALL_STANDARD,
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.r11 = hcall_func(EXIT_REASON_CPUID),
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.r12 = regs->ax,
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.r13 = regs->cx,
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};
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/*
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* Only allow VMM to control range reserved for hypervisor
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* communication.
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*
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* Return all-zeros for any CPUID outside the range. It matches CPU
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* behaviour for non-supported leaf.
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*/
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if (regs->ax < 0x40000000 || regs->ax > 0x4FFFFFFF) {
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regs->ax = regs->bx = regs->cx = regs->dx = 0;
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return ve_instr_len(ve);
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}
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/*
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* Emulate the CPUID instruction via a hypercall. More info about
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* ABI can be found in TDX Guest-Host-Communication Interface
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* (GHCI), section titled "VP.VMCALL<Instruction.CPUID>".
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*/
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if (__tdx_hypercall(&args, TDX_HCALL_HAS_OUTPUT))
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return -EIO;
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/*
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* As per TDX GHCI CPUID ABI, r12-r15 registers contain contents of
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* EAX, EBX, ECX, EDX registers after the CPUID instruction execution.
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* So copy the register contents back to pt_regs.
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*/
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regs->ax = args.r12;
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regs->bx = args.r13;
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regs->cx = args.r14;
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regs->dx = args.r15;
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return ve_instr_len(ve);
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}
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static bool mmio_read(int size, unsigned long addr, unsigned long *val)
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{
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struct tdx_hypercall_args args = {
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.r10 = TDX_HYPERCALL_STANDARD,
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.r11 = hcall_func(EXIT_REASON_EPT_VIOLATION),
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.r12 = size,
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.r13 = EPT_READ,
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.r14 = addr,
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.r15 = *val,
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};
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if (__tdx_hypercall(&args, TDX_HCALL_HAS_OUTPUT))
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return false;
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*val = args.r11;
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return true;
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}
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static bool mmio_write(int size, unsigned long addr, unsigned long val)
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{
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return !_tdx_hypercall(hcall_func(EXIT_REASON_EPT_VIOLATION), size,
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EPT_WRITE, addr, val);
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}
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static int handle_mmio(struct pt_regs *regs, struct ve_info *ve)
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{
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unsigned long *reg, val, vaddr;
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char buffer[MAX_INSN_SIZE];
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struct insn insn = {};
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enum mmio_type mmio;
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int size, extend_size;
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u8 extend_val = 0;
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/* Only in-kernel MMIO is supported */
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if (WARN_ON_ONCE(user_mode(regs)))
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return -EFAULT;
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if (copy_from_kernel_nofault(buffer, (void *)regs->ip, MAX_INSN_SIZE))
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return -EFAULT;
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if (insn_decode(&insn, buffer, MAX_INSN_SIZE, INSN_MODE_64))
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return -EINVAL;
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mmio = insn_decode_mmio(&insn, &size);
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if (WARN_ON_ONCE(mmio == MMIO_DECODE_FAILED))
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return -EINVAL;
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if (mmio != MMIO_WRITE_IMM && mmio != MMIO_MOVS) {
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reg = insn_get_modrm_reg_ptr(&insn, regs);
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if (!reg)
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return -EINVAL;
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}
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/*
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* Reject EPT violation #VEs that split pages.
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*
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* MMIO accesses are supposed to be naturally aligned and therefore
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* never cross page boundaries. Seeing split page accesses indicates
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* a bug or a load_unaligned_zeropad() that stepped into an MMIO page.
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*
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* load_unaligned_zeropad() will recover using exception fixups.
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*/
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vaddr = (unsigned long)insn_get_addr_ref(&insn, regs);
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if (vaddr / PAGE_SIZE != (vaddr + size - 1) / PAGE_SIZE)
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return -EFAULT;
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/* Handle writes first */
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switch (mmio) {
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case MMIO_WRITE:
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memcpy(&val, reg, size);
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if (!mmio_write(size, ve->gpa, val))
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return -EIO;
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return insn.length;
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case MMIO_WRITE_IMM:
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val = insn.immediate.value;
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if (!mmio_write(size, ve->gpa, val))
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return -EIO;
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return insn.length;
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case MMIO_READ:
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case MMIO_READ_ZERO_EXTEND:
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case MMIO_READ_SIGN_EXTEND:
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/* Reads are handled below */
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break;
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case MMIO_MOVS:
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case MMIO_DECODE_FAILED:
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/*
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* MMIO was accessed with an instruction that could not be
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* decoded or handled properly. It was likely not using io.h
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* helpers or accessed MMIO accidentally.
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*/
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return -EINVAL;
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default:
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WARN_ONCE(1, "Unknown insn_decode_mmio() decode value?");
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return -EINVAL;
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}
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/* Handle reads */
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if (!mmio_read(size, ve->gpa, &val))
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return -EIO;
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switch (mmio) {
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case MMIO_READ:
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/* Zero-extend for 32-bit operation */
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extend_size = size == 4 ? sizeof(*reg) : 0;
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break;
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case MMIO_READ_ZERO_EXTEND:
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/* Zero extend based on operand size */
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extend_size = insn.opnd_bytes;
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break;
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case MMIO_READ_SIGN_EXTEND:
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/* Sign extend based on operand size */
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extend_size = insn.opnd_bytes;
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if (size == 1 && val & BIT(7))
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extend_val = 0xFF;
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else if (size > 1 && val & BIT(15))
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extend_val = 0xFF;
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break;
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default:
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/* All other cases has to be covered with the first switch() */
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WARN_ON_ONCE(1);
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return -EINVAL;
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}
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if (extend_size)
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memset(reg, extend_val, extend_size);
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memcpy(reg, &val, size);
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return insn.length;
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}
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static bool handle_in(struct pt_regs *regs, int size, int port)
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{
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struct tdx_hypercall_args args = {
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.r10 = TDX_HYPERCALL_STANDARD,
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.r11 = hcall_func(EXIT_REASON_IO_INSTRUCTION),
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.r12 = size,
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.r13 = PORT_READ,
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.r14 = port,
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};
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u64 mask = GENMASK(BITS_PER_BYTE * size, 0);
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bool success;
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/*
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* Emulate the I/O read via hypercall. More info about ABI can be found
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* in TDX Guest-Host-Communication Interface (GHCI) section titled
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* "TDG.VP.VMCALL<Instruction.IO>".
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*/
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success = !__tdx_hypercall(&args, TDX_HCALL_HAS_OUTPUT);
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/* Update part of the register affected by the emulated instruction */
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regs->ax &= ~mask;
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if (success)
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regs->ax |= args.r11 & mask;
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return success;
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}
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static bool handle_out(struct pt_regs *regs, int size, int port)
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{
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u64 mask = GENMASK(BITS_PER_BYTE * size, 0);
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/*
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* Emulate the I/O write via hypercall. More info about ABI can be found
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* in TDX Guest-Host-Communication Interface (GHCI) section titled
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* "TDG.VP.VMCALL<Instruction.IO>".
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*/
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return !_tdx_hypercall(hcall_func(EXIT_REASON_IO_INSTRUCTION), size,
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PORT_WRITE, port, regs->ax & mask);
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}
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/*
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* Emulate I/O using hypercall.
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*
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* Assumes the IO instruction was using ax, which is enforced
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* by the standard io.h macros.
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*
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* Return True on success or False on failure.
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*/
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static int handle_io(struct pt_regs *regs, struct ve_info *ve)
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{
|
|
u32 exit_qual = ve->exit_qual;
|
|
int size, port;
|
|
bool in, ret;
|
|
|
|
if (VE_IS_IO_STRING(exit_qual))
|
|
return -EIO;
|
|
|
|
in = VE_IS_IO_IN(exit_qual);
|
|
size = VE_GET_IO_SIZE(exit_qual);
|
|
port = VE_GET_PORT_NUM(exit_qual);
|
|
|
|
|
|
if (in)
|
|
ret = handle_in(regs, size, port);
|
|
else
|
|
ret = handle_out(regs, size, port);
|
|
if (!ret)
|
|
return -EIO;
|
|
|
|
return ve_instr_len(ve);
|
|
}
|
|
|
|
/*
|
|
* Early #VE exception handler. Only handles a subset of port I/O.
|
|
* Intended only for earlyprintk. If failed, return false.
|
|
*/
|
|
__init bool tdx_early_handle_ve(struct pt_regs *regs)
|
|
{
|
|
struct ve_info ve;
|
|
int insn_len;
|
|
|
|
tdx_get_ve_info(&ve);
|
|
|
|
if (ve.exit_reason != EXIT_REASON_IO_INSTRUCTION)
|
|
return false;
|
|
|
|
insn_len = handle_io(regs, &ve);
|
|
if (insn_len < 0)
|
|
return false;
|
|
|
|
regs->ip += insn_len;
|
|
return true;
|
|
}
|
|
|
|
void tdx_get_ve_info(struct ve_info *ve)
|
|
{
|
|
struct tdx_module_output out;
|
|
|
|
/*
|
|
* Called during #VE handling to retrieve the #VE info from the
|
|
* TDX module.
|
|
*
|
|
* This has to be called early in #VE handling. A "nested" #VE which
|
|
* occurs before this will raise a #DF and is not recoverable.
|
|
*
|
|
* The call retrieves the #VE info from the TDX module, which also
|
|
* clears the "#VE valid" flag. This must be done before anything else
|
|
* because any #VE that occurs while the valid flag is set will lead to
|
|
* #DF.
|
|
*
|
|
* Note, the TDX module treats virtual NMIs as inhibited if the #VE
|
|
* valid flag is set. It means that NMI=>#VE will not result in a #DF.
|
|
*/
|
|
tdx_module_call(TDX_GET_VEINFO, 0, 0, 0, 0, &out);
|
|
|
|
/* Transfer the output parameters */
|
|
ve->exit_reason = out.rcx;
|
|
ve->exit_qual = out.rdx;
|
|
ve->gla = out.r8;
|
|
ve->gpa = out.r9;
|
|
ve->instr_len = lower_32_bits(out.r10);
|
|
ve->instr_info = upper_32_bits(out.r10);
|
|
}
|
|
|
|
/*
|
|
* Handle the user initiated #VE.
|
|
*
|
|
* On success, returns the number of bytes RIP should be incremented (>=0)
|
|
* or -errno on error.
|
|
*/
|
|
static int virt_exception_user(struct pt_regs *regs, struct ve_info *ve)
|
|
{
|
|
switch (ve->exit_reason) {
|
|
case EXIT_REASON_CPUID:
|
|
return handle_cpuid(regs, ve);
|
|
default:
|
|
pr_warn("Unexpected #VE: %lld\n", ve->exit_reason);
|
|
return -EIO;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Handle the kernel #VE.
|
|
*
|
|
* On success, returns the number of bytes RIP should be incremented (>=0)
|
|
* or -errno on error.
|
|
*/
|
|
static int virt_exception_kernel(struct pt_regs *regs, struct ve_info *ve)
|
|
{
|
|
switch (ve->exit_reason) {
|
|
case EXIT_REASON_HLT:
|
|
return handle_halt(ve);
|
|
case EXIT_REASON_MSR_READ:
|
|
return read_msr(regs, ve);
|
|
case EXIT_REASON_MSR_WRITE:
|
|
return write_msr(regs, ve);
|
|
case EXIT_REASON_CPUID:
|
|
return handle_cpuid(regs, ve);
|
|
case EXIT_REASON_EPT_VIOLATION:
|
|
return handle_mmio(regs, ve);
|
|
case EXIT_REASON_IO_INSTRUCTION:
|
|
return handle_io(regs, ve);
|
|
default:
|
|
pr_warn("Unexpected #VE: %lld\n", ve->exit_reason);
|
|
return -EIO;
|
|
}
|
|
}
|
|
|
|
bool tdx_handle_virt_exception(struct pt_regs *regs, struct ve_info *ve)
|
|
{
|
|
int insn_len;
|
|
|
|
if (user_mode(regs))
|
|
insn_len = virt_exception_user(regs, ve);
|
|
else
|
|
insn_len = virt_exception_kernel(regs, ve);
|
|
if (insn_len < 0)
|
|
return false;
|
|
|
|
/* After successful #VE handling, move the IP */
|
|
regs->ip += insn_len;
|
|
|
|
return true;
|
|
}
|
|
|
|
static bool tdx_tlb_flush_required(bool private)
|
|
{
|
|
/*
|
|
* TDX guest is responsible for flushing TLB on private->shared
|
|
* transition. VMM is responsible for flushing on shared->private.
|
|
*
|
|
* The VMM _can't_ flush private addresses as it can't generate PAs
|
|
* with the guest's HKID. Shared memory isn't subject to integrity
|
|
* checking, i.e. the VMM doesn't need to flush for its own protection.
|
|
*
|
|
* There's no need to flush when converting from shared to private,
|
|
* as flushing is the VMM's responsibility in this case, e.g. it must
|
|
* flush to avoid integrity failures in the face of a buggy or
|
|
* malicious guest.
|
|
*/
|
|
return !private;
|
|
}
|
|
|
|
static bool tdx_cache_flush_required(void)
|
|
{
|
|
/*
|
|
* AMD SME/SEV can avoid cache flushing if HW enforces cache coherence.
|
|
* TDX doesn't have such capability.
|
|
*
|
|
* Flush cache unconditionally.
|
|
*/
|
|
return true;
|
|
}
|
|
|
|
static bool try_accept_one(phys_addr_t *start, unsigned long len,
|
|
enum pg_level pg_level)
|
|
{
|
|
unsigned long accept_size = page_level_size(pg_level);
|
|
u64 tdcall_rcx;
|
|
u8 page_size;
|
|
|
|
if (!IS_ALIGNED(*start, accept_size))
|
|
return false;
|
|
|
|
if (len < accept_size)
|
|
return false;
|
|
|
|
/*
|
|
* Pass the page physical address to the TDX module to accept the
|
|
* pending, private page.
|
|
*
|
|
* Bits 2:0 of RCX encode page size: 0 - 4K, 1 - 2M, 2 - 1G.
|
|
*/
|
|
switch (pg_level) {
|
|
case PG_LEVEL_4K:
|
|
page_size = 0;
|
|
break;
|
|
case PG_LEVEL_2M:
|
|
page_size = 1;
|
|
break;
|
|
case PG_LEVEL_1G:
|
|
page_size = 2;
|
|
break;
|
|
default:
|
|
return false;
|
|
}
|
|
|
|
tdcall_rcx = *start | page_size;
|
|
if (__tdx_module_call(TDX_ACCEPT_PAGE, tdcall_rcx, 0, 0, 0, NULL))
|
|
return false;
|
|
|
|
*start += accept_size;
|
|
return true;
|
|
}
|
|
|
|
/*
|
|
* Inform the VMM of the guest's intent for this physical page: shared with
|
|
* the VMM or private to the guest. The VMM is expected to change its mapping
|
|
* of the page in response.
|
|
*/
|
|
static bool tdx_enc_status_changed(unsigned long vaddr, int numpages, bool enc)
|
|
{
|
|
phys_addr_t start = __pa(vaddr);
|
|
phys_addr_t end = __pa(vaddr + numpages * PAGE_SIZE);
|
|
|
|
if (!enc) {
|
|
/* Set the shared (decrypted) bits: */
|
|
start |= cc_mkdec(0);
|
|
end |= cc_mkdec(0);
|
|
}
|
|
|
|
/*
|
|
* Notify the VMM about page mapping conversion. More info about ABI
|
|
* can be found in TDX Guest-Host-Communication Interface (GHCI),
|
|
* section "TDG.VP.VMCALL<MapGPA>"
|
|
*/
|
|
if (_tdx_hypercall(TDVMCALL_MAP_GPA, start, end - start, 0, 0))
|
|
return false;
|
|
|
|
/* private->shared conversion requires only MapGPA call */
|
|
if (!enc)
|
|
return true;
|
|
|
|
/*
|
|
* For shared->private conversion, accept the page using
|
|
* TDX_ACCEPT_PAGE TDX module call.
|
|
*/
|
|
while (start < end) {
|
|
unsigned long len = end - start;
|
|
|
|
/*
|
|
* Try larger accepts first. It gives chance to VMM to keep
|
|
* 1G/2M SEPT entries where possible and speeds up process by
|
|
* cutting number of hypercalls (if successful).
|
|
*/
|
|
|
|
if (try_accept_one(&start, len, PG_LEVEL_1G))
|
|
continue;
|
|
|
|
if (try_accept_one(&start, len, PG_LEVEL_2M))
|
|
continue;
|
|
|
|
if (!try_accept_one(&start, len, PG_LEVEL_4K))
|
|
return false;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
static bool tdx_enc_status_change_prepare(unsigned long vaddr, int numpages,
|
|
bool enc)
|
|
{
|
|
/*
|
|
* Only handle shared->private conversion here.
|
|
* See the comment in tdx_early_init().
|
|
*/
|
|
if (enc)
|
|
return tdx_enc_status_changed(vaddr, numpages, enc);
|
|
return true;
|
|
}
|
|
|
|
static bool tdx_enc_status_change_finish(unsigned long vaddr, int numpages,
|
|
bool enc)
|
|
{
|
|
/*
|
|
* Only handle private->shared conversion here.
|
|
* See the comment in tdx_early_init().
|
|
*/
|
|
if (!enc)
|
|
return tdx_enc_status_changed(vaddr, numpages, enc);
|
|
return true;
|
|
}
|
|
|
|
void __init tdx_early_init(void)
|
|
{
|
|
u64 cc_mask;
|
|
u32 eax, sig[3];
|
|
|
|
cpuid_count(TDX_CPUID_LEAF_ID, 0, &eax, &sig[0], &sig[2], &sig[1]);
|
|
|
|
if (memcmp(TDX_IDENT, sig, sizeof(sig)))
|
|
return;
|
|
|
|
setup_force_cpu_cap(X86_FEATURE_TDX_GUEST);
|
|
|
|
cc_set_vendor(CC_VENDOR_INTEL);
|
|
tdx_parse_tdinfo(&cc_mask);
|
|
cc_set_mask(cc_mask);
|
|
|
|
/*
|
|
* All bits above GPA width are reserved and kernel treats shared bit
|
|
* as flag, not as part of physical address.
|
|
*
|
|
* Adjust physical mask to only cover valid GPA bits.
|
|
*/
|
|
physical_mask &= cc_mask - 1;
|
|
|
|
/*
|
|
* The kernel mapping should match the TDX metadata for the page.
|
|
* load_unaligned_zeropad() can touch memory *adjacent* to that which is
|
|
* owned by the caller and can catch even _momentary_ mismatches. Bad
|
|
* things happen on mismatch:
|
|
*
|
|
* - Private mapping => Shared Page == Guest shutdown
|
|
* - Shared mapping => Private Page == Recoverable #VE
|
|
*
|
|
* guest.enc_status_change_prepare() converts the page from
|
|
* shared=>private before the mapping becomes private.
|
|
*
|
|
* guest.enc_status_change_finish() converts the page from
|
|
* private=>shared after the mapping becomes private.
|
|
*
|
|
* In both cases there is a temporary shared mapping to a private page,
|
|
* which can result in a #VE. But, there is never a private mapping to
|
|
* a shared page.
|
|
*/
|
|
x86_platform.guest.enc_status_change_prepare = tdx_enc_status_change_prepare;
|
|
x86_platform.guest.enc_status_change_finish = tdx_enc_status_change_finish;
|
|
|
|
x86_platform.guest.enc_cache_flush_required = tdx_cache_flush_required;
|
|
x86_platform.guest.enc_tlb_flush_required = tdx_tlb_flush_required;
|
|
|
|
pr_info("Guest detected\n");
|
|
}
|