169 lines
4.5 KiB
C
169 lines
4.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Linux/PA-RISC Project (http://www.parisc-linux.org/)
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*
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* Floating-point emulation code
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* Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
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*/
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/*
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* BEGIN_DESC
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*
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* File:
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* @(#) pa/spmath/dfcmp.c $Revision: 1.1 $
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*
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* Purpose:
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* dbl_cmp: compare two values
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*
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* External Interfaces:
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* dbl_fcmp(leftptr, rightptr, cond, status)
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*
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* Internal Interfaces:
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*
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* Theory:
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* <<please update with a overview of the operation of this file>>
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*
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* END_DESC
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*/
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#include "float.h"
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#include "dbl_float.h"
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/*
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* dbl_cmp: compare two values
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*/
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int
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dbl_fcmp (dbl_floating_point * leftptr, dbl_floating_point * rightptr,
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unsigned int cond, unsigned int *status)
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/* The predicate to be tested */
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{
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register unsigned int leftp1, leftp2, rightp1, rightp2;
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register int xorresult;
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/* Create local copies of the numbers */
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Dbl_copyfromptr(leftptr,leftp1,leftp2);
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Dbl_copyfromptr(rightptr,rightp1,rightp2);
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/*
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* Test for NaN
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*/
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if( (Dbl_exponent(leftp1) == DBL_INFINITY_EXPONENT)
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|| (Dbl_exponent(rightp1) == DBL_INFINITY_EXPONENT) )
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{
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/* Check if a NaN is involved. Signal an invalid exception when
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* comparing a signaling NaN or when comparing quiet NaNs and the
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* low bit of the condition is set */
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if( ((Dbl_exponent(leftp1) == DBL_INFINITY_EXPONENT)
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&& Dbl_isnotzero_mantissa(leftp1,leftp2)
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&& (Exception(cond) || Dbl_isone_signaling(leftp1)))
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||
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((Dbl_exponent(rightp1) == DBL_INFINITY_EXPONENT)
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&& Dbl_isnotzero_mantissa(rightp1,rightp2)
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&& (Exception(cond) || Dbl_isone_signaling(rightp1))) )
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{
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if( Is_invalidtrap_enabled() ) {
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Set_status_cbit(Unordered(cond));
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return(INVALIDEXCEPTION);
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}
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else Set_invalidflag();
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Set_status_cbit(Unordered(cond));
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return(NOEXCEPTION);
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}
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/* All the exceptional conditions are handled, now special case
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NaN compares */
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else if( ((Dbl_exponent(leftp1) == DBL_INFINITY_EXPONENT)
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&& Dbl_isnotzero_mantissa(leftp1,leftp2))
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||
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((Dbl_exponent(rightp1) == DBL_INFINITY_EXPONENT)
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&& Dbl_isnotzero_mantissa(rightp1,rightp2)) )
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{
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/* NaNs always compare unordered. */
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Set_status_cbit(Unordered(cond));
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return(NOEXCEPTION);
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}
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/* infinities will drop down to the normal compare mechanisms */
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}
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/* First compare for unequal signs => less or greater or
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* special equal case */
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Dbl_xortointp1(leftp1,rightp1,xorresult);
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if( xorresult < 0 )
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{
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/* left negative => less, left positive => greater.
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* equal is possible if both operands are zeros. */
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if( Dbl_iszero_exponentmantissa(leftp1,leftp2)
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&& Dbl_iszero_exponentmantissa(rightp1,rightp2) )
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{
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Set_status_cbit(Equal(cond));
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}
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else if( Dbl_isone_sign(leftp1) )
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{
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Set_status_cbit(Lessthan(cond));
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}
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else
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{
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Set_status_cbit(Greaterthan(cond));
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}
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}
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/* Signs are the same. Treat negative numbers separately
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* from the positives because of the reversed sense. */
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else if(Dbl_isequal(leftp1,leftp2,rightp1,rightp2))
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{
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Set_status_cbit(Equal(cond));
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}
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else if( Dbl_iszero_sign(leftp1) )
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{
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/* Positive compare */
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if( Dbl_allp1(leftp1) < Dbl_allp1(rightp1) )
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{
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Set_status_cbit(Lessthan(cond));
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}
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else if( Dbl_allp1(leftp1) > Dbl_allp1(rightp1) )
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{
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Set_status_cbit(Greaterthan(cond));
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}
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else
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{
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/* Equal first parts. Now we must use unsigned compares to
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* resolve the two possibilities. */
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if( Dbl_allp2(leftp2) < Dbl_allp2(rightp2) )
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{
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Set_status_cbit(Lessthan(cond));
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}
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else
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{
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Set_status_cbit(Greaterthan(cond));
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}
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}
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}
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else
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{
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/* Negative compare. Signed or unsigned compares
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* both work the same. That distinction is only
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* important when the sign bits differ. */
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if( Dbl_allp1(leftp1) > Dbl_allp1(rightp1) )
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{
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Set_status_cbit(Lessthan(cond));
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}
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else if( Dbl_allp1(leftp1) < Dbl_allp1(rightp1) )
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{
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Set_status_cbit(Greaterthan(cond));
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}
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else
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{
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/* Equal first parts. Now we must use unsigned compares to
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* resolve the two possibilities. */
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if( Dbl_allp2(leftp2) > Dbl_allp2(rightp2) )
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{
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Set_status_cbit(Lessthan(cond));
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}
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else
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{
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Set_status_cbit(Greaterthan(cond));
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}
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}
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}
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return(NOEXCEPTION);
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}
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