181 lines
3.9 KiB
C
181 lines
3.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Author: Jianmin Lv <lvjianmin@loongson.cn>
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* Huacai Chen <chenhuacai@loongson.cn>
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
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#ifndef _ASM_LOONGARCH_ACPI_H
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#define _ASM_LOONGARCH_ACPI_H
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#ifdef CONFIG_ACPI
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extern int acpi_strict;
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extern int acpi_disabled;
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extern int acpi_pci_disabled;
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extern int acpi_noirq;
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#define acpi_os_ioremap acpi_os_ioremap
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void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size);
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static inline void disable_acpi(void)
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{
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acpi_disabled = 1;
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acpi_pci_disabled = 1;
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acpi_noirq = 1;
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}
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static inline bool acpi_has_cpu_in_madt(void)
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{
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return true;
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}
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extern struct list_head acpi_wakeup_device_list;
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/*
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* Temporary definitions until the core ACPICA code gets updated (see
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* 1656837932-18257-1-git-send-email-lvjianmin@loongson.cn and its
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* follow-ups for the "rationale").
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*
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* Once the "legal reasons" are cleared and that the code is merged,
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* this can be dropped entierely.
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*/
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#if (ACPI_CA_VERSION == 0x20220331 && !defined(LOONGARCH_ACPICA_EXT))
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#define LOONGARCH_ACPICA_EXT 1
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#define ACPI_MADT_TYPE_CORE_PIC 17
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#define ACPI_MADT_TYPE_LIO_PIC 18
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#define ACPI_MADT_TYPE_HT_PIC 19
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#define ACPI_MADT_TYPE_EIO_PIC 20
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#define ACPI_MADT_TYPE_MSI_PIC 21
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#define ACPI_MADT_TYPE_BIO_PIC 22
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#define ACPI_MADT_TYPE_LPC_PIC 23
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/* Values for Version field above */
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enum acpi_madt_core_pic_version {
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ACPI_MADT_CORE_PIC_VERSION_NONE = 0,
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ACPI_MADT_CORE_PIC_VERSION_V1 = 1,
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ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
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};
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enum acpi_madt_lio_pic_version {
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ACPI_MADT_LIO_PIC_VERSION_NONE = 0,
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ACPI_MADT_LIO_PIC_VERSION_V1 = 1,
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ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
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};
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enum acpi_madt_eio_pic_version {
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ACPI_MADT_EIO_PIC_VERSION_NONE = 0,
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ACPI_MADT_EIO_PIC_VERSION_V1 = 1,
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ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
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};
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enum acpi_madt_ht_pic_version {
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ACPI_MADT_HT_PIC_VERSION_NONE = 0,
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ACPI_MADT_HT_PIC_VERSION_V1 = 1,
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ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
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};
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enum acpi_madt_bio_pic_version {
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ACPI_MADT_BIO_PIC_VERSION_NONE = 0,
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ACPI_MADT_BIO_PIC_VERSION_V1 = 1,
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ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
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};
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enum acpi_madt_msi_pic_version {
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ACPI_MADT_MSI_PIC_VERSION_NONE = 0,
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ACPI_MADT_MSI_PIC_VERSION_V1 = 1,
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ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
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};
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enum acpi_madt_lpc_pic_version {
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ACPI_MADT_LPC_PIC_VERSION_NONE = 0,
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ACPI_MADT_LPC_PIC_VERSION_V1 = 1,
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ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
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};
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#pragma pack(1)
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/* Core Interrupt Controller */
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struct acpi_madt_core_pic {
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struct acpi_subtable_header header;
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u8 version;
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u32 processor_id;
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u32 core_id;
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u32 flags;
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};
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/* Legacy I/O Interrupt Controller */
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struct acpi_madt_lio_pic {
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struct acpi_subtable_header header;
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u8 version;
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u64 address;
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u16 size;
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u8 cascade[2];
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u32 cascade_map[2];
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};
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/* Extend I/O Interrupt Controller */
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struct acpi_madt_eio_pic {
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struct acpi_subtable_header header;
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u8 version;
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u8 cascade;
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u8 node;
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u64 node_map;
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};
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/* HT Interrupt Controller */
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struct acpi_madt_ht_pic {
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struct acpi_subtable_header header;
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u8 version;
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u64 address;
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u16 size;
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u8 cascade[8];
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};
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/* Bridge I/O Interrupt Controller */
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struct acpi_madt_bio_pic {
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struct acpi_subtable_header header;
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u8 version;
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u64 address;
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u16 size;
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u16 id;
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u16 gsi_base;
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};
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/* MSI Interrupt Controller */
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struct acpi_madt_msi_pic {
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struct acpi_subtable_header header;
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u8 version;
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u64 msg_address;
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u32 start;
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u32 count;
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};
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/* LPC Interrupt Controller */
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struct acpi_madt_lpc_pic {
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struct acpi_subtable_header header;
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u8 version;
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u64 address;
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u16 size;
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u8 cascade;
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};
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#pragma pack()
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#endif
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#endif /* !CONFIG_ACPI */
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#define ACPI_TABLE_UPGRADE_MAX_PHYS ARCH_LOW_ADDRESS_LIMIT
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#endif /* _ASM_LOONGARCH_ACPI_H */
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