94 lines
2.9 KiB
C
94 lines
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* OMAP3 Voltage Controller (VC) data
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*
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* Copyright (C) 2007, 2010 Texas Instruments, Inc.
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* Rajendra Nayak <rnayak@ti.com>
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* Lesly A M <x0080970@ti.com>
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* Thara Gopinath <thara@ti.com>
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*
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* Copyright (C) 2008, 2011 Nokia Corporation
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* Kalle Jokiniemi
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* Paul Walmsley
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*/
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include "common.h"
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#include "prm-regbits-34xx.h"
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#include "voltage.h"
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#include "vc.h"
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/*
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* VC data common to 34xx/36xx chips
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* XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
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*/
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static struct omap_vc_common omap3_vc_common = {
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.bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET,
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.data_shift = OMAP3430_DATA_SHIFT,
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.slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT,
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.regaddr_shift = OMAP3430_REGADDR_SHIFT,
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.valid = OMAP3430_VALID_MASK,
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.cmd_on_shift = OMAP3430_VC_CMD_ON_SHIFT,
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.cmd_on_mask = OMAP3430_VC_CMD_ON_MASK,
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.cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT,
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.cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT,
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.cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT,
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.i2c_cfg_clear_mask = OMAP3430_SREN_MASK | OMAP3430_HSEN_MASK,
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.i2c_cfg_hsen_mask = OMAP3430_HSEN_MASK,
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.i2c_cfg_reg = OMAP3_PRM_VC_I2C_CFG_OFFSET,
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.i2c_mcode_mask = OMAP3430_MCODE_MASK,
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};
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struct omap_vc_channel omap3_vc_mpu = {
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.flags = OMAP_VC_CHANNEL_DEFAULT,
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.common = &omap3_vc_common,
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.smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
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.smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
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.smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
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.cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
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.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET,
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.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK,
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.smps_volra_mask = OMAP3430_VOLRA0_MASK,
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.smps_cmdra_mask = OMAP3430_CMDRA0_MASK,
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.cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT,
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};
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struct omap_vc_channel omap3_vc_core = {
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.common = &omap3_vc_common,
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.smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
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.smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
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.smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
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.cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
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.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET,
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.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK,
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.smps_volra_mask = OMAP3430_VOLRA1_MASK,
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.smps_cmdra_mask = OMAP3430_CMDRA1_MASK,
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.cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT,
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};
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/*
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* Voltage levels for different operating modes: on, sleep, retention and off
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*/
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#define OMAP3_ON_VOLTAGE_UV 1200000
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#define OMAP3_ONLP_VOLTAGE_UV 1000000
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#define OMAP3_RET_VOLTAGE_UV 975000
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#define OMAP3_OFF_VOLTAGE_UV 600000
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struct omap_vc_param omap3_mpu_vc_data = {
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.on = OMAP3_ON_VOLTAGE_UV,
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.onlp = OMAP3_ONLP_VOLTAGE_UV,
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.ret = OMAP3_RET_VOLTAGE_UV,
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.off = OMAP3_OFF_VOLTAGE_UV,
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};
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struct omap_vc_param omap3_core_vc_data = {
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.on = OMAP3_ON_VOLTAGE_UV,
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.onlp = OMAP3_ONLP_VOLTAGE_UV,
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.ret = OMAP3_RET_VOLTAGE_UV,
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.off = OMAP3_OFF_VOLTAGE_UV,
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};
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