227 lines
6.4 KiB
YAML
227 lines
6.4 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Samsung Exynos SoC HDMI
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maintainers:
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- Inki Dae <inki.dae@samsung.com>
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- Seung-Woo Kim <sw0312.kim@samsung.com>
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- Kyungmin Park <kyungmin.park@samsung.com>
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- Krzysztof Kozlowski <krzk@kernel.org>
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properties:
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compatible:
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enum:
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- samsung,exynos4210-hdmi
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- samsung,exynos4212-hdmi
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- samsung,exynos5420-hdmi
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- samsung,exynos5433-hdmi
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clocks:
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minItems: 5
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maxItems: 10
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clock-names:
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minItems: 5
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maxItems: 10
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ddc:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to the HDMI DDC node.
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hdmi-en-supply:
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description:
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Provides voltage source for DCC lines available on HDMI connector. When
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there is no power provided for DDC epprom, some TV-sets do not pulls up
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HPD (hot plug detect) line, what causes HDMI block to stay turned off.
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When provided, the regulator allows TV-set correctly signal HPD event.
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hpd-gpios:
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maxItems: 1
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description:
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A GPIO line connected to HPD
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interrupts:
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maxItems: 1
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phy:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: Phandle to the HDMI PHY node.
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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description:
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Contains a port which is connected to mic node.
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power-domains:
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maxItems: 1
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reg:
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maxItems: 1
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samsung,syscon-phandle:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to the PMU system controller node.
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samsung,sysreg-phandle:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to DISP system controller interface.
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'#sound-dai-cells':
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const: 0
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vdd-supply:
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description:
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VDD 1.0V HDMI TX.
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vdd_osc-supply:
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description:
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VDD 1.8V HDMI OSC.
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vdd_pll-supply:
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description:
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VDD 1.0V HDMI PLL.
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required:
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- compatible
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- clocks
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- clock-names
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- ddc
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- hpd-gpios
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- interrupts
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- phy
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- reg
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- samsung,syscon-phandle
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- '#sound-dai-cells'
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- vdd-supply
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- vdd_osc-supply
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- vdd_pll-supply
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: samsung,exynos5433-hdmi
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then:
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properties:
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clocks:
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items:
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- description: Gate of HDMI IP APB bus.
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- description: Gate of HDMI-PHY IP APB bus.
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- description: Gate of HDMI TMDS clock.
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- description: Gate of HDMI pixel clock.
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- description: TMDS clock generated by HDMI-PHY.
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- description: MUX used to switch between oscclk and tmds_clko,
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respectively if HDMI-PHY is off and operational.
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- description: Pixel clock generated by HDMI-PHY.
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- description: MUX used to switch between oscclk and pixel_clko,
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respectively if HDMI-PHY is off and operational.
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- description: Oscillator clock, used as parent of following *_user
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clocks in case HDMI-PHY is not operational.
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- description: Gate of HDMI SPDIF clock.
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clock-names:
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items:
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- const: hdmi_pclk
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- const: hdmi_i_pclk
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- const: i_tmds_clk
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- const: i_pixel_clk
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- const: tmds_clko
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- const: tmds_clko_user
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- const: pixel_clko
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- const: pixel_clko_user
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- const: oscclk
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- const: i_spdif_clk
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required:
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- samsung,sysreg-phandle
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else:
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properties:
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clocks:
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items:
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- description: Gate of HDMI IP bus clock.
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- description: Gate of HDMI special clock.
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- description: Pixel special clock, one of the two possible inputs
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of HDMI clock mux.
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- description: HDMI PHY clock output, one of two possible inputs of
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HDMI clock mux.
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- description: It is required by the driver to switch between the 2
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parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable
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after configuration, parent is set to sclk_hdmiphy else
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sclk_pixel.
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clock-names:
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items:
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- const: hdmi
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- const: sclk_hdmi
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- const: sclk_pixel
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- const: sclk_hdmiphy
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- const: mout_hdmi
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/exynos5433.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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hdmi@13970000 {
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compatible = "samsung,exynos5433-hdmi";
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reg = <0x13970000 0x70000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu_disp CLK_PCLK_HDMI>,
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<&cmu_disp CLK_PCLK_HDMIPHY>,
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<&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO>,
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<&cmu_disp CLK_PHYCLK_HDMI_PIXEL>,
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<&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY>,
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<&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_TMDS_CLKO_USER>,
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<&cmu_disp CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY>,
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<&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_PIXEL_CLKO_USER>,
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<&xxti>,
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<&cmu_disp CLK_SCLK_HDMI_SPDIF>;
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clock-names = "hdmi_pclk",
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"hdmi_i_pclk",
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"i_tmds_clk",
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"i_pixel_clk",
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"tmds_clko",
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"tmds_clko_user",
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"pixel_clko",
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"pixel_clko_user",
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"oscclk",
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"i_spdif_clk";
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phy = <&hdmiphy>;
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ddc = <&hsi2c_11>;
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samsung,syscon-phandle = <&pmu_system_controller>;
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samsung,sysreg-phandle = <&syscon_disp>;
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#sound-dai-cells = <0>;
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hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
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vdd-supply = <&ldo6_reg>;
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vdd_osc-supply = <&ldo7_reg>;
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vdd_pll-supply = <&ldo6_reg>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hdmi_to_tv: endpoint {
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remote-endpoint = <&tv_to_hdmi>;
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};
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};
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port@1 {
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reg = <1>;
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hdmi_to_mhl: endpoint {
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remote-endpoint = <&mhl_to_hdmi>;
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};
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};
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};
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};
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