504 lines
12 KiB
C
504 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* McBSP Sidetone support
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*
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* Copyright (C) 2004 Nokia Corporation
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* Author: Samuel Ortiz <samuel.ortiz@nokia.com>
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*
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* Contact: Jarkko Nikula <jarkko.nikula@bitmer.com>
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* Peter Ujfalusi <peter.ujfalusi@ti.com>
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/pm_runtime.h>
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#include "omap-mcbsp.h"
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#include "omap-mcbsp-priv.h"
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/* OMAP3 sidetone control registers */
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#define OMAP_ST_REG_REV 0x00
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#define OMAP_ST_REG_SYSCONFIG 0x10
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#define OMAP_ST_REG_IRQSTATUS 0x18
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#define OMAP_ST_REG_IRQENABLE 0x1C
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#define OMAP_ST_REG_SGAINCR 0x24
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#define OMAP_ST_REG_SFIRCR 0x28
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#define OMAP_ST_REG_SSELCR 0x2C
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/********************** McBSP SSELCR bit definitions ***********************/
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#define SIDETONEEN BIT(10)
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/********************** McBSP Sidetone SYSCONFIG bit definitions ***********/
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#define ST_AUTOIDLE BIT(0)
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/********************** McBSP Sidetone SGAINCR bit definitions *************/
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#define ST_CH0GAIN(value) ((value) & 0xffff) /* Bits 0:15 */
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#define ST_CH1GAIN(value) (((value) & 0xffff) << 16) /* Bits 16:31 */
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/********************** McBSP Sidetone SFIRCR bit definitions **************/
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#define ST_FIRCOEFF(value) ((value) & 0xffff) /* Bits 0:15 */
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/********************** McBSP Sidetone SSELCR bit definitions **************/
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#define ST_SIDETONEEN BIT(0)
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#define ST_COEFFWREN BIT(1)
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#define ST_COEFFWRDONE BIT(2)
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struct omap_mcbsp_st_data {
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void __iomem *io_base_st;
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struct clk *mcbsp_iclk;
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bool running;
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bool enabled;
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s16 taps[128]; /* Sidetone filter coefficients */
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int nr_taps; /* Number of filter coefficients in use */
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s16 ch0gain;
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s16 ch1gain;
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};
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static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
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{
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writel_relaxed(val, mcbsp->st_data->io_base_st + reg);
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}
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static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg)
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{
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return readl_relaxed(mcbsp->st_data->io_base_st + reg);
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}
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#define MCBSP_ST_READ(mcbsp, reg) omap_mcbsp_st_read(mcbsp, OMAP_ST_REG_##reg)
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#define MCBSP_ST_WRITE(mcbsp, reg, val) \
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omap_mcbsp_st_write(mcbsp, OMAP_ST_REG_##reg, val)
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static void omap_mcbsp_st_on(struct omap_mcbsp *mcbsp)
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{
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unsigned int w;
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if (mcbsp->pdata->force_ick_on)
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mcbsp->pdata->force_ick_on(mcbsp->st_data->mcbsp_iclk, true);
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/* Disable Sidetone clock auto-gating for normal operation */
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w = MCBSP_ST_READ(mcbsp, SYSCONFIG);
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MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w & ~(ST_AUTOIDLE));
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/* Enable McBSP Sidetone */
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w = MCBSP_READ(mcbsp, SSELCR);
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MCBSP_WRITE(mcbsp, SSELCR, w | SIDETONEEN);
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/* Enable Sidetone from Sidetone Core */
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w = MCBSP_ST_READ(mcbsp, SSELCR);
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MCBSP_ST_WRITE(mcbsp, SSELCR, w | ST_SIDETONEEN);
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}
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static void omap_mcbsp_st_off(struct omap_mcbsp *mcbsp)
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{
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unsigned int w;
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w = MCBSP_ST_READ(mcbsp, SSELCR);
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MCBSP_ST_WRITE(mcbsp, SSELCR, w & ~(ST_SIDETONEEN));
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w = MCBSP_READ(mcbsp, SSELCR);
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MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN));
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/* Enable Sidetone clock auto-gating to reduce power consumption */
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w = MCBSP_ST_READ(mcbsp, SYSCONFIG);
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MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w | ST_AUTOIDLE);
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if (mcbsp->pdata->force_ick_on)
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mcbsp->pdata->force_ick_on(mcbsp->st_data->mcbsp_iclk, false);
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}
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static void omap_mcbsp_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
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{
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u16 val, i;
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val = MCBSP_ST_READ(mcbsp, SSELCR);
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if (val & ST_COEFFWREN)
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MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN));
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MCBSP_ST_WRITE(mcbsp, SSELCR, val | ST_COEFFWREN);
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for (i = 0; i < 128; i++)
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MCBSP_ST_WRITE(mcbsp, SFIRCR, fir[i]);
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i = 0;
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val = MCBSP_ST_READ(mcbsp, SSELCR);
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while (!(val & ST_COEFFWRDONE) && (++i < 1000))
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val = MCBSP_ST_READ(mcbsp, SSELCR);
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MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN));
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if (i == 1000)
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dev_err(mcbsp->dev, "McBSP FIR load error!\n");
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}
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static void omap_mcbsp_st_chgain(struct omap_mcbsp *mcbsp)
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{
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struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
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MCBSP_ST_WRITE(mcbsp, SGAINCR, ST_CH0GAIN(st_data->ch0gain) |
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ST_CH1GAIN(st_data->ch1gain));
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}
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static int omap_mcbsp_st_set_chgain(struct omap_mcbsp *mcbsp, int channel,
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s16 chgain)
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{
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struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
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int ret = 0;
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if (!st_data)
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return -ENOENT;
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spin_lock_irq(&mcbsp->lock);
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if (channel == 0)
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st_data->ch0gain = chgain;
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else if (channel == 1)
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st_data->ch1gain = chgain;
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else
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ret = -EINVAL;
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if (st_data->enabled)
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omap_mcbsp_st_chgain(mcbsp);
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spin_unlock_irq(&mcbsp->lock);
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return ret;
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}
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static int omap_mcbsp_st_get_chgain(struct omap_mcbsp *mcbsp, int channel,
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s16 *chgain)
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{
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struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
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int ret = 0;
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if (!st_data)
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return -ENOENT;
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spin_lock_irq(&mcbsp->lock);
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if (channel == 0)
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*chgain = st_data->ch0gain;
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else if (channel == 1)
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*chgain = st_data->ch1gain;
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else
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ret = -EINVAL;
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spin_unlock_irq(&mcbsp->lock);
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return ret;
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}
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static int omap_mcbsp_st_enable(struct omap_mcbsp *mcbsp)
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{
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struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
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if (!st_data)
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return -ENODEV;
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spin_lock_irq(&mcbsp->lock);
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st_data->enabled = 1;
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omap_mcbsp_st_start(mcbsp);
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spin_unlock_irq(&mcbsp->lock);
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return 0;
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}
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static int omap_mcbsp_st_disable(struct omap_mcbsp *mcbsp)
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{
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struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
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int ret = 0;
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if (!st_data)
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return -ENODEV;
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spin_lock_irq(&mcbsp->lock);
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omap_mcbsp_st_stop(mcbsp);
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st_data->enabled = 0;
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spin_unlock_irq(&mcbsp->lock);
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return ret;
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}
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static int omap_mcbsp_st_is_enabled(struct omap_mcbsp *mcbsp)
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{
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struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
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if (!st_data)
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return -ENODEV;
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return st_data->enabled;
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}
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static ssize_t st_taps_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
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struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
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ssize_t status = 0;
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int i;
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spin_lock_irq(&mcbsp->lock);
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for (i = 0; i < st_data->nr_taps; i++)
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status += sysfs_emit_at(buf, status, (i ? ", %d" : "%d"),
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st_data->taps[i]);
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if (i)
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status += sysfs_emit_at(buf, status, "\n");
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spin_unlock_irq(&mcbsp->lock);
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return status;
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}
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static ssize_t st_taps_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t size)
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{
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struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
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struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
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int val, tmp, status, i = 0;
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spin_lock_irq(&mcbsp->lock);
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memset(st_data->taps, 0, sizeof(st_data->taps));
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st_data->nr_taps = 0;
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do {
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status = sscanf(buf, "%d%n", &val, &tmp);
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if (status < 0 || status == 0) {
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size = -EINVAL;
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goto out;
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}
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if (val < -32768 || val > 32767) {
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size = -EINVAL;
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goto out;
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}
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st_data->taps[i++] = val;
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buf += tmp;
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if (*buf != ',')
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break;
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buf++;
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} while (1);
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st_data->nr_taps = i;
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out:
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spin_unlock_irq(&mcbsp->lock);
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return size;
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}
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static DEVICE_ATTR_RW(st_taps);
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static const struct attribute *sidetone_attrs[] = {
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&dev_attr_st_taps.attr,
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NULL,
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};
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static const struct attribute_group sidetone_attr_group = {
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.attrs = (struct attribute **)sidetone_attrs,
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};
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int omap_mcbsp_st_start(struct omap_mcbsp *mcbsp)
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{
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struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
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if (st_data->enabled && !st_data->running) {
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omap_mcbsp_st_fir_write(mcbsp, st_data->taps);
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omap_mcbsp_st_chgain(mcbsp);
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if (!mcbsp->free) {
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omap_mcbsp_st_on(mcbsp);
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st_data->running = 1;
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}
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}
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return 0;
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}
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int omap_mcbsp_st_stop(struct omap_mcbsp *mcbsp)
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{
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struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
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if (st_data->running) {
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if (!mcbsp->free) {
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omap_mcbsp_st_off(mcbsp);
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st_data->running = 0;
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}
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}
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return 0;
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}
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int omap_mcbsp_st_init(struct platform_device *pdev)
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{
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struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
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struct omap_mcbsp_st_data *st_data;
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struct resource *res;
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int ret;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone");
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if (!res)
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return 0;
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st_data = devm_kzalloc(mcbsp->dev, sizeof(*mcbsp->st_data), GFP_KERNEL);
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if (!st_data)
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return -ENOMEM;
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st_data->mcbsp_iclk = devm_clk_get(mcbsp->dev, "ick");
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if (IS_ERR(st_data->mcbsp_iclk)) {
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dev_warn(mcbsp->dev,
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"Failed to get ick, sidetone might be broken\n");
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st_data->mcbsp_iclk = NULL;
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}
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st_data->io_base_st = devm_ioremap(mcbsp->dev, res->start,
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resource_size(res));
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if (!st_data->io_base_st)
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return -ENOMEM;
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ret = devm_device_add_group(mcbsp->dev, &sidetone_attr_group);
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if (ret)
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return ret;
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mcbsp->st_data = st_data;
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return 0;
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}
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static int omap_mcbsp_st_info_volsw(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_info *uinfo)
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{
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struct soc_mixer_control *mc =
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(struct soc_mixer_control *)kcontrol->private_value;
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int max = mc->max;
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int min = mc->min;
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uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
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uinfo->count = 1;
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uinfo->value.integer.min = min;
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uinfo->value.integer.max = max;
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return 0;
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}
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#define OMAP_MCBSP_ST_CHANNEL_VOLUME(channel) \
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static int \
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omap_mcbsp_set_st_ch##channel##_volume(struct snd_kcontrol *kc, \
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struct snd_ctl_elem_value *uc) \
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{ \
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struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kc); \
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struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); \
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struct soc_mixer_control *mc = \
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(struct soc_mixer_control *)kc->private_value; \
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int max = mc->max; \
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int min = mc->min; \
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int val = uc->value.integer.value[0]; \
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\
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if (val < min || val > max) \
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return -EINVAL; \
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\
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/* OMAP McBSP implementation uses index values 0..4 */ \
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return omap_mcbsp_st_set_chgain(mcbsp, channel, val); \
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} \
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\
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static int \
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omap_mcbsp_get_st_ch##channel##_volume(struct snd_kcontrol *kc, \
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struct snd_ctl_elem_value *uc) \
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{ \
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struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kc); \
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struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); \
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s16 chgain; \
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\
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if (omap_mcbsp_st_get_chgain(mcbsp, channel, &chgain)) \
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return -EAGAIN; \
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\
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uc->value.integer.value[0] = chgain; \
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return 0; \
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}
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OMAP_MCBSP_ST_CHANNEL_VOLUME(0)
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OMAP_MCBSP_ST_CHANNEL_VOLUME(1)
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static int omap_mcbsp_st_put_mode(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
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struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai);
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u8 value = ucontrol->value.integer.value[0];
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if (value == omap_mcbsp_st_is_enabled(mcbsp))
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return 0;
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if (value)
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omap_mcbsp_st_enable(mcbsp);
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else
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omap_mcbsp_st_disable(mcbsp);
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return 1;
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}
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static int omap_mcbsp_st_get_mode(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
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struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai);
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ucontrol->value.integer.value[0] = omap_mcbsp_st_is_enabled(mcbsp);
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return 0;
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}
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#define OMAP_MCBSP_SOC_SINGLE_S16_EXT(xname, xmin, xmax, \
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xhandler_get, xhandler_put) \
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{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
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.info = omap_mcbsp_st_info_volsw, \
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.get = xhandler_get, .put = xhandler_put, \
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.private_value = (unsigned long)&(struct soc_mixer_control) \
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{.min = xmin, .max = xmax} }
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#define OMAP_MCBSP_ST_CONTROLS(port) \
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static const struct snd_kcontrol_new omap_mcbsp##port##_st_controls[] = { \
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SOC_SINGLE_EXT("McBSP" #port " Sidetone Switch", 1, 0, 1, 0, \
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omap_mcbsp_st_get_mode, omap_mcbsp_st_put_mode), \
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OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP" #port " Sidetone Channel 0 Volume", \
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-32768, 32767, \
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omap_mcbsp_get_st_ch0_volume, \
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omap_mcbsp_set_st_ch0_volume), \
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OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP" #port " Sidetone Channel 1 Volume", \
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-32768, 32767, \
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omap_mcbsp_get_st_ch1_volume, \
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omap_mcbsp_set_st_ch1_volume), \
|
|
}
|
|
|
|
OMAP_MCBSP_ST_CONTROLS(2);
|
|
OMAP_MCBSP_ST_CONTROLS(3);
|
|
|
|
int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd, int port_id)
|
|
{
|
|
struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
|
|
struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai);
|
|
|
|
if (!mcbsp->st_data) {
|
|
dev_warn(mcbsp->dev, "No sidetone data for port\n");
|
|
return 0;
|
|
}
|
|
|
|
switch (port_id) {
|
|
case 2: /* McBSP 2 */
|
|
return snd_soc_add_dai_controls(cpu_dai,
|
|
omap_mcbsp2_st_controls,
|
|
ARRAY_SIZE(omap_mcbsp2_st_controls));
|
|
case 3: /* McBSP 3 */
|
|
return snd_soc_add_dai_controls(cpu_dai,
|
|
omap_mcbsp3_st_controls,
|
|
ARRAY_SIZE(omap_mcbsp3_st_controls));
|
|
default:
|
|
dev_err(mcbsp->dev, "Port %d not supported\n", port_id);
|
|
break;
|
|
}
|
|
|
|
return -EINVAL;
|
|
}
|
|
EXPORT_SYMBOL_GPL(omap_mcbsp_st_add_controls);
|