638 lines
18 KiB
C
638 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* rt5677-spi.c -- RT5677 ALSA SoC audio codec driver
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*
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* Copyright 2013 Realtek Semiconductor Corp.
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* Author: Oder Chiou <oder_chiou@realtek.com>
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*/
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#include <linux/module.h>
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#include <linux/input.h>
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#include <linux/spi/spi.h>
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#include <linux/device.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/slab.h>
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#include <linux/sched.h>
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#include <linux/uaccess.h>
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#include <linux/regulator/consumer.h>
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#include <linux/pm_qos.h>
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#include <linux/sysfs.h>
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#include <linux/clk.h>
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#include <linux/firmware.h>
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#include <linux/acpi.h>
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#include <sound/soc.h>
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#include "rt5677.h"
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#include "rt5677-spi.h"
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#define DRV_NAME "rt5677spi"
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#define RT5677_SPI_BURST_LEN 240
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#define RT5677_SPI_HEADER 5
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#define RT5677_SPI_FREQ 6000000
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/* The AddressPhase and DataPhase of SPI commands are MSB first on the wire.
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* DataPhase word size of 16-bit commands is 2 bytes.
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* DataPhase word size of 32-bit commands is 4 bytes.
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* DataPhase word size of burst commands is 8 bytes.
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* The DSP CPU is little-endian.
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*/
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#define RT5677_SPI_WRITE_BURST 0x5
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#define RT5677_SPI_READ_BURST 0x4
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#define RT5677_SPI_WRITE_32 0x3
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#define RT5677_SPI_READ_32 0x2
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#define RT5677_SPI_WRITE_16 0x1
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#define RT5677_SPI_READ_16 0x0
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#define RT5677_BUF_BYTES_TOTAL 0x20000
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#define RT5677_MIC_BUF_ADDR 0x60030000
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#define RT5677_MODEL_ADDR 0x5FFC9800
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#define RT5677_MIC_BUF_BYTES ((u32)(RT5677_BUF_BYTES_TOTAL - \
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sizeof(u32)))
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#define RT5677_MIC_BUF_FIRST_READ_SIZE 0x10000
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static struct spi_device *g_spi;
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static DEFINE_MUTEX(spi_mutex);
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struct rt5677_dsp {
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struct device *dev;
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struct delayed_work copy_work;
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struct mutex dma_lock;
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struct snd_pcm_substream *substream;
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size_t dma_offset; /* zero-based offset into runtime->dma_area */
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size_t avail_bytes; /* number of new bytes since last period */
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u32 mic_read_offset; /* zero-based offset into DSP's mic buffer */
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bool new_hotword; /* a new hotword is fired */
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};
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static const struct snd_pcm_hardware rt5677_spi_pcm_hardware = {
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.info = SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_INTERLEAVED,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,
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.period_bytes_min = PAGE_SIZE,
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.period_bytes_max = RT5677_BUF_BYTES_TOTAL / 8,
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.periods_min = 8,
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.periods_max = 8,
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.channels_min = 1,
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.channels_max = 1,
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.buffer_bytes_max = RT5677_BUF_BYTES_TOTAL,
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};
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static struct snd_soc_dai_driver rt5677_spi_dai = {
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/* The DAI name "rt5677-dsp-cpu-dai" is not used. The actual DAI name
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* registered with ASoC is the name of the device "spi-RT5677AA:00",
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* because we only have one DAI. See snd_soc_register_dais().
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*/
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.name = "rt5677-dsp-cpu-dai",
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.id = 0,
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.capture = {
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.stream_name = "DSP Capture",
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.channels_min = 1,
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.channels_max = 1,
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.rates = SNDRV_PCM_RATE_16000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,
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},
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};
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/* PCM for streaming audio from the DSP buffer */
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static int rt5677_spi_pcm_open(
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struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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snd_soc_set_runtime_hwparams(substream, &rt5677_spi_pcm_hardware);
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return 0;
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}
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static int rt5677_spi_pcm_close(
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struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
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struct snd_soc_component *codec_component =
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snd_soc_rtdcom_lookup(rtd, "rt5677");
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struct rt5677_priv *rt5677 =
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snd_soc_component_get_drvdata(codec_component);
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struct rt5677_dsp *rt5677_dsp =
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snd_soc_component_get_drvdata(component);
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cancel_delayed_work_sync(&rt5677_dsp->copy_work);
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rt5677->set_dsp_vad(codec_component, false);
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return 0;
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}
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static int rt5677_spi_hw_params(
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struct snd_soc_component *component,
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struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *hw_params)
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{
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struct rt5677_dsp *rt5677_dsp =
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snd_soc_component_get_drvdata(component);
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mutex_lock(&rt5677_dsp->dma_lock);
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rt5677_dsp->substream = substream;
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mutex_unlock(&rt5677_dsp->dma_lock);
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return 0;
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}
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static int rt5677_spi_hw_free(
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struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct rt5677_dsp *rt5677_dsp =
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snd_soc_component_get_drvdata(component);
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mutex_lock(&rt5677_dsp->dma_lock);
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rt5677_dsp->substream = NULL;
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mutex_unlock(&rt5677_dsp->dma_lock);
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return 0;
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}
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static int rt5677_spi_prepare(
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struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
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struct snd_soc_component *rt5677_component =
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snd_soc_rtdcom_lookup(rtd, "rt5677");
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struct rt5677_priv *rt5677 =
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snd_soc_component_get_drvdata(rt5677_component);
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struct rt5677_dsp *rt5677_dsp =
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snd_soc_component_get_drvdata(component);
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rt5677->set_dsp_vad(rt5677_component, true);
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rt5677_dsp->dma_offset = 0;
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rt5677_dsp->avail_bytes = 0;
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return 0;
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}
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static snd_pcm_uframes_t rt5677_spi_pcm_pointer(
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struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct rt5677_dsp *rt5677_dsp =
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snd_soc_component_get_drvdata(component);
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return bytes_to_frames(runtime, rt5677_dsp->dma_offset);
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}
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static int rt5677_spi_mic_write_offset(u32 *mic_write_offset)
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{
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int ret;
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/* Grab the first 4 bytes that hold the write pointer on the
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* dsp, and check to make sure that it points somewhere inside the
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* buffer.
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*/
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ret = rt5677_spi_read(RT5677_MIC_BUF_ADDR, mic_write_offset,
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sizeof(u32));
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if (ret)
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return ret;
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/* Adjust the offset so that it's zero-based */
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*mic_write_offset = *mic_write_offset - sizeof(u32);
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return *mic_write_offset < RT5677_MIC_BUF_BYTES ? 0 : -EFAULT;
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}
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/*
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* Copy one contiguous block of audio samples from the DSP mic buffer to the
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* dma_area of the pcm runtime. The receiving buffer may wrap around.
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* @begin: start offset of the block to copy, in bytes.
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* @end: offset of the first byte after the block to copy, must be greater
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* than or equal to begin.
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*
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* Return: Zero if successful, or a negative error code on failure.
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*/
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static int rt5677_spi_copy_block(struct rt5677_dsp *rt5677_dsp,
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u32 begin, u32 end)
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{
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struct snd_pcm_runtime *runtime = rt5677_dsp->substream->runtime;
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size_t bytes_per_frame = frames_to_bytes(runtime, 1);
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size_t first_chunk_len, second_chunk_len;
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int ret;
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if (begin > end || runtime->dma_bytes < 2 * bytes_per_frame) {
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dev_err(rt5677_dsp->dev,
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"Invalid copy from (%u, %u), dma_area size %zu\n",
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begin, end, runtime->dma_bytes);
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return -EINVAL;
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}
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/* The block to copy is empty */
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if (begin == end)
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return 0;
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/* If the incoming chunk is too big for the receiving buffer, only the
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* last "receiving buffer size - one frame" bytes are copied.
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*/
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if (end - begin > runtime->dma_bytes - bytes_per_frame)
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begin = end - (runtime->dma_bytes - bytes_per_frame);
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/* May need to split to two chunks, calculate the size of each */
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first_chunk_len = end - begin;
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second_chunk_len = 0;
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if (rt5677_dsp->dma_offset + first_chunk_len > runtime->dma_bytes) {
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/* Receiving buffer wrapped around */
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second_chunk_len = first_chunk_len;
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first_chunk_len = runtime->dma_bytes - rt5677_dsp->dma_offset;
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second_chunk_len -= first_chunk_len;
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}
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/* Copy first chunk */
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ret = rt5677_spi_read(RT5677_MIC_BUF_ADDR + sizeof(u32) + begin,
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runtime->dma_area + rt5677_dsp->dma_offset,
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first_chunk_len);
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if (ret)
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return ret;
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rt5677_dsp->dma_offset += first_chunk_len;
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if (rt5677_dsp->dma_offset == runtime->dma_bytes)
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rt5677_dsp->dma_offset = 0;
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/* Copy second chunk */
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if (second_chunk_len) {
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ret = rt5677_spi_read(RT5677_MIC_BUF_ADDR + sizeof(u32) +
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begin + first_chunk_len, runtime->dma_area,
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second_chunk_len);
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if (!ret)
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rt5677_dsp->dma_offset = second_chunk_len;
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}
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return ret;
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}
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/*
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* Copy a given amount of audio samples from the DSP mic buffer starting at
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* mic_read_offset, to the dma_area of the pcm runtime. The source buffer may
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* wrap around. mic_read_offset is updated after successful copy.
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* @amount: amount of samples to copy, in bytes.
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*
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* Return: Zero if successful, or a negative error code on failure.
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*/
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static int rt5677_spi_copy(struct rt5677_dsp *rt5677_dsp, u32 amount)
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{
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int ret = 0;
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u32 target;
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if (amount == 0)
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return ret;
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target = rt5677_dsp->mic_read_offset + amount;
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/* Copy the first chunk in DSP's mic buffer */
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ret |= rt5677_spi_copy_block(rt5677_dsp, rt5677_dsp->mic_read_offset,
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min(target, RT5677_MIC_BUF_BYTES));
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if (target >= RT5677_MIC_BUF_BYTES) {
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/* Wrap around, copy the second chunk */
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target -= RT5677_MIC_BUF_BYTES;
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ret |= rt5677_spi_copy_block(rt5677_dsp, 0, target);
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}
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if (!ret)
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rt5677_dsp->mic_read_offset = target;
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return ret;
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}
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/*
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* A delayed work that streams audio samples from the DSP mic buffer to the
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* dma_area of the pcm runtime via SPI.
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*/
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static void rt5677_spi_copy_work(struct work_struct *work)
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{
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struct rt5677_dsp *rt5677_dsp =
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container_of(work, struct rt5677_dsp, copy_work.work);
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struct snd_pcm_runtime *runtime;
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u32 mic_write_offset;
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size_t new_bytes, copy_bytes, period_bytes;
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unsigned int delay;
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int ret = 0;
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/* Ensure runtime->dma_area buffer does not go away while copying. */
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mutex_lock(&rt5677_dsp->dma_lock);
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if (!rt5677_dsp->substream) {
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dev_err(rt5677_dsp->dev, "No pcm substream\n");
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goto done;
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}
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runtime = rt5677_dsp->substream->runtime;
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if (rt5677_spi_mic_write_offset(&mic_write_offset)) {
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dev_err(rt5677_dsp->dev, "No mic_write_offset\n");
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goto done;
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}
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/* If this is the first time that we've asked for streaming data after
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* a hotword is fired, we should start reading from the previous 2
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* seconds of audio from wherever the mic_write_offset is currently.
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*/
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if (rt5677_dsp->new_hotword) {
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rt5677_dsp->new_hotword = false;
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/* See if buffer wraparound happens */
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if (mic_write_offset < RT5677_MIC_BUF_FIRST_READ_SIZE)
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rt5677_dsp->mic_read_offset = RT5677_MIC_BUF_BYTES -
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(RT5677_MIC_BUF_FIRST_READ_SIZE -
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mic_write_offset);
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else
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rt5677_dsp->mic_read_offset = mic_write_offset -
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RT5677_MIC_BUF_FIRST_READ_SIZE;
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}
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/* Calculate the amount of new samples in bytes */
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if (rt5677_dsp->mic_read_offset <= mic_write_offset)
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new_bytes = mic_write_offset - rt5677_dsp->mic_read_offset;
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else
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new_bytes = RT5677_MIC_BUF_BYTES + mic_write_offset
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- rt5677_dsp->mic_read_offset;
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/* Copy all new samples from DSP mic buffer, one period at a time */
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period_bytes = snd_pcm_lib_period_bytes(rt5677_dsp->substream);
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while (new_bytes) {
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copy_bytes = min(new_bytes, period_bytes
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- rt5677_dsp->avail_bytes);
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ret = rt5677_spi_copy(rt5677_dsp, copy_bytes);
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if (ret) {
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dev_err(rt5677_dsp->dev, "Copy failed %d\n", ret);
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goto done;
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}
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rt5677_dsp->avail_bytes += copy_bytes;
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if (rt5677_dsp->avail_bytes >= period_bytes) {
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snd_pcm_period_elapsed(rt5677_dsp->substream);
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rt5677_dsp->avail_bytes = 0;
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}
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new_bytes -= copy_bytes;
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}
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delay = bytes_to_frames(runtime, period_bytes) / (runtime->rate / 1000);
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schedule_delayed_work(&rt5677_dsp->copy_work, msecs_to_jiffies(delay));
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done:
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mutex_unlock(&rt5677_dsp->dma_lock);
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}
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static int rt5677_spi_pcm_new(struct snd_soc_component *component,
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struct snd_soc_pcm_runtime *rtd)
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{
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snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_VMALLOC,
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NULL, 0, 0);
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return 0;
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}
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static int rt5677_spi_pcm_probe(struct snd_soc_component *component)
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{
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struct rt5677_dsp *rt5677_dsp;
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rt5677_dsp = devm_kzalloc(component->dev, sizeof(*rt5677_dsp),
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GFP_KERNEL);
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if (!rt5677_dsp)
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return -ENOMEM;
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rt5677_dsp->dev = &g_spi->dev;
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mutex_init(&rt5677_dsp->dma_lock);
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INIT_DELAYED_WORK(&rt5677_dsp->copy_work, rt5677_spi_copy_work);
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snd_soc_component_set_drvdata(component, rt5677_dsp);
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return 0;
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}
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static const struct snd_soc_component_driver rt5677_spi_dai_component = {
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.name = DRV_NAME,
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.probe = rt5677_spi_pcm_probe,
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.open = rt5677_spi_pcm_open,
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.close = rt5677_spi_pcm_close,
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.hw_params = rt5677_spi_hw_params,
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.hw_free = rt5677_spi_hw_free,
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.prepare = rt5677_spi_prepare,
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.pointer = rt5677_spi_pcm_pointer,
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.pcm_construct = rt5677_spi_pcm_new,
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.legacy_dai_naming = 1,
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};
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/* Select a suitable transfer command for the next transfer to ensure
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* the transfer address is always naturally aligned while minimizing
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* the total number of transfers required.
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*
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* 3 transfer commands are available:
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* RT5677_SPI_READ/WRITE_16: Transfer 2 bytes
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* RT5677_SPI_READ/WRITE_32: Transfer 4 bytes
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* RT5677_SPI_READ/WRITE_BURST: Transfer any multiples of 8 bytes
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*
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* Note:
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* 16 Bit writes and reads are restricted to the address range
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* 0x18020000 ~ 0x18021000
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*
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* For example, reading 256 bytes at 0x60030004 uses the following commands:
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* 0x60030004 RT5677_SPI_READ_32 4 bytes
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* 0x60030008 RT5677_SPI_READ_BURST 240 bytes
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* 0x600300F8 RT5677_SPI_READ_BURST 8 bytes
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* 0x60030100 RT5677_SPI_READ_32 4 bytes
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*
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* Input:
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* @read: true for read commands; false for write commands
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* @align: alignment of the next transfer address
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* @remain: number of bytes remaining to transfer
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*
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* Output:
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* @len: number of bytes to transfer with the selected command
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* Returns the selected command
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*/
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static u8 rt5677_spi_select_cmd(bool read, u32 align, u32 remain, u32 *len)
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{
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u8 cmd;
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if (align == 4 || remain <= 4) {
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cmd = RT5677_SPI_READ_32;
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*len = 4;
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} else {
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cmd = RT5677_SPI_READ_BURST;
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*len = (((remain - 1) >> 3) + 1) << 3;
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*len = min_t(u32, *len, RT5677_SPI_BURST_LEN);
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}
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return read ? cmd : cmd + 1;
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}
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/* Copy dstlen bytes from src to dst, while reversing byte order for each word.
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* If srclen < dstlen, zeros are padded.
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*/
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static void rt5677_spi_reverse(u8 *dst, u32 dstlen, const u8 *src, u32 srclen)
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{
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u32 w, i, si;
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u32 word_size = min_t(u32, dstlen, 8);
|
|
|
|
for (w = 0; w < dstlen; w += word_size) {
|
|
for (i = 0; i < word_size && i + w < dstlen; i++) {
|
|
si = w + word_size - i - 1;
|
|
dst[w + i] = si < srclen ? src[si] : 0;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Read DSP address space using SPI. addr and len have to be 4-byte aligned. */
|
|
int rt5677_spi_read(u32 addr, void *rxbuf, size_t len)
|
|
{
|
|
u32 offset;
|
|
int status = 0;
|
|
struct spi_transfer t[2];
|
|
struct spi_message m;
|
|
/* +4 bytes is for the DummyPhase following the AddressPhase */
|
|
u8 header[RT5677_SPI_HEADER + 4];
|
|
u8 body[RT5677_SPI_BURST_LEN];
|
|
u8 spi_cmd;
|
|
u8 *cb = rxbuf;
|
|
|
|
if (!g_spi)
|
|
return -ENODEV;
|
|
|
|
if ((addr & 3) || (len & 3)) {
|
|
dev_err(&g_spi->dev, "Bad read align 0x%x(%zu)\n", addr, len);
|
|
return -EACCES;
|
|
}
|
|
|
|
memset(t, 0, sizeof(t));
|
|
t[0].tx_buf = header;
|
|
t[0].len = sizeof(header);
|
|
t[0].speed_hz = RT5677_SPI_FREQ;
|
|
t[1].rx_buf = body;
|
|
t[1].speed_hz = RT5677_SPI_FREQ;
|
|
spi_message_init_with_transfers(&m, t, ARRAY_SIZE(t));
|
|
|
|
for (offset = 0; offset < len; offset += t[1].len) {
|
|
spi_cmd = rt5677_spi_select_cmd(true, (addr + offset) & 7,
|
|
len - offset, &t[1].len);
|
|
|
|
/* Construct SPI message header */
|
|
header[0] = spi_cmd;
|
|
header[1] = ((addr + offset) & 0xff000000) >> 24;
|
|
header[2] = ((addr + offset) & 0x00ff0000) >> 16;
|
|
header[3] = ((addr + offset) & 0x0000ff00) >> 8;
|
|
header[4] = ((addr + offset) & 0x000000ff) >> 0;
|
|
|
|
mutex_lock(&spi_mutex);
|
|
status |= spi_sync(g_spi, &m);
|
|
mutex_unlock(&spi_mutex);
|
|
|
|
|
|
/* Copy data back to caller buffer */
|
|
rt5677_spi_reverse(cb + offset, len - offset, body, t[1].len);
|
|
}
|
|
return status;
|
|
}
|
|
EXPORT_SYMBOL_GPL(rt5677_spi_read);
|
|
|
|
/* Write DSP address space using SPI. addr has to be 4-byte aligned.
|
|
* If len is not 4-byte aligned, then extra zeros are written at the end
|
|
* as padding.
|
|
*/
|
|
int rt5677_spi_write(u32 addr, const void *txbuf, size_t len)
|
|
{
|
|
u32 offset;
|
|
int status = 0;
|
|
struct spi_transfer t;
|
|
struct spi_message m;
|
|
/* +1 byte is for the DummyPhase following the DataPhase */
|
|
u8 buf[RT5677_SPI_HEADER + RT5677_SPI_BURST_LEN + 1];
|
|
u8 *body = buf + RT5677_SPI_HEADER;
|
|
u8 spi_cmd;
|
|
const u8 *cb = txbuf;
|
|
|
|
if (!g_spi)
|
|
return -ENODEV;
|
|
|
|
if (addr & 3) {
|
|
dev_err(&g_spi->dev, "Bad write align 0x%x(%zu)\n", addr, len);
|
|
return -EACCES;
|
|
}
|
|
|
|
memset(&t, 0, sizeof(t));
|
|
t.tx_buf = buf;
|
|
t.speed_hz = RT5677_SPI_FREQ;
|
|
spi_message_init_with_transfers(&m, &t, 1);
|
|
|
|
for (offset = 0; offset < len;) {
|
|
spi_cmd = rt5677_spi_select_cmd(false, (addr + offset) & 7,
|
|
len - offset, &t.len);
|
|
|
|
/* Construct SPI message header */
|
|
buf[0] = spi_cmd;
|
|
buf[1] = ((addr + offset) & 0xff000000) >> 24;
|
|
buf[2] = ((addr + offset) & 0x00ff0000) >> 16;
|
|
buf[3] = ((addr + offset) & 0x0000ff00) >> 8;
|
|
buf[4] = ((addr + offset) & 0x000000ff) >> 0;
|
|
|
|
/* Fetch data from caller buffer */
|
|
rt5677_spi_reverse(body, t.len, cb + offset, len - offset);
|
|
offset += t.len;
|
|
t.len += RT5677_SPI_HEADER + 1;
|
|
|
|
mutex_lock(&spi_mutex);
|
|
status |= spi_sync(g_spi, &m);
|
|
mutex_unlock(&spi_mutex);
|
|
}
|
|
return status;
|
|
}
|
|
EXPORT_SYMBOL_GPL(rt5677_spi_write);
|
|
|
|
int rt5677_spi_write_firmware(u32 addr, const struct firmware *fw)
|
|
{
|
|
return rt5677_spi_write(addr, fw->data, fw->size);
|
|
}
|
|
EXPORT_SYMBOL_GPL(rt5677_spi_write_firmware);
|
|
|
|
void rt5677_spi_hotword_detected(void)
|
|
{
|
|
struct rt5677_dsp *rt5677_dsp;
|
|
|
|
if (!g_spi)
|
|
return;
|
|
|
|
rt5677_dsp = dev_get_drvdata(&g_spi->dev);
|
|
if (!rt5677_dsp) {
|
|
dev_err(&g_spi->dev, "Can't get rt5677_dsp\n");
|
|
return;
|
|
}
|
|
|
|
mutex_lock(&rt5677_dsp->dma_lock);
|
|
dev_info(rt5677_dsp->dev, "Hotword detected\n");
|
|
rt5677_dsp->new_hotword = true;
|
|
mutex_unlock(&rt5677_dsp->dma_lock);
|
|
|
|
schedule_delayed_work(&rt5677_dsp->copy_work, 0);
|
|
}
|
|
EXPORT_SYMBOL_GPL(rt5677_spi_hotword_detected);
|
|
|
|
static int rt5677_spi_probe(struct spi_device *spi)
|
|
{
|
|
int ret;
|
|
|
|
g_spi = spi;
|
|
|
|
ret = devm_snd_soc_register_component(&spi->dev,
|
|
&rt5677_spi_dai_component,
|
|
&rt5677_spi_dai, 1);
|
|
if (ret < 0)
|
|
dev_err(&spi->dev, "Failed to register component.\n");
|
|
|
|
return ret;
|
|
}
|
|
|
|
#ifdef CONFIG_ACPI
|
|
static const struct acpi_device_id rt5677_spi_acpi_id[] = {
|
|
{ "RT5677AA", 0 },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(acpi, rt5677_spi_acpi_id);
|
|
#endif
|
|
|
|
static struct spi_driver rt5677_spi_driver = {
|
|
.driver = {
|
|
.name = DRV_NAME,
|
|
.acpi_match_table = ACPI_PTR(rt5677_spi_acpi_id),
|
|
},
|
|
.probe = rt5677_spi_probe,
|
|
};
|
|
module_spi_driver(rt5677_spi_driver);
|
|
|
|
MODULE_DESCRIPTION("ASoC RT5677 SPI driver");
|
|
MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
|
|
MODULE_LICENSE("GPL v2");
|