292 lines
15 KiB
C
292 lines
15 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2020 MediaTek Inc.
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*/
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#ifndef __MFD_MT6358_REGISTERS_H__
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#define __MFD_MT6358_REGISTERS_H__
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/* PMIC Registers */
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#define MT6358_SWCID 0xa
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#define MT6358_TOPSTATUS 0x28
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#define MT6358_TOP_RST_MISC 0x14c
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#define MT6358_MISC_TOP_INT_CON0 0x188
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#define MT6358_MISC_TOP_INT_STATUS0 0x194
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#define MT6358_TOP_INT_STATUS0 0x19e
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#define MT6358_SCK_TOP_INT_CON0 0x52e
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#define MT6358_SCK_TOP_INT_STATUS0 0x53a
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#define MT6358_EOSC_CALI_CON0 0x540
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#define MT6358_EOSC_CALI_CON1 0x542
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#define MT6358_RTC_MIX_CON0 0x544
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#define MT6358_RTC_MIX_CON1 0x546
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#define MT6358_RTC_MIX_CON2 0x548
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#define MT6358_RTC_DSN_ID 0x580
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#define MT6358_RTC_DSN_REV0 0x582
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#define MT6358_RTC_DBI 0x584
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#define MT6358_RTC_DXI 0x586
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#define MT6358_RTC_BBPU 0x588
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#define MT6358_RTC_IRQ_STA 0x58a
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#define MT6358_RTC_IRQ_EN 0x58c
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#define MT6358_RTC_CII_EN 0x58e
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#define MT6358_RTC_AL_MASK 0x590
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#define MT6358_RTC_TC_SEC 0x592
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#define MT6358_RTC_TC_MIN 0x594
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#define MT6358_RTC_TC_HOU 0x596
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#define MT6358_RTC_TC_DOM 0x598
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#define MT6358_RTC_TC_DOW 0x59a
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#define MT6358_RTC_TC_MTH 0x59c
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#define MT6358_RTC_TC_YEA 0x59e
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#define MT6358_RTC_AL_SEC 0x5a0
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#define MT6358_RTC_AL_MIN 0x5a2
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#define MT6358_RTC_AL_HOU 0x5a4
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#define MT6358_RTC_AL_DOM 0x5a6
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#define MT6358_RTC_AL_DOW 0x5a8
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#define MT6358_RTC_AL_MTH 0x5aa
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#define MT6358_RTC_AL_YEA 0x5ac
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#define MT6358_RTC_OSC32CON 0x5ae
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#define MT6358_RTC_POWERKEY1 0x5b0
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#define MT6358_RTC_POWERKEY2 0x5b2
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#define MT6358_RTC_PDN1 0x5b4
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#define MT6358_RTC_PDN2 0x5b6
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#define MT6358_RTC_SPAR0 0x5b8
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#define MT6358_RTC_SPAR1 0x5ba
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#define MT6358_RTC_PROT 0x5bc
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#define MT6358_RTC_DIFF 0x5be
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#define MT6358_RTC_CALI 0x5c0
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#define MT6358_RTC_WRTGR 0x5c2
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#define MT6358_RTC_CON 0x5c4
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#define MT6358_RTC_SEC_CTRL 0x5c6
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#define MT6358_RTC_INT_CNT 0x5c8
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#define MT6358_RTC_SEC_DAT0 0x5ca
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#define MT6358_RTC_SEC_DAT1 0x5cc
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#define MT6358_RTC_SEC_DAT2 0x5ce
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#define MT6358_RTC_SEC_DSN_ID 0x600
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#define MT6358_RTC_SEC_DSN_REV0 0x602
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#define MT6358_RTC_SEC_DBI 0x604
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#define MT6358_RTC_SEC_DXI 0x606
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#define MT6358_RTC_TC_SEC_SEC 0x608
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#define MT6358_RTC_TC_MIN_SEC 0x60a
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#define MT6358_RTC_TC_HOU_SEC 0x60c
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#define MT6358_RTC_TC_DOM_SEC 0x60e
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#define MT6358_RTC_TC_DOW_SEC 0x610
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#define MT6358_RTC_TC_MTH_SEC 0x612
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#define MT6358_RTC_TC_YEA_SEC 0x614
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#define MT6358_RTC_SEC_CK_PDN 0x616
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#define MT6358_RTC_SEC_WRTGR 0x618
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#define MT6358_PSC_TOP_INT_CON0 0x910
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#define MT6358_PSC_TOP_INT_STATUS0 0x91c
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#define MT6358_BM_TOP_INT_CON0 0xc32
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#define MT6358_BM_TOP_INT_CON1 0xc38
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#define MT6358_BM_TOP_INT_STATUS0 0xc4a
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#define MT6358_BM_TOP_INT_STATUS1 0xc4c
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#define MT6358_HK_TOP_INT_CON0 0xf92
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#define MT6358_HK_TOP_INT_STATUS0 0xf9e
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#define MT6358_BUCK_TOP_INT_CON0 0x1318
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#define MT6358_BUCK_TOP_INT_STATUS0 0x1324
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#define MT6358_BUCK_VPROC11_CON0 0x1388
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#define MT6358_BUCK_VPROC11_DBG0 0x139e
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#define MT6358_BUCK_VPROC11_DBG1 0x13a0
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#define MT6358_BUCK_VPROC11_ELR0 0x13a6
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#define MT6358_BUCK_VPROC12_CON0 0x1408
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#define MT6358_BUCK_VPROC12_DBG0 0x141e
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#define MT6358_BUCK_VPROC12_DBG1 0x1420
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#define MT6358_BUCK_VPROC12_ELR0 0x1426
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#define MT6358_BUCK_VCORE_CON0 0x1488
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#define MT6358_BUCK_VCORE_DBG0 0x149e
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#define MT6358_BUCK_VCORE_DBG1 0x14a0
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#define MT6358_BUCK_VCORE_SSHUB_CON0 0x14a4
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#define MT6358_BUCK_VCORE_SSHUB_CON1 0x14a6
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#define MT6358_BUCK_VCORE_SSHUB_ELR0 MT6358_BUCK_VCORE_SSHUB_CON1
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#define MT6358_BUCK_VCORE_SSHUB_DBG1 MT6358_BUCK_VCORE_DBG1
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#define MT6358_BUCK_VCORE_ELR0 0x14aa
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#define MT6358_BUCK_VGPU_CON0 0x1508
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#define MT6358_BUCK_VGPU_DBG0 0x151e
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#define MT6358_BUCK_VGPU_DBG1 0x1520
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#define MT6358_BUCK_VGPU_ELR0 0x1526
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#define MT6358_BUCK_VMODEM_CON0 0x1588
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#define MT6358_BUCK_VMODEM_DBG0 0x159e
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#define MT6358_BUCK_VMODEM_DBG1 0x15a0
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#define MT6358_BUCK_VMODEM_ELR0 0x15a6
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#define MT6358_BUCK_VDRAM1_CON0 0x1608
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#define MT6358_BUCK_VDRAM1_DBG0 0x161e
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#define MT6358_BUCK_VDRAM1_DBG1 0x1620
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#define MT6358_BUCK_VDRAM1_ELR0 0x1626
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#define MT6358_BUCK_VS1_CON0 0x1688
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#define MT6358_BUCK_VS1_DBG0 0x169e
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#define MT6358_BUCK_VS1_DBG1 0x16a0
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#define MT6358_BUCK_VS1_ELR0 0x16ae
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#define MT6358_BUCK_VS2_CON0 0x1708
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#define MT6358_BUCK_VS2_DBG0 0x171e
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#define MT6358_BUCK_VS2_DBG1 0x1720
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#define MT6358_BUCK_VS2_ELR0 0x172e
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#define MT6358_BUCK_VPA_CON0 0x1788
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#define MT6358_BUCK_VPA_CON1 0x178a
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#define MT6358_BUCK_VPA_ELR0 MT6358_BUCK_VPA_CON1
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#define MT6358_BUCK_VPA_DBG0 0x1792
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#define MT6358_BUCK_VPA_DBG1 0x1794
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#define MT6358_VPROC_ANA_CON0 0x180c
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#define MT6358_VCORE_VGPU_ANA_CON0 0x1828
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#define MT6358_VMODEM_ANA_CON0 0x1888
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#define MT6358_VDRAM1_ANA_CON0 0x1896
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#define MT6358_VS1_ANA_CON0 0x18a2
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#define MT6358_VS2_ANA_CON0 0x18ae
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#define MT6358_VPA_ANA_CON0 0x18ba
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#define MT6358_LDO_TOP_INT_CON0 0x1a50
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#define MT6358_LDO_TOP_INT_CON1 0x1a56
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#define MT6358_LDO_TOP_INT_STATUS0 0x1a68
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#define MT6358_LDO_TOP_INT_STATUS1 0x1a6a
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#define MT6358_LDO_VXO22_CON0 0x1a88
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#define MT6358_LDO_VXO22_CON1 0x1a96
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#define MT6358_LDO_VA12_CON0 0x1a9c
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#define MT6358_LDO_VA12_CON1 0x1aaa
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#define MT6358_LDO_VAUX18_CON0 0x1ab0
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#define MT6358_LDO_VAUX18_CON1 0x1abe
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#define MT6358_LDO_VAUD28_CON0 0x1ac4
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#define MT6358_LDO_VAUD28_CON1 0x1ad2
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#define MT6358_LDO_VIO28_CON0 0x1ad8
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#define MT6358_LDO_VIO28_CON1 0x1ae6
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#define MT6358_LDO_VIO18_CON0 0x1aec
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#define MT6358_LDO_VIO18_CON1 0x1afa
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#define MT6358_LDO_VDRAM2_CON0 0x1b08
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#define MT6358_LDO_VDRAM2_CON1 0x1b16
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#define MT6358_LDO_VEMC_CON0 0x1b1c
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#define MT6358_LDO_VEMC_CON1 0x1b2a
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#define MT6358_LDO_VUSB_CON0_0 0x1b30
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#define MT6358_LDO_VUSB_CON1 0x1b40
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#define MT6358_LDO_VSRAM_PROC11_CON0 0x1b46
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#define MT6358_LDO_VSRAM_PROC11_DBG0 0x1b60
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#define MT6358_LDO_VSRAM_PROC11_DBG1 0x1b62
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#define MT6358_LDO_VSRAM_PROC11_TRACKING_CON0 0x1b64
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#define MT6358_LDO_VSRAM_PROC11_TRACKING_CON1 0x1b66
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#define MT6358_LDO_VSRAM_PROC11_TRACKING_CON2 0x1b68
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#define MT6358_LDO_VSRAM_PROC11_TRACKING_CON3 0x1b6a
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#define MT6358_LDO_VSRAM_PROC12_TRACKING_CON0 0x1b6c
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#define MT6358_LDO_VSRAM_PROC12_TRACKING_CON1 0x1b6e
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#define MT6358_LDO_VSRAM_PROC12_TRACKING_CON2 0x1b70
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#define MT6358_LDO_VSRAM_PROC12_TRACKING_CON3 0x1b72
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#define MT6358_LDO_VSRAM_WAKEUP_CON0 0x1b74
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#define MT6358_LDO_GON1_ELR_NUM 0x1b76
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#define MT6358_LDO_VDRAM2_ELR0 0x1b78
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#define MT6358_LDO_VSRAM_PROC12_CON0 0x1b88
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#define MT6358_LDO_VSRAM_PROC12_DBG0 0x1ba2
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#define MT6358_LDO_VSRAM_PROC12_DBG1 0x1ba4
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#define MT6358_LDO_VSRAM_OTHERS_CON0 0x1ba6
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#define MT6358_LDO_VSRAM_OTHERS_DBG0 0x1bc0
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#define MT6358_LDO_VSRAM_OTHERS_DBG1 0x1bc2
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#define MT6358_LDO_VSRAM_OTHERS_SSHUB_CON0 0x1bc4
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#define MT6358_LDO_VSRAM_OTHERS_SSHUB_CON1 0x1bc6
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#define MT6358_LDO_VSRAM_OTHERS_SSHUB_DBG1 MT6358_LDO_VSRAM_OTHERS_DBG1
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#define MT6358_LDO_VSRAM_GPU_CON0 0x1bc8
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#define MT6358_LDO_VSRAM_GPU_DBG0 0x1be2
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#define MT6358_LDO_VSRAM_GPU_DBG1 0x1be4
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#define MT6358_LDO_VSRAM_CON0 0x1bee
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#define MT6358_LDO_VSRAM_CON1 0x1bf0
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#define MT6358_LDO_VSRAM_CON2 0x1bf2
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#define MT6358_LDO_VSRAM_CON3 0x1bf4
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#define MT6358_LDO_VFE28_CON0 0x1c08
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#define MT6358_LDO_VFE28_CON1 0x1c16
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#define MT6358_LDO_VFE28_CON2 0x1c18
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#define MT6358_LDO_VFE28_CON3 0x1c1a
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#define MT6358_LDO_VRF18_CON0 0x1c1c
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#define MT6358_LDO_VRF18_CON1 0x1c2a
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#define MT6358_LDO_VRF18_CON2 0x1c2c
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#define MT6358_LDO_VRF18_CON3 0x1c2e
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#define MT6358_LDO_VRF12_CON0 0x1c30
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#define MT6358_LDO_VRF12_CON1 0x1c3e
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#define MT6358_LDO_VRF12_CON2 0x1c40
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#define MT6358_LDO_VRF12_CON3 0x1c42
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#define MT6358_LDO_VEFUSE_CON0 0x1c44
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#define MT6358_LDO_VEFUSE_CON1 0x1c52
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#define MT6358_LDO_VEFUSE_CON2 0x1c54
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#define MT6358_LDO_VEFUSE_CON3 0x1c56
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#define MT6358_LDO_VCN18_CON0 0x1c58
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#define MT6358_LDO_VCN18_CON1 0x1c66
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#define MT6358_LDO_VCN18_CON2 0x1c68
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#define MT6358_LDO_VCN18_CON3 0x1c6a
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#define MT6358_LDO_VCAMA1_CON0 0x1c6c
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#define MT6358_LDO_VCAMA1_CON1 0x1c7a
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#define MT6358_LDO_VCAMA1_CON2 0x1c7c
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#define MT6358_LDO_VCAMA1_CON3 0x1c7e
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#define MT6358_LDO_VCAMA2_CON0 0x1c88
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#define MT6358_LDO_VCAMA2_CON1 0x1c96
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#define MT6358_LDO_VCAMA2_CON2 0x1c98
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#define MT6358_LDO_VCAMA2_CON3 0x1c9a
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#define MT6358_LDO_VCAMD_CON0 0x1c9c
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#define MT6358_LDO_VCAMD_CON1 0x1caa
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#define MT6358_LDO_VCAMD_CON2 0x1cac
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#define MT6358_LDO_VCAMD_CON3 0x1cae
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#define MT6358_LDO_VCAMIO_CON0 0x1cb0
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#define MT6358_LDO_VCAMIO_CON1 0x1cbe
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#define MT6358_LDO_VCAMIO_CON2 0x1cc0
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#define MT6358_LDO_VCAMIO_CON3 0x1cc2
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#define MT6358_LDO_VMC_CON0 0x1cc4
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#define MT6358_LDO_VMC_CON1 0x1cd2
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#define MT6358_LDO_VMC_CON2 0x1cd4
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#define MT6358_LDO_VMC_CON3 0x1cd6
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#define MT6358_LDO_VMCH_CON0 0x1cd8
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#define MT6358_LDO_VMCH_CON1 0x1ce6
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#define MT6358_LDO_VMCH_CON2 0x1ce8
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#define MT6358_LDO_VMCH_CON3 0x1cea
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#define MT6358_LDO_VIBR_CON0 0x1d08
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#define MT6358_LDO_VIBR_CON1 0x1d16
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#define MT6358_LDO_VIBR_CON2 0x1d18
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#define MT6358_LDO_VIBR_CON3 0x1d1a
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#define MT6358_LDO_VCN33_CON0_0 0x1d1c
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#define MT6358_LDO_VCN33_CON0_1 0x1d2a
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#define MT6358_LDO_VCN33_CON1 0x1d2c
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#define MT6358_LDO_VCN33_BT_CON1 MT6358_LDO_VCN33_CON1
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#define MT6358_LDO_VCN33_WIFI_CON1 MT6358_LDO_VCN33_CON1
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#define MT6358_LDO_VCN33_CON2 0x1d2e
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#define MT6358_LDO_VCN33_CON3 0x1d30
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#define MT6358_LDO_VLDO28_CON0_0 0x1d32
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#define MT6358_LDO_VLDO28_CON0_1 0x1d40
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#define MT6358_LDO_VLDO28_CON1 0x1d42
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#define MT6358_LDO_VLDO28_CON2 0x1d44
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#define MT6358_LDO_VLDO28_CON3 0x1d46
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#define MT6358_LDO_VSIM1_CON0 0x1d48
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#define MT6358_LDO_VSIM1_CON1 0x1d56
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#define MT6358_LDO_VSIM1_CON2 0x1d58
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#define MT6358_LDO_VSIM1_CON3 0x1d5a
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#define MT6358_LDO_VSIM2_CON0 0x1d5c
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#define MT6358_LDO_VSIM2_CON1 0x1d6a
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#define MT6358_LDO_VSIM2_CON2 0x1d6c
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#define MT6358_LDO_VSIM2_CON3 0x1d6e
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#define MT6358_LDO_VCN28_CON0 0x1d88
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#define MT6358_LDO_VCN28_CON1 0x1d96
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#define MT6358_LDO_VCN28_CON2 0x1d98
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#define MT6358_LDO_VCN28_CON3 0x1d9a
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#define MT6358_VRTC28_CON0 0x1d9c
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#define MT6358_LDO_VBIF28_CON0 0x1d9e
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#define MT6358_LDO_VBIF28_CON1 0x1dac
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#define MT6358_LDO_VBIF28_CON2 0x1dae
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#define MT6358_LDO_VBIF28_CON3 0x1db0
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#define MT6358_VCAMA1_ANA_CON0 0x1e08
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#define MT6358_VCAMA2_ANA_CON0 0x1e0c
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#define MT6358_VCN33_ANA_CON0 0x1e28
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#define MT6358_VSIM1_ANA_CON0 0x1e2c
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#define MT6358_VSIM2_ANA_CON0 0x1e30
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#define MT6358_VUSB_ANA_CON0 0x1e34
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#define MT6358_VEMC_ANA_CON0 0x1e38
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#define MT6358_VLDO28_ANA_CON0 0x1e3c
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#define MT6358_VIO28_ANA_CON0 0x1e40
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#define MT6358_VIBR_ANA_CON0 0x1e44
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#define MT6358_VMCH_ANA_CON0 0x1e48
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#define MT6358_VMC_ANA_CON0 0x1e4c
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#define MT6358_VRF18_ANA_CON0 0x1e88
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#define MT6358_VCN18_ANA_CON0 0x1e8c
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#define MT6358_VCAMIO_ANA_CON0 0x1e90
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#define MT6358_VIO18_ANA_CON0 0x1e94
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#define MT6358_VEFUSE_ANA_CON0 0x1e98
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#define MT6358_VRF12_ANA_CON0 0x1e9c
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#define MT6358_VSRAM_PROC11_ANA_CON0 0x1ea0
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#define MT6358_VSRAM_PROC12_ANA_CON0 0x1ea4
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#define MT6358_VSRAM_OTHERS_ANA_CON0 0x1ea6
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#define MT6358_VSRAM_GPU_ANA_CON0 0x1ea8
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#define MT6358_VDRAM2_ANA_CON0 0x1eaa
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#define MT6358_VCAMD_ANA_CON0 0x1eae
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#define MT6358_VA12_ANA_CON0 0x1eb2
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#define MT6358_AUD_TOP_INT_CON0 0x2228
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#define MT6358_AUD_TOP_INT_STATUS0 0x2234
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#endif /* __MFD_MT6358_REGISTERS_H__ */
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