354 lines
8.4 KiB
C
354 lines
8.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2010 Lars-Peter Clausen <lars@metafoo.de>
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* Copyright (C) 2015 Imagination Technologies
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*
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* Ingenic SoC UART support
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*/
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#include <linux/clk.h>
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#include <linux/console.h>
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#include <linux/io.h>
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#include <linux/libfdt.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_fdt.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_core.h>
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#include <linux/serial_reg.h>
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#include "8250.h"
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/** ingenic_uart_config: SOC specific config data. */
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struct ingenic_uart_config {
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int tx_loadsz;
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int fifosize;
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};
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struct ingenic_uart_data {
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struct clk *clk_module;
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struct clk *clk_baud;
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int line;
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};
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static const struct of_device_id of_match[];
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#define UART_FCR_UME BIT(4)
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#define UART_MCR_MDCE BIT(7)
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#define UART_MCR_FCM BIT(6)
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static struct earlycon_device *early_device;
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static uint8_t early_in(struct uart_port *port, int offset)
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{
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return readl(port->membase + (offset << 2));
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}
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static void early_out(struct uart_port *port, int offset, uint8_t value)
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{
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writel(value, port->membase + (offset << 2));
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}
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static void ingenic_early_console_putc(struct uart_port *port, unsigned char c)
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{
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u16 lsr;
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do {
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lsr = early_in(port, UART_LSR);
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} while ((lsr & UART_LSR_TEMT) == 0);
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early_out(port, UART_TX, c);
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}
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static void ingenic_early_console_write(struct console *console,
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const char *s, unsigned int count)
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{
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uart_console_write(&early_device->port, s, count,
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ingenic_early_console_putc);
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}
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static void __init ingenic_early_console_setup_clock(struct earlycon_device *dev)
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{
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void *fdt = initial_boot_params;
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const __be32 *prop;
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int offset;
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offset = fdt_path_offset(fdt, "/ext");
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if (offset < 0)
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return;
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prop = fdt_getprop(fdt, offset, "clock-frequency", NULL);
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if (!prop)
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return;
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dev->port.uartclk = be32_to_cpup(prop);
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}
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static int __init ingenic_early_console_setup(struct earlycon_device *dev,
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const char *opt)
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{
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struct uart_port *port = &dev->port;
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unsigned int divisor;
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int baud = 115200;
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if (!dev->port.membase)
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return -ENODEV;
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if (opt) {
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unsigned int parity, bits, flow; /* unused for now */
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uart_parse_options(opt, &baud, &parity, &bits, &flow);
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}
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ingenic_early_console_setup_clock(dev);
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if (dev->baud)
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baud = dev->baud;
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divisor = DIV_ROUND_CLOSEST(port->uartclk, 16 * baud);
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early_out(port, UART_IER, 0);
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early_out(port, UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8);
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early_out(port, UART_DLL, 0);
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early_out(port, UART_DLM, 0);
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early_out(port, UART_LCR, UART_LCR_WLEN8);
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early_out(port, UART_FCR, UART_FCR_UME | UART_FCR_CLEAR_XMIT |
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UART_FCR_CLEAR_RCVR | UART_FCR_ENABLE_FIFO);
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early_out(port, UART_MCR, UART_MCR_RTS | UART_MCR_DTR);
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early_out(port, UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8);
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early_out(port, UART_DLL, divisor & 0xff);
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early_out(port, UART_DLM, (divisor >> 8) & 0xff);
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early_out(port, UART_LCR, UART_LCR_WLEN8);
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early_device = dev;
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dev->con->write = ingenic_early_console_write;
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return 0;
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}
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OF_EARLYCON_DECLARE(jz4740_uart, "ingenic,jz4740-uart",
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ingenic_early_console_setup);
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OF_EARLYCON_DECLARE(jz4770_uart, "ingenic,jz4770-uart",
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ingenic_early_console_setup);
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OF_EARLYCON_DECLARE(jz4775_uart, "ingenic,jz4775-uart",
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ingenic_early_console_setup);
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OF_EARLYCON_DECLARE(jz4780_uart, "ingenic,jz4780-uart",
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ingenic_early_console_setup);
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OF_EARLYCON_DECLARE(x1000_uart, "ingenic,x1000-uart",
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ingenic_early_console_setup);
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static void ingenic_uart_serial_out(struct uart_port *p, int offset, int value)
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{
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int ier;
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switch (offset) {
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case UART_FCR:
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/* UART module enable */
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value |= UART_FCR_UME;
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break;
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case UART_IER:
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/*
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* Enable receive timeout interrupt with the receive line
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* status interrupt.
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*/
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value |= (value & 0x4) << 2;
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break;
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case UART_MCR:
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/*
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* If we have enabled modem status IRQs we should enable
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* modem mode.
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*/
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ier = p->serial_in(p, UART_IER);
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if (ier & UART_IER_MSI)
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value |= UART_MCR_MDCE | UART_MCR_FCM;
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else
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value &= ~(UART_MCR_MDCE | UART_MCR_FCM);
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break;
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default:
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break;
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}
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writeb(value, p->membase + (offset << p->regshift));
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}
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static unsigned int ingenic_uart_serial_in(struct uart_port *p, int offset)
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{
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unsigned int value;
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value = readb(p->membase + (offset << p->regshift));
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/* Hide non-16550 compliant bits from higher levels */
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switch (offset) {
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case UART_FCR:
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value &= ~UART_FCR_UME;
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break;
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case UART_MCR:
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value &= ~(UART_MCR_MDCE | UART_MCR_FCM);
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break;
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default:
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break;
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}
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return value;
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}
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static int ingenic_uart_probe(struct platform_device *pdev)
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{
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struct uart_8250_port uart = {};
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struct ingenic_uart_data *data;
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const struct ingenic_uart_config *cdata;
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struct resource *regs;
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int irq, err, line;
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cdata = of_device_get_match_data(&pdev->dev);
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if (!cdata) {
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dev_err(&pdev->dev, "Error: No device match found\n");
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return -ENODEV;
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}
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!regs) {
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dev_err(&pdev->dev, "no registers defined\n");
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return -EINVAL;
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}
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data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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spin_lock_init(&uart.port.lock);
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uart.port.type = PORT_16550A;
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uart.port.flags = UPF_SKIP_TEST | UPF_IOREMAP | UPF_FIXED_TYPE;
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uart.port.iotype = UPIO_MEM;
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uart.port.mapbase = regs->start;
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uart.port.regshift = 2;
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uart.port.serial_out = ingenic_uart_serial_out;
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uart.port.serial_in = ingenic_uart_serial_in;
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uart.port.irq = irq;
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uart.port.dev = &pdev->dev;
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uart.port.fifosize = cdata->fifosize;
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uart.tx_loadsz = cdata->tx_loadsz;
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uart.capabilities = UART_CAP_FIFO | UART_CAP_RTOIE;
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/* Check for a fixed line number */
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line = of_alias_get_id(pdev->dev.of_node, "serial");
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if (line >= 0)
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uart.port.line = line;
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uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
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resource_size(regs));
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if (!uart.port.membase)
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return -ENOMEM;
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data->clk_module = devm_clk_get(&pdev->dev, "module");
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if (IS_ERR(data->clk_module))
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return dev_err_probe(&pdev->dev, PTR_ERR(data->clk_module),
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"unable to get module clock\n");
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data->clk_baud = devm_clk_get(&pdev->dev, "baud");
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if (IS_ERR(data->clk_baud))
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return dev_err_probe(&pdev->dev, PTR_ERR(data->clk_baud),
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"unable to get baud clock\n");
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err = clk_prepare_enable(data->clk_module);
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if (err) {
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dev_err(&pdev->dev, "could not enable module clock: %d\n", err);
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goto out;
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}
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err = clk_prepare_enable(data->clk_baud);
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if (err) {
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dev_err(&pdev->dev, "could not enable baud clock: %d\n", err);
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goto out_disable_moduleclk;
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}
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uart.port.uartclk = clk_get_rate(data->clk_baud);
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data->line = serial8250_register_8250_port(&uart);
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if (data->line < 0) {
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err = data->line;
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goto out_disable_baudclk;
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}
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platform_set_drvdata(pdev, data);
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return 0;
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out_disable_baudclk:
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clk_disable_unprepare(data->clk_baud);
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out_disable_moduleclk:
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clk_disable_unprepare(data->clk_module);
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out:
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return err;
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}
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static int ingenic_uart_remove(struct platform_device *pdev)
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{
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struct ingenic_uart_data *data = platform_get_drvdata(pdev);
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serial8250_unregister_port(data->line);
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clk_disable_unprepare(data->clk_module);
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clk_disable_unprepare(data->clk_baud);
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return 0;
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}
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static const struct ingenic_uart_config jz4740_uart_config = {
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.tx_loadsz = 8,
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.fifosize = 16,
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};
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static const struct ingenic_uart_config jz4760_uart_config = {
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.tx_loadsz = 16,
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.fifosize = 32,
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};
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static const struct ingenic_uart_config jz4780_uart_config = {
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.tx_loadsz = 32,
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.fifosize = 64,
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};
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static const struct ingenic_uart_config x1000_uart_config = {
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.tx_loadsz = 32,
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.fifosize = 64,
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};
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static const struct of_device_id of_match[] = {
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{ .compatible = "ingenic,jz4740-uart", .data = &jz4740_uart_config },
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{ .compatible = "ingenic,jz4760-uart", .data = &jz4760_uart_config },
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{ .compatible = "ingenic,jz4770-uart", .data = &jz4760_uart_config },
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{ .compatible = "ingenic,jz4775-uart", .data = &jz4760_uart_config },
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{ .compatible = "ingenic,jz4780-uart", .data = &jz4780_uart_config },
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{ .compatible = "ingenic,x1000-uart", .data = &x1000_uart_config },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, of_match);
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static struct platform_driver ingenic_uart_platform_driver = {
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.driver = {
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.name = "ingenic-uart",
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.of_match_table = of_match,
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},
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.probe = ingenic_uart_probe,
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.remove = ingenic_uart_remove,
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};
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module_platform_driver(ingenic_uart_platform_driver);
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MODULE_AUTHOR("Paul Burton");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Ingenic SoC UART driver");
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