631 lines
15 KiB
C
631 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* NVM helpers
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*
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* Copyright (C) 2020, Intel Corporation
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* Author: Mika Westerberg <mika.westerberg@linux.intel.com>
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*/
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#include <linux/idr.h>
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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#include "tb.h"
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/* Intel specific NVM offsets */
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#define INTEL_NVM_DEVID 0x05
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#define INTEL_NVM_VERSION 0x08
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#define INTEL_NVM_CSS 0x10
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#define INTEL_NVM_FLASH_SIZE 0x45
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/* ASMedia specific NVM offsets */
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#define ASMEDIA_NVM_DATE 0x1c
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#define ASMEDIA_NVM_VERSION 0x28
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static DEFINE_IDA(nvm_ida);
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/**
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* struct tb_nvm_vendor_ops - Vendor specific NVM operations
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* @read_version: Reads out NVM version from the flash
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* @validate: Validates the NVM image before update (optional)
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* @write_headers: Writes headers before the rest of the image (optional)
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*/
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struct tb_nvm_vendor_ops {
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int (*read_version)(struct tb_nvm *nvm);
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int (*validate)(struct tb_nvm *nvm);
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int (*write_headers)(struct tb_nvm *nvm);
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};
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/**
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* struct tb_nvm_vendor - Vendor to &struct tb_nvm_vendor_ops mapping
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* @vendor: Vendor ID
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* @vops: Vendor specific NVM operations
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*
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* Maps vendor ID to NVM vendor operations. If there is no mapping then
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* NVM firmware upgrade is disabled for the device.
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*/
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struct tb_nvm_vendor {
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u16 vendor;
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const struct tb_nvm_vendor_ops *vops;
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};
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static int intel_switch_nvm_version(struct tb_nvm *nvm)
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{
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struct tb_switch *sw = tb_to_switch(nvm->dev);
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u32 val, nvm_size, hdr_size;
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int ret;
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/*
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* If the switch is in safe-mode the only accessible portion of
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* the NVM is the non-active one where userspace is expected to
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* write new functional NVM.
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*/
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if (sw->safe_mode)
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return 0;
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ret = tb_switch_nvm_read(sw, INTEL_NVM_FLASH_SIZE, &val, sizeof(val));
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if (ret)
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return ret;
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hdr_size = sw->generation < 3 ? SZ_8K : SZ_16K;
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nvm_size = (SZ_1M << (val & 7)) / 8;
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nvm_size = (nvm_size - hdr_size) / 2;
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ret = tb_switch_nvm_read(sw, INTEL_NVM_VERSION, &val, sizeof(val));
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if (ret)
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return ret;
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nvm->major = (val >> 16) & 0xff;
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nvm->minor = (val >> 8) & 0xff;
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nvm->active_size = nvm_size;
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return 0;
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}
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static int intel_switch_nvm_validate(struct tb_nvm *nvm)
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{
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struct tb_switch *sw = tb_to_switch(nvm->dev);
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unsigned int image_size, hdr_size;
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u16 ds_size, device_id;
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u8 *buf = nvm->buf;
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image_size = nvm->buf_data_size;
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/*
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* FARB pointer must point inside the image and must at least
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* contain parts of the digital section we will be reading here.
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*/
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hdr_size = (*(u32 *)buf) & 0xffffff;
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if (hdr_size + INTEL_NVM_DEVID + 2 >= image_size)
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return -EINVAL;
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/* Digital section start should be aligned to 4k page */
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if (!IS_ALIGNED(hdr_size, SZ_4K))
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return -EINVAL;
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/*
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* Read digital section size and check that it also fits inside
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* the image.
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*/
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ds_size = *(u16 *)(buf + hdr_size);
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if (ds_size >= image_size)
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return -EINVAL;
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if (sw->safe_mode)
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return 0;
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/*
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* Make sure the device ID in the image matches the one
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* we read from the switch config space.
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*/
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device_id = *(u16 *)(buf + hdr_size + INTEL_NVM_DEVID);
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if (device_id != sw->config.device_id)
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return -EINVAL;
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/* Skip headers in the image */
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nvm->buf_data_start = buf + hdr_size;
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nvm->buf_data_size = image_size - hdr_size;
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return 0;
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}
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static int intel_switch_nvm_write_headers(struct tb_nvm *nvm)
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{
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struct tb_switch *sw = tb_to_switch(nvm->dev);
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if (sw->generation < 3) {
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int ret;
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/* Write CSS headers first */
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ret = dma_port_flash_write(sw->dma_port,
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DMA_PORT_CSS_ADDRESS, nvm->buf + INTEL_NVM_CSS,
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DMA_PORT_CSS_MAX_SIZE);
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if (ret)
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return ret;
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}
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return 0;
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}
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static const struct tb_nvm_vendor_ops intel_switch_nvm_ops = {
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.read_version = intel_switch_nvm_version,
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.validate = intel_switch_nvm_validate,
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.write_headers = intel_switch_nvm_write_headers,
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};
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static int asmedia_switch_nvm_version(struct tb_nvm *nvm)
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{
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struct tb_switch *sw = tb_to_switch(nvm->dev);
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u32 val;
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int ret;
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ret = tb_switch_nvm_read(sw, ASMEDIA_NVM_VERSION, &val, sizeof(val));
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if (ret)
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return ret;
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nvm->major = (val << 16) & 0xff0000;
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nvm->major |= val & 0x00ff00;
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nvm->major |= (val >> 16) & 0x0000ff;
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ret = tb_switch_nvm_read(sw, ASMEDIA_NVM_DATE, &val, sizeof(val));
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if (ret)
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return ret;
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nvm->minor = (val << 16) & 0xff0000;
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nvm->minor |= val & 0x00ff00;
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nvm->minor |= (val >> 16) & 0x0000ff;
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/* ASMedia NVM size is fixed to 512k */
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nvm->active_size = SZ_512K;
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return 0;
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}
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static const struct tb_nvm_vendor_ops asmedia_switch_nvm_ops = {
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.read_version = asmedia_switch_nvm_version,
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};
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/* Router vendor NVM support table */
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static const struct tb_nvm_vendor switch_nvm_vendors[] = {
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{ 0x174c, &asmedia_switch_nvm_ops },
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{ PCI_VENDOR_ID_INTEL, &intel_switch_nvm_ops },
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{ 0x8087, &intel_switch_nvm_ops },
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};
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static int intel_retimer_nvm_version(struct tb_nvm *nvm)
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{
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struct tb_retimer *rt = tb_to_retimer(nvm->dev);
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u32 val, nvm_size;
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int ret;
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ret = tb_retimer_nvm_read(rt, INTEL_NVM_VERSION, &val, sizeof(val));
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if (ret)
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return ret;
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nvm->major = (val >> 16) & 0xff;
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nvm->minor = (val >> 8) & 0xff;
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ret = tb_retimer_nvm_read(rt, INTEL_NVM_FLASH_SIZE, &val, sizeof(val));
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if (ret)
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return ret;
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nvm_size = (SZ_1M << (val & 7)) / 8;
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nvm_size = (nvm_size - SZ_16K) / 2;
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nvm->active_size = nvm_size;
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return 0;
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}
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static int intel_retimer_nvm_validate(struct tb_nvm *nvm)
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{
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struct tb_retimer *rt = tb_to_retimer(nvm->dev);
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unsigned int image_size, hdr_size;
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u8 *buf = nvm->buf;
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u16 ds_size, device;
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image_size = nvm->buf_data_size;
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/*
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* FARB pointer must point inside the image and must at least
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* contain parts of the digital section we will be reading here.
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*/
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hdr_size = (*(u32 *)buf) & 0xffffff;
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if (hdr_size + INTEL_NVM_DEVID + 2 >= image_size)
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return -EINVAL;
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/* Digital section start should be aligned to 4k page */
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if (!IS_ALIGNED(hdr_size, SZ_4K))
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return -EINVAL;
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/*
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* Read digital section size and check that it also fits inside
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* the image.
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*/
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ds_size = *(u16 *)(buf + hdr_size);
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if (ds_size >= image_size)
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return -EINVAL;
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/*
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* Make sure the device ID in the image matches the retimer
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* hardware.
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*/
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device = *(u16 *)(buf + hdr_size + INTEL_NVM_DEVID);
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if (device != rt->device)
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return -EINVAL;
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/* Skip headers in the image */
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nvm->buf_data_start = buf + hdr_size;
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nvm->buf_data_size = image_size - hdr_size;
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return 0;
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}
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static const struct tb_nvm_vendor_ops intel_retimer_nvm_ops = {
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.read_version = intel_retimer_nvm_version,
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.validate = intel_retimer_nvm_validate,
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};
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/* Retimer vendor NVM support table */
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static const struct tb_nvm_vendor retimer_nvm_vendors[] = {
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{ 0x8087, &intel_retimer_nvm_ops },
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};
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/**
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* tb_nvm_alloc() - Allocate new NVM structure
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* @dev: Device owning the NVM
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*
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* Allocates new NVM structure with unique @id and returns it. In case
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* of error returns ERR_PTR(). Specifically returns %-EOPNOTSUPP if the
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* NVM format of the @dev is not known by the kernel.
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*/
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struct tb_nvm *tb_nvm_alloc(struct device *dev)
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{
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const struct tb_nvm_vendor_ops *vops = NULL;
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struct tb_nvm *nvm;
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int ret, i;
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if (tb_is_switch(dev)) {
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const struct tb_switch *sw = tb_to_switch(dev);
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for (i = 0; i < ARRAY_SIZE(switch_nvm_vendors); i++) {
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const struct tb_nvm_vendor *v = &switch_nvm_vendors[i];
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if (v->vendor == sw->config.vendor_id) {
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vops = v->vops;
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break;
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}
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}
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if (!vops) {
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tb_sw_dbg(sw, "router NVM format of vendor %#x unknown\n",
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sw->config.vendor_id);
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return ERR_PTR(-EOPNOTSUPP);
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}
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} else if (tb_is_retimer(dev)) {
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const struct tb_retimer *rt = tb_to_retimer(dev);
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for (i = 0; i < ARRAY_SIZE(retimer_nvm_vendors); i++) {
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const struct tb_nvm_vendor *v = &retimer_nvm_vendors[i];
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if (v->vendor == rt->vendor) {
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vops = v->vops;
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break;
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}
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}
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if (!vops) {
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dev_dbg(dev, "retimer NVM format of vendor %#x unknown\n",
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rt->vendor);
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return ERR_PTR(-EOPNOTSUPP);
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}
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} else {
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return ERR_PTR(-EOPNOTSUPP);
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}
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nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
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if (!nvm)
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return ERR_PTR(-ENOMEM);
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ret = ida_simple_get(&nvm_ida, 0, 0, GFP_KERNEL);
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if (ret < 0) {
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kfree(nvm);
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return ERR_PTR(ret);
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}
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nvm->id = ret;
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nvm->dev = dev;
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nvm->vops = vops;
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return nvm;
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}
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/**
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* tb_nvm_read_version() - Read and populate NVM version
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* @nvm: NVM structure
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*
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* Uses vendor specific means to read out and fill in the existing
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* active NVM version. Returns %0 in case of success and negative errno
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* otherwise.
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*/
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int tb_nvm_read_version(struct tb_nvm *nvm)
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{
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const struct tb_nvm_vendor_ops *vops = nvm->vops;
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if (vops && vops->read_version)
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return vops->read_version(nvm);
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return -EOPNOTSUPP;
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}
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/**
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* tb_nvm_validate() - Validate new NVM image
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* @nvm: NVM structure
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*
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* Runs vendor specific validation over the new NVM image and if all
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* checks pass returns %0. As side effect updates @nvm->buf_data_start
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* and @nvm->buf_data_size fields to match the actual data to be written
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* to the NVM.
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*
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* If the validation does not pass then returns negative errno.
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*/
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int tb_nvm_validate(struct tb_nvm *nvm)
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{
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const struct tb_nvm_vendor_ops *vops = nvm->vops;
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unsigned int image_size;
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u8 *buf = nvm->buf;
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if (!buf)
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return -EINVAL;
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if (!vops)
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return -EOPNOTSUPP;
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/* Just do basic image size checks */
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image_size = nvm->buf_data_size;
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if (image_size < NVM_MIN_SIZE || image_size > NVM_MAX_SIZE)
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return -EINVAL;
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/*
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* Set the default data start in the buffer. The validate method
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* below can change this if needed.
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*/
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nvm->buf_data_start = buf;
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return vops->validate ? vops->validate(nvm) : 0;
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}
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/**
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* tb_nvm_write_headers() - Write headers before the rest of the image
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* @nvm: NVM structure
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*
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* If the vendor NVM format requires writing headers before the rest of
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* the image, this function does that. Can be called even if the device
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* does not need this.
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*
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* Returns %0 in case of success and negative errno otherwise.
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*/
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int tb_nvm_write_headers(struct tb_nvm *nvm)
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{
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const struct tb_nvm_vendor_ops *vops = nvm->vops;
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return vops->write_headers ? vops->write_headers(nvm) : 0;
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}
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/**
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* tb_nvm_add_active() - Adds active NVMem device to NVM
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* @nvm: NVM structure
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* @reg_read: Pointer to the function to read the NVM (passed directly to the
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* NVMem device)
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*
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* Registers new active NVmem device for @nvm. The @reg_read is called
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* directly from NVMem so it must handle possible concurrent access if
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* needed. The first parameter passed to @reg_read is @nvm structure.
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* Returns %0 in success and negative errno otherwise.
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*/
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int tb_nvm_add_active(struct tb_nvm *nvm, nvmem_reg_read_t reg_read)
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{
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struct nvmem_config config;
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struct nvmem_device *nvmem;
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memset(&config, 0, sizeof(config));
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config.name = "nvm_active";
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config.reg_read = reg_read;
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config.read_only = true;
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config.id = nvm->id;
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config.stride = 4;
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config.word_size = 4;
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config.size = nvm->active_size;
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config.dev = nvm->dev;
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config.owner = THIS_MODULE;
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config.priv = nvm;
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nvmem = nvmem_register(&config);
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if (IS_ERR(nvmem))
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return PTR_ERR(nvmem);
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nvm->active = nvmem;
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return 0;
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}
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/**
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* tb_nvm_write_buf() - Write data to @nvm buffer
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* @nvm: NVM structure
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* @offset: Offset where to write the data
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* @val: Data buffer to write
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* @bytes: Number of bytes to write
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*
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* Helper function to cache the new NVM image before it is actually
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* written to the flash. Copies @bytes from @val to @nvm->buf starting
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* from @offset.
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*/
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int tb_nvm_write_buf(struct tb_nvm *nvm, unsigned int offset, void *val,
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size_t bytes)
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{
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if (!nvm->buf) {
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nvm->buf = vmalloc(NVM_MAX_SIZE);
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if (!nvm->buf)
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return -ENOMEM;
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}
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nvm->flushed = false;
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nvm->buf_data_size = offset + bytes;
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memcpy(nvm->buf + offset, val, bytes);
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return 0;
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}
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/**
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* tb_nvm_add_non_active() - Adds non-active NVMem device to NVM
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* @nvm: NVM structure
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* @reg_write: Pointer to the function to write the NVM (passed directly
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* to the NVMem device)
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*
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* Registers new non-active NVmem device for @nvm. The @reg_write is called
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* directly from NVMem so it must handle possible concurrent access if
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* needed. The first parameter passed to @reg_write is @nvm structure.
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* The size of the NVMem device is set to %NVM_MAX_SIZE.
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*
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* Returns %0 in success and negative errno otherwise.
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*/
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int tb_nvm_add_non_active(struct tb_nvm *nvm, nvmem_reg_write_t reg_write)
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{
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struct nvmem_config config;
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struct nvmem_device *nvmem;
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memset(&config, 0, sizeof(config));
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config.name = "nvm_non_active";
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config.reg_write = reg_write;
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config.root_only = true;
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config.id = nvm->id;
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config.stride = 4;
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config.word_size = 4;
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config.size = NVM_MAX_SIZE;
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config.dev = nvm->dev;
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config.owner = THIS_MODULE;
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config.priv = nvm;
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nvmem = nvmem_register(&config);
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if (IS_ERR(nvmem))
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return PTR_ERR(nvmem);
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nvm->non_active = nvmem;
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return 0;
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}
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/**
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* tb_nvm_free() - Release NVM and its resources
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* @nvm: NVM structure to release
|
|
*
|
|
* Releases NVM and the NVMem devices if they were registered.
|
|
*/
|
|
void tb_nvm_free(struct tb_nvm *nvm)
|
|
{
|
|
if (nvm) {
|
|
nvmem_unregister(nvm->non_active);
|
|
nvmem_unregister(nvm->active);
|
|
vfree(nvm->buf);
|
|
ida_simple_remove(&nvm_ida, nvm->id);
|
|
}
|
|
kfree(nvm);
|
|
}
|
|
|
|
/**
|
|
* tb_nvm_read_data() - Read data from NVM
|
|
* @address: Start address on the flash
|
|
* @buf: Buffer where the read data is copied
|
|
* @size: Size of the buffer in bytes
|
|
* @retries: Number of retries if block read fails
|
|
* @read_block: Function that reads block from the flash
|
|
* @read_block_data: Data passsed to @read_block
|
|
*
|
|
* This is a generic function that reads data from NVM or NVM like
|
|
* device.
|
|
*
|
|
* Returns %0 on success and negative errno otherwise.
|
|
*/
|
|
int tb_nvm_read_data(unsigned int address, void *buf, size_t size,
|
|
unsigned int retries, read_block_fn read_block,
|
|
void *read_block_data)
|
|
{
|
|
do {
|
|
unsigned int dwaddress, dwords, offset;
|
|
u8 data[NVM_DATA_DWORDS * 4];
|
|
size_t nbytes;
|
|
int ret;
|
|
|
|
offset = address & 3;
|
|
nbytes = min_t(size_t, size + offset, NVM_DATA_DWORDS * 4);
|
|
|
|
dwaddress = address / 4;
|
|
dwords = ALIGN(nbytes, 4) / 4;
|
|
|
|
ret = read_block(read_block_data, dwaddress, data, dwords);
|
|
if (ret) {
|
|
if (ret != -ENODEV && retries--)
|
|
continue;
|
|
return ret;
|
|
}
|
|
|
|
nbytes -= offset;
|
|
memcpy(buf, data + offset, nbytes);
|
|
|
|
size -= nbytes;
|
|
address += nbytes;
|
|
buf += nbytes;
|
|
} while (size > 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* tb_nvm_write_data() - Write data to NVM
|
|
* @address: Start address on the flash
|
|
* @buf: Buffer where the data is copied from
|
|
* @size: Size of the buffer in bytes
|
|
* @retries: Number of retries if the block write fails
|
|
* @write_block: Function that writes block to the flash
|
|
* @write_block_data: Data passwd to @write_block
|
|
*
|
|
* This is generic function that writes data to NVM or NVM like device.
|
|
*
|
|
* Returns %0 on success and negative errno otherwise.
|
|
*/
|
|
int tb_nvm_write_data(unsigned int address, const void *buf, size_t size,
|
|
unsigned int retries, write_block_fn write_block,
|
|
void *write_block_data)
|
|
{
|
|
do {
|
|
unsigned int offset, dwaddress;
|
|
u8 data[NVM_DATA_DWORDS * 4];
|
|
size_t nbytes;
|
|
int ret;
|
|
|
|
offset = address & 3;
|
|
nbytes = min_t(u32, size + offset, NVM_DATA_DWORDS * 4);
|
|
|
|
memcpy(data + offset, buf, nbytes);
|
|
|
|
dwaddress = address / 4;
|
|
ret = write_block(write_block_data, dwaddress, data, nbytes / 4);
|
|
if (ret) {
|
|
if (ret == -ETIMEDOUT) {
|
|
if (retries--)
|
|
continue;
|
|
ret = -EIO;
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
size -= nbytes;
|
|
address += nbytes;
|
|
buf += nbytes;
|
|
} while (size > 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void tb_nvm_exit(void)
|
|
{
|
|
ida_destroy(&nvm_ida);
|
|
}
|