347 lines
9.0 KiB
C
347 lines
9.0 KiB
C
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/* Copyright 2020 NXP
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* Lynx PCS MDIO helpers
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*/
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#include <linux/mdio.h>
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#include <linux/phylink.h>
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#include <linux/pcs-lynx.h>
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#define SGMII_CLOCK_PERIOD_NS 8 /* PCS is clocked at 125 MHz */
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#define LINK_TIMER_VAL(ns) ((u32)((ns) / SGMII_CLOCK_PERIOD_NS))
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#define SGMII_AN_LINK_TIMER_NS 1600000 /* defined by SGMII spec */
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#define IEEE8023_LINK_TIMER_NS 10000000
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#define LINK_TIMER_LO 0x12
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#define LINK_TIMER_HI 0x13
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#define IF_MODE 0x14
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#define IF_MODE_SGMII_EN BIT(0)
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#define IF_MODE_USE_SGMII_AN BIT(1)
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#define IF_MODE_SPEED(x) (((x) << 2) & GENMASK(3, 2))
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#define IF_MODE_SPEED_MSK GENMASK(3, 2)
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#define IF_MODE_HALF_DUPLEX BIT(4)
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struct lynx_pcs {
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struct phylink_pcs pcs;
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struct mdio_device *mdio;
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};
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enum sgmii_speed {
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SGMII_SPEED_10 = 0,
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SGMII_SPEED_100 = 1,
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SGMII_SPEED_1000 = 2,
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SGMII_SPEED_2500 = 2,
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};
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#define phylink_pcs_to_lynx(pl_pcs) container_of((pl_pcs), struct lynx_pcs, pcs)
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#define lynx_to_phylink_pcs(lynx) (&(lynx)->pcs)
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struct mdio_device *lynx_get_mdio_device(struct phylink_pcs *pcs)
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{
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struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
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return lynx->mdio;
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}
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EXPORT_SYMBOL(lynx_get_mdio_device);
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static void lynx_pcs_get_state_usxgmii(struct mdio_device *pcs,
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struct phylink_link_state *state)
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{
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struct mii_bus *bus = pcs->bus;
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int addr = pcs->addr;
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int status, lpa;
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status = mdiobus_c45_read(bus, addr, MDIO_MMD_VEND2, MII_BMSR);
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if (status < 0)
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return;
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state->link = !!(status & MDIO_STAT1_LSTATUS);
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state->an_complete = !!(status & MDIO_AN_STAT1_COMPLETE);
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if (!state->link || !state->an_complete)
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return;
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lpa = mdiobus_c45_read(bus, addr, MDIO_MMD_VEND2, MII_LPA);
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if (lpa < 0)
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return;
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phylink_decode_usxgmii_word(state, lpa);
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}
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static void lynx_pcs_get_state_2500basex(struct mdio_device *pcs,
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struct phylink_link_state *state)
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{
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int bmsr, lpa;
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bmsr = mdiodev_read(pcs, MII_BMSR);
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lpa = mdiodev_read(pcs, MII_LPA);
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if (bmsr < 0 || lpa < 0) {
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state->link = false;
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return;
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}
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state->link = !!(bmsr & BMSR_LSTATUS);
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state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
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if (!state->link)
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return;
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state->speed = SPEED_2500;
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state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;
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state->duplex = DUPLEX_FULL;
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}
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static void lynx_pcs_get_state(struct phylink_pcs *pcs,
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struct phylink_link_state *state)
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{
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struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
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switch (state->interface) {
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case PHY_INTERFACE_MODE_1000BASEX:
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_QSGMII:
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phylink_mii_c22_pcs_get_state(lynx->mdio, state);
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break;
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case PHY_INTERFACE_MODE_2500BASEX:
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lynx_pcs_get_state_2500basex(lynx->mdio, state);
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break;
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case PHY_INTERFACE_MODE_USXGMII:
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lynx_pcs_get_state_usxgmii(lynx->mdio, state);
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break;
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case PHY_INTERFACE_MODE_10GBASER:
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phylink_mii_c45_pcs_get_state(lynx->mdio, state);
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break;
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default:
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break;
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}
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dev_dbg(&lynx->mdio->dev,
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"mode=%s/%s/%s link=%u an_enabled=%u an_complete=%u\n",
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phy_modes(state->interface),
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phy_speed_to_str(state->speed),
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phy_duplex_to_str(state->duplex),
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state->link, state->an_enabled, state->an_complete);
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}
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static int lynx_pcs_config_giga(struct mdio_device *pcs, unsigned int mode,
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phy_interface_t interface,
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const unsigned long *advertising)
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{
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u32 link_timer;
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u16 if_mode;
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int err;
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if (interface == PHY_INTERFACE_MODE_1000BASEX) {
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link_timer = LINK_TIMER_VAL(IEEE8023_LINK_TIMER_NS);
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mdiodev_write(pcs, LINK_TIMER_LO, link_timer & 0xffff);
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mdiodev_write(pcs, LINK_TIMER_HI, link_timer >> 16);
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if_mode = 0;
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} else {
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if_mode = IF_MODE_SGMII_EN;
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if (mode == MLO_AN_INBAND) {
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if_mode |= IF_MODE_USE_SGMII_AN;
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/* Adjust link timer for SGMII */
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link_timer = LINK_TIMER_VAL(SGMII_AN_LINK_TIMER_NS);
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mdiodev_write(pcs, LINK_TIMER_LO, link_timer & 0xffff);
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mdiodev_write(pcs, LINK_TIMER_HI, link_timer >> 16);
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}
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}
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err = mdiodev_modify(pcs, IF_MODE,
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IF_MODE_SGMII_EN | IF_MODE_USE_SGMII_AN,
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if_mode);
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if (err)
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return err;
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return phylink_mii_c22_pcs_config(pcs, mode, interface, advertising);
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}
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static int lynx_pcs_config_usxgmii(struct mdio_device *pcs, unsigned int mode,
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const unsigned long *advertising)
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{
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struct mii_bus *bus = pcs->bus;
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int addr = pcs->addr;
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if (!phylink_autoneg_inband(mode)) {
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dev_err(&pcs->dev, "USXGMII only supports in-band AN for now\n");
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return -EOPNOTSUPP;
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}
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/* Configure device ability for the USXGMII Replicator */
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return mdiobus_c45_write(bus, addr, MDIO_MMD_VEND2, MII_ADVERTISE,
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MDIO_USXGMII_10G | MDIO_USXGMII_LINK |
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MDIO_USXGMII_FULL_DUPLEX |
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ADVERTISE_SGMII | ADVERTISE_LPACK);
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}
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static int lynx_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
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phy_interface_t ifmode,
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const unsigned long *advertising,
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bool permit)
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{
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struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
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switch (ifmode) {
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case PHY_INTERFACE_MODE_1000BASEX:
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_QSGMII:
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return lynx_pcs_config_giga(lynx->mdio, mode, ifmode,
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advertising);
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case PHY_INTERFACE_MODE_2500BASEX:
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if (phylink_autoneg_inband(mode)) {
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dev_err(&lynx->mdio->dev,
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"AN not supported on 3.125GHz SerDes lane\n");
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return -EOPNOTSUPP;
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}
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break;
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case PHY_INTERFACE_MODE_USXGMII:
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return lynx_pcs_config_usxgmii(lynx->mdio, mode, advertising);
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case PHY_INTERFACE_MODE_10GBASER:
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/* Nothing to do here for 10GBASER */
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break;
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default:
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return -EOPNOTSUPP;
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}
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return 0;
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}
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static void lynx_pcs_an_restart(struct phylink_pcs *pcs)
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{
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struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
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phylink_mii_c22_pcs_an_restart(lynx->mdio);
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}
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static void lynx_pcs_link_up_sgmii(struct mdio_device *pcs, unsigned int mode,
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int speed, int duplex)
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{
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u16 if_mode = 0, sgmii_speed;
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/* The PCS needs to be configured manually only
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* when not operating on in-band mode
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*/
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if (mode == MLO_AN_INBAND)
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return;
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if (duplex == DUPLEX_HALF)
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if_mode |= IF_MODE_HALF_DUPLEX;
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switch (speed) {
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case SPEED_1000:
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sgmii_speed = SGMII_SPEED_1000;
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break;
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case SPEED_100:
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sgmii_speed = SGMII_SPEED_100;
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break;
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case SPEED_10:
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sgmii_speed = SGMII_SPEED_10;
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break;
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case SPEED_UNKNOWN:
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/* Silently don't do anything */
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return;
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default:
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dev_err(&pcs->dev, "Invalid PCS speed %d\n", speed);
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return;
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}
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if_mode |= IF_MODE_SPEED(sgmii_speed);
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mdiodev_modify(pcs, IF_MODE,
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IF_MODE_HALF_DUPLEX | IF_MODE_SPEED_MSK,
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if_mode);
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}
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/* 2500Base-X is SerDes protocol 7 on Felix and 6 on ENETC. It is a SerDes lane
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* clocked at 3.125 GHz which encodes symbols with 8b/10b and does not have
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* auto-negotiation of any link parameters. Electrically it is compatible with
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* a single lane of XAUI.
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* The hardware reference manual wants to call this mode SGMII, but it isn't
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* really, since the fundamental features of SGMII:
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* - Downgrading the link speed by duplicating symbols
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* - Auto-negotiation
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* are not there.
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* The speed is configured at 1000 in the IF_MODE because the clock frequency
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* is actually given by a PLL configured in the Reset Configuration Word (RCW).
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* Since there is no difference between fixed speed SGMII w/o AN and 802.3z w/o
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* AN, we call this PHY interface type 2500Base-X. In case a PHY negotiates a
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* lower link speed on line side, the system-side interface remains fixed at
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* 2500 Mbps and we do rate adaptation through pause frames.
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*/
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static void lynx_pcs_link_up_2500basex(struct mdio_device *pcs,
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unsigned int mode,
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int speed, int duplex)
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{
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u16 if_mode = 0;
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if (mode == MLO_AN_INBAND) {
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dev_err(&pcs->dev, "AN not supported for 2500BaseX\n");
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return;
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}
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if (duplex == DUPLEX_HALF)
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if_mode |= IF_MODE_HALF_DUPLEX;
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if_mode |= IF_MODE_SPEED(SGMII_SPEED_2500);
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mdiodev_modify(pcs, IF_MODE,
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IF_MODE_HALF_DUPLEX | IF_MODE_SPEED_MSK,
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if_mode);
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}
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static void lynx_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
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phy_interface_t interface,
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int speed, int duplex)
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{
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struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
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switch (interface) {
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_QSGMII:
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lynx_pcs_link_up_sgmii(lynx->mdio, mode, speed, duplex);
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break;
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case PHY_INTERFACE_MODE_2500BASEX:
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lynx_pcs_link_up_2500basex(lynx->mdio, mode, speed, duplex);
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break;
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case PHY_INTERFACE_MODE_USXGMII:
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/* At the moment, only in-band AN is supported for USXGMII
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* so nothing to do in link_up
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*/
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break;
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default:
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break;
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}
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}
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static const struct phylink_pcs_ops lynx_pcs_phylink_ops = {
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.pcs_get_state = lynx_pcs_get_state,
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.pcs_config = lynx_pcs_config,
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.pcs_an_restart = lynx_pcs_an_restart,
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.pcs_link_up = lynx_pcs_link_up,
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};
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struct phylink_pcs *lynx_pcs_create(struct mdio_device *mdio)
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{
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struct lynx_pcs *lynx;
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lynx = kzalloc(sizeof(*lynx), GFP_KERNEL);
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if (!lynx)
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return NULL;
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lynx->mdio = mdio;
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lynx->pcs.ops = &lynx_pcs_phylink_ops;
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lynx->pcs.poll = true;
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return lynx_to_phylink_pcs(lynx);
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}
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EXPORT_SYMBOL(lynx_pcs_create);
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void lynx_pcs_destroy(struct phylink_pcs *pcs)
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{
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struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
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kfree(lynx);
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}
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EXPORT_SYMBOL(lynx_pcs_destroy);
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MODULE_LICENSE("Dual BSD/GPL");
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