585 lines
15 KiB
C
585 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright © 2018 Broadcom
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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* Boris Brezillon <boris.brezillon@bootlin.com>
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*/
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/of_graph.h>
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#include <linux/of_platform.h>
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#include <linux/pm_runtime.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_fb_dma_helper.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_framebuffer.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_vblank.h>
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#include <drm/drm_writeback.h>
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#include "vc4_drv.h"
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#include "vc4_regs.h"
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/* Base address of the output. Raster formats must be 4-byte aligned,
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* T and LT must be 16-byte aligned or maybe utile-aligned (docs are
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* inconsistent, but probably utile).
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*/
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#define TXP_DST_PTR 0x00
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/* Pitch in bytes for raster images, 16-byte aligned. For tiled, it's
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* the width in tiles.
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*/
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#define TXP_DST_PITCH 0x04
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/* For T-tiled imgaes, DST_PITCH should be the number of tiles wide,
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* shifted up.
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*/
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# define TXP_T_TILE_WIDTH_SHIFT 7
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/* For LT-tiled images, DST_PITCH should be the number of utiles wide,
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* shifted up.
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*/
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# define TXP_LT_TILE_WIDTH_SHIFT 4
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/* Pre-rotation width/height of the image. Must match HVS config.
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*
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* If TFORMAT and 32-bit, limit is 1920 for 32-bit and 3840 to 16-bit
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* and width/height must be tile or utile-aligned as appropriate. If
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* transposing (rotating), width is limited to 1920.
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*
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* Height is limited to various numbers between 4088 and 4095. I'd
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* just use 4088 to be safe.
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*/
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#define TXP_DIM 0x08
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# define TXP_HEIGHT_SHIFT 16
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# define TXP_HEIGHT_MASK GENMASK(31, 16)
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# define TXP_WIDTH_SHIFT 0
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# define TXP_WIDTH_MASK GENMASK(15, 0)
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#define TXP_DST_CTRL 0x0c
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/* These bits are set to 0x54 */
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#define TXP_PILOT_SHIFT 24
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#define TXP_PILOT_MASK GENMASK(31, 24)
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/* Bits 22-23 are set to 0x01 */
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#define TXP_VERSION_SHIFT 22
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#define TXP_VERSION_MASK GENMASK(23, 22)
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/* Powers down the internal memory. */
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# define TXP_POWERDOWN BIT(21)
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/* Enables storing the alpha component in 8888/4444, instead of
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* filling with ~ALPHA_INVERT.
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*/
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# define TXP_ALPHA_ENABLE BIT(20)
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/* 4 bits, each enables stores for a channel in each set of 4 bytes.
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* Set to 0xf for normal operation.
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*/
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# define TXP_BYTE_ENABLE_SHIFT 16
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# define TXP_BYTE_ENABLE_MASK GENMASK(19, 16)
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/* Debug: Generate VSTART again at EOF. */
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# define TXP_VSTART_AT_EOF BIT(15)
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/* Debug: Terminate the current frame immediately. Stops AXI
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* writes.
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*/
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# define TXP_ABORT BIT(14)
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# define TXP_DITHER BIT(13)
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/* Inverts alpha if TXP_ALPHA_ENABLE, chooses fill value for
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* !TXP_ALPHA_ENABLE.
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*/
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# define TXP_ALPHA_INVERT BIT(12)
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/* Note: I've listed the channels here in high bit (in byte 3/2/1) to
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* low bit (in byte 0) order.
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*/
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# define TXP_FORMAT_SHIFT 8
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# define TXP_FORMAT_MASK GENMASK(11, 8)
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# define TXP_FORMAT_ABGR4444 0
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# define TXP_FORMAT_ARGB4444 1
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# define TXP_FORMAT_BGRA4444 2
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# define TXP_FORMAT_RGBA4444 3
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# define TXP_FORMAT_BGR565 6
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# define TXP_FORMAT_RGB565 7
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/* 888s are non-rotated, raster-only */
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# define TXP_FORMAT_BGR888 8
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# define TXP_FORMAT_RGB888 9
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# define TXP_FORMAT_ABGR8888 12
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# define TXP_FORMAT_ARGB8888 13
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# define TXP_FORMAT_BGRA8888 14
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# define TXP_FORMAT_RGBA8888 15
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/* If TFORMAT is set, generates LT instead of T format. */
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# define TXP_LINEAR_UTILE BIT(7)
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/* Rotate output by 90 degrees. */
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# define TXP_TRANSPOSE BIT(6)
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/* Generate a tiled format for V3D. */
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# define TXP_TFORMAT BIT(5)
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/* Generates some undefined test mode output. */
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# define TXP_TEST_MODE BIT(4)
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/* Request odd field from HVS. */
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# define TXP_FIELD BIT(3)
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/* Raise interrupt when idle. */
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# define TXP_EI BIT(2)
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/* Set when generating a frame, clears when idle. */
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# define TXP_BUSY BIT(1)
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/* Starts a frame. Self-clearing. */
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# define TXP_GO BIT(0)
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/* Number of lines received and committed to memory. */
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#define TXP_PROGRESS 0x10
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#define TXP_READ(offset) readl(txp->regs + (offset))
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#define TXP_WRITE(offset, val) writel(val, txp->regs + (offset))
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struct vc4_txp {
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struct vc4_crtc base;
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struct platform_device *pdev;
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struct drm_writeback_connector connector;
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void __iomem *regs;
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};
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static inline struct vc4_txp *encoder_to_vc4_txp(struct drm_encoder *encoder)
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{
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return container_of(encoder, struct vc4_txp, connector.encoder);
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}
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static inline struct vc4_txp *connector_to_vc4_txp(struct drm_connector *conn)
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{
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return container_of(conn, struct vc4_txp, connector.base);
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}
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static const struct debugfs_reg32 txp_regs[] = {
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VC4_REG32(TXP_DST_PTR),
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VC4_REG32(TXP_DST_PITCH),
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VC4_REG32(TXP_DIM),
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VC4_REG32(TXP_DST_CTRL),
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VC4_REG32(TXP_PROGRESS),
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};
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static int vc4_txp_connector_get_modes(struct drm_connector *connector)
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{
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struct drm_device *dev = connector->dev;
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return drm_add_modes_noedid(connector, dev->mode_config.max_width,
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dev->mode_config.max_height);
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}
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static enum drm_mode_status
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vc4_txp_connector_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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struct drm_device *dev = connector->dev;
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struct drm_mode_config *mode_config = &dev->mode_config;
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int w = mode->hdisplay, h = mode->vdisplay;
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if (w < mode_config->min_width || w > mode_config->max_width)
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return MODE_BAD_HVALUE;
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if (h < mode_config->min_height || h > mode_config->max_height)
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return MODE_BAD_VVALUE;
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return MODE_OK;
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}
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static const u32 drm_fmts[] = {
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DRM_FORMAT_RGB888,
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DRM_FORMAT_BGR888,
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_XBGR8888,
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_ABGR8888,
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DRM_FORMAT_RGBX8888,
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DRM_FORMAT_BGRX8888,
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DRM_FORMAT_RGBA8888,
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DRM_FORMAT_BGRA8888,
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};
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static const u32 txp_fmts[] = {
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TXP_FORMAT_RGB888,
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TXP_FORMAT_BGR888,
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TXP_FORMAT_ARGB8888,
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TXP_FORMAT_ABGR8888,
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TXP_FORMAT_ARGB8888,
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TXP_FORMAT_ABGR8888,
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TXP_FORMAT_RGBA8888,
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TXP_FORMAT_BGRA8888,
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TXP_FORMAT_RGBA8888,
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TXP_FORMAT_BGRA8888,
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};
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static void vc4_txp_armed(struct drm_crtc_state *state)
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{
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struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state);
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vc4_state->txp_armed = true;
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}
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static int vc4_txp_connector_atomic_check(struct drm_connector *conn,
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struct drm_atomic_state *state)
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{
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struct drm_connector_state *conn_state;
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struct drm_crtc_state *crtc_state;
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struct drm_framebuffer *fb;
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int i;
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conn_state = drm_atomic_get_new_connector_state(state, conn);
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if (!conn_state->writeback_job)
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return 0;
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crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
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fb = conn_state->writeback_job->fb;
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if (fb->width != crtc_state->mode.hdisplay ||
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fb->height != crtc_state->mode.vdisplay) {
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DRM_DEBUG_KMS("Invalid framebuffer size %ux%u\n",
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fb->width, fb->height);
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return -EINVAL;
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}
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for (i = 0; i < ARRAY_SIZE(drm_fmts); i++) {
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if (fb->format->format == drm_fmts[i])
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break;
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}
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if (i == ARRAY_SIZE(drm_fmts))
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return -EINVAL;
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/* Pitch must be aligned on 16 bytes. */
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if (fb->pitches[0] & GENMASK(3, 0))
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return -EINVAL;
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vc4_txp_armed(crtc_state);
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return 0;
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}
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static void vc4_txp_connector_atomic_commit(struct drm_connector *conn,
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struct drm_atomic_state *state)
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{
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struct drm_device *drm = conn->dev;
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struct drm_connector_state *conn_state = drm_atomic_get_new_connector_state(state,
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conn);
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struct vc4_txp *txp = connector_to_vc4_txp(conn);
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struct drm_gem_dma_object *gem;
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struct drm_display_mode *mode;
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struct drm_framebuffer *fb;
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u32 ctrl;
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int idx;
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int i;
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if (WARN_ON(!conn_state->writeback_job))
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return;
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mode = &conn_state->crtc->state->adjusted_mode;
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fb = conn_state->writeback_job->fb;
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for (i = 0; i < ARRAY_SIZE(drm_fmts); i++) {
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if (fb->format->format == drm_fmts[i])
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break;
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}
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if (WARN_ON(i == ARRAY_SIZE(drm_fmts)))
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return;
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ctrl = TXP_GO | TXP_EI |
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VC4_SET_FIELD(0xf, TXP_BYTE_ENABLE) |
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VC4_SET_FIELD(txp_fmts[i], TXP_FORMAT);
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if (fb->format->has_alpha)
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ctrl |= TXP_ALPHA_ENABLE;
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else
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/*
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* If TXP_ALPHA_ENABLE isn't set and TXP_ALPHA_INVERT is, the
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* hardware will force the output padding to be 0xff.
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*/
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ctrl |= TXP_ALPHA_INVERT;
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if (!drm_dev_enter(drm, &idx))
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return;
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gem = drm_fb_dma_get_gem_obj(fb, 0);
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TXP_WRITE(TXP_DST_PTR, gem->dma_addr + fb->offsets[0]);
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TXP_WRITE(TXP_DST_PITCH, fb->pitches[0]);
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TXP_WRITE(TXP_DIM,
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VC4_SET_FIELD(mode->hdisplay, TXP_WIDTH) |
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VC4_SET_FIELD(mode->vdisplay, TXP_HEIGHT));
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TXP_WRITE(TXP_DST_CTRL, ctrl);
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drm_writeback_queue_job(&txp->connector, conn_state);
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drm_dev_exit(idx);
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}
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static const struct drm_connector_helper_funcs vc4_txp_connector_helper_funcs = {
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.get_modes = vc4_txp_connector_get_modes,
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.mode_valid = vc4_txp_connector_mode_valid,
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.atomic_check = vc4_txp_connector_atomic_check,
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.atomic_commit = vc4_txp_connector_atomic_commit,
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};
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static enum drm_connector_status
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vc4_txp_connector_detect(struct drm_connector *connector, bool force)
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{
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return connector_status_connected;
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}
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static const struct drm_connector_funcs vc4_txp_connector_funcs = {
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.detect = vc4_txp_connector_detect,
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.fill_modes = drm_helper_probe_single_connector_modes,
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.destroy = drm_connector_cleanup,
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.reset = drm_atomic_helper_connector_reset,
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.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
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};
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static void vc4_txp_encoder_disable(struct drm_encoder *encoder)
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{
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struct drm_device *drm = encoder->dev;
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struct vc4_txp *txp = encoder_to_vc4_txp(encoder);
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int idx;
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if (!drm_dev_enter(drm, &idx))
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return;
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if (TXP_READ(TXP_DST_CTRL) & TXP_BUSY) {
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unsigned long timeout = jiffies + msecs_to_jiffies(1000);
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TXP_WRITE(TXP_DST_CTRL, TXP_ABORT);
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while (TXP_READ(TXP_DST_CTRL) & TXP_BUSY &&
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time_before(jiffies, timeout))
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;
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WARN_ON(TXP_READ(TXP_DST_CTRL) & TXP_BUSY);
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}
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TXP_WRITE(TXP_DST_CTRL, TXP_POWERDOWN);
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drm_dev_exit(idx);
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}
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static const struct drm_encoder_helper_funcs vc4_txp_encoder_helper_funcs = {
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.disable = vc4_txp_encoder_disable,
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};
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static int vc4_txp_enable_vblank(struct drm_crtc *crtc)
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{
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return 0;
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}
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static void vc4_txp_disable_vblank(struct drm_crtc *crtc) {}
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static const struct drm_crtc_funcs vc4_txp_crtc_funcs = {
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.set_config = drm_atomic_helper_set_config,
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.page_flip = vc4_page_flip,
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.reset = vc4_crtc_reset,
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.atomic_duplicate_state = vc4_crtc_duplicate_state,
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.atomic_destroy_state = vc4_crtc_destroy_state,
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.enable_vblank = vc4_txp_enable_vblank,
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.disable_vblank = vc4_txp_disable_vblank,
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.late_register = vc4_crtc_late_register,
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};
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static int vc4_txp_atomic_check(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
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crtc);
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int ret;
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ret = vc4_hvs_atomic_check(crtc, state);
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if (ret)
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return ret;
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crtc_state->no_vblank = true;
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return 0;
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}
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static void vc4_txp_atomic_enable(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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drm_crtc_vblank_on(crtc);
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vc4_hvs_atomic_enable(crtc, state);
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}
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static void vc4_txp_atomic_disable(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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struct drm_device *dev = crtc->dev;
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/* Disable vblank irq handling before crtc is disabled. */
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drm_crtc_vblank_off(crtc);
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vc4_hvs_atomic_disable(crtc, state);
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/*
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* Make sure we issue a vblank event after disabling the CRTC if
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* someone was waiting it.
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*/
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if (crtc->state->event) {
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unsigned long flags;
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spin_lock_irqsave(&dev->event_lock, flags);
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drm_crtc_send_vblank_event(crtc, crtc->state->event);
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crtc->state->event = NULL;
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spin_unlock_irqrestore(&dev->event_lock, flags);
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}
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}
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static const struct drm_crtc_helper_funcs vc4_txp_crtc_helper_funcs = {
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.atomic_check = vc4_txp_atomic_check,
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.atomic_begin = vc4_hvs_atomic_begin,
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.atomic_flush = vc4_hvs_atomic_flush,
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.atomic_enable = vc4_txp_atomic_enable,
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.atomic_disable = vc4_txp_atomic_disable,
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};
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static irqreturn_t vc4_txp_interrupt(int irq, void *data)
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{
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struct vc4_txp *txp = data;
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struct vc4_crtc *vc4_crtc = &txp->base;
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/*
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* We don't need to protect the register access using
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* drm_dev_enter() there because the interrupt handler lifetime
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* is tied to the device itself, and not to the DRM device.
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*
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* So when the device will be gone, one of the first thing we
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* will be doing will be to unregister the interrupt handler,
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* and then unregister the DRM device. drm_dev_enter() would
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* thus always succeed if we are here.
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*/
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TXP_WRITE(TXP_DST_CTRL, TXP_READ(TXP_DST_CTRL) & ~TXP_EI);
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vc4_crtc_handle_vblank(vc4_crtc);
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drm_writeback_signal_completion(&txp->connector, 0);
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return IRQ_HANDLED;
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}
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static const struct vc4_crtc_data vc4_txp_crtc_data = {
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.debugfs_name = "txp_regs",
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.hvs_available_channels = BIT(2),
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.hvs_output = 2,
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};
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static int vc4_txp_bind(struct device *dev, struct device *master, void *data)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct drm_device *drm = dev_get_drvdata(master);
|
|
struct vc4_crtc *vc4_crtc;
|
|
struct vc4_txp *txp;
|
|
struct drm_crtc *crtc;
|
|
struct drm_encoder *encoder;
|
|
int ret, irq;
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
if (irq < 0)
|
|
return irq;
|
|
|
|
txp = drmm_kzalloc(drm, sizeof(*txp), GFP_KERNEL);
|
|
if (!txp)
|
|
return -ENOMEM;
|
|
vc4_crtc = &txp->base;
|
|
crtc = &vc4_crtc->base;
|
|
|
|
vc4_crtc->pdev = pdev;
|
|
vc4_crtc->data = &vc4_txp_crtc_data;
|
|
vc4_crtc->feeds_txp = true;
|
|
|
|
txp->pdev = pdev;
|
|
|
|
txp->regs = vc4_ioremap_regs(pdev, 0);
|
|
if (IS_ERR(txp->regs))
|
|
return PTR_ERR(txp->regs);
|
|
vc4_crtc->regset.base = txp->regs;
|
|
vc4_crtc->regset.regs = txp_regs;
|
|
vc4_crtc->regset.nregs = ARRAY_SIZE(txp_regs);
|
|
|
|
drm_connector_helper_add(&txp->connector.base,
|
|
&vc4_txp_connector_helper_funcs);
|
|
ret = drm_writeback_connector_init(drm, &txp->connector,
|
|
&vc4_txp_connector_funcs,
|
|
&vc4_txp_encoder_helper_funcs,
|
|
drm_fmts, ARRAY_SIZE(drm_fmts),
|
|
0);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = vc4_crtc_init(drm, vc4_crtc,
|
|
&vc4_txp_crtc_funcs, &vc4_txp_crtc_helper_funcs);
|
|
if (ret)
|
|
return ret;
|
|
|
|
encoder = &txp->connector.encoder;
|
|
encoder->possible_crtcs = drm_crtc_mask(crtc);
|
|
|
|
ret = devm_request_irq(dev, irq, vc4_txp_interrupt, 0,
|
|
dev_name(dev), txp);
|
|
if (ret)
|
|
return ret;
|
|
|
|
dev_set_drvdata(dev, txp);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void vc4_txp_unbind(struct device *dev, struct device *master,
|
|
void *data)
|
|
{
|
|
struct vc4_txp *txp = dev_get_drvdata(dev);
|
|
|
|
drm_connector_cleanup(&txp->connector.base);
|
|
}
|
|
|
|
static const struct component_ops vc4_txp_ops = {
|
|
.bind = vc4_txp_bind,
|
|
.unbind = vc4_txp_unbind,
|
|
};
|
|
|
|
static int vc4_txp_probe(struct platform_device *pdev)
|
|
{
|
|
return component_add(&pdev->dev, &vc4_txp_ops);
|
|
}
|
|
|
|
static int vc4_txp_remove(struct platform_device *pdev)
|
|
{
|
|
component_del(&pdev->dev, &vc4_txp_ops);
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id vc4_txp_dt_match[] = {
|
|
{ .compatible = "brcm,bcm2835-txp" },
|
|
{ /* sentinel */ },
|
|
};
|
|
|
|
struct platform_driver vc4_txp_driver = {
|
|
.probe = vc4_txp_probe,
|
|
.remove = vc4_txp_remove,
|
|
.driver = {
|
|
.name = "vc4_txp",
|
|
.of_match_table = vc4_txp_dt_match,
|
|
},
|
|
};
|