565 lines
15 KiB
C
565 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Versatile family (ARM reference designs) handling for the PL11x.
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* This is based on code and know-how in the previous frame buffer
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* driver in drivers/video/fbdev/amba-clcd.c:
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* Copyright (C) 2001 ARM Limited, by David A Rusling
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* Updated to 2.5 by Deep Blue Solutions Ltd.
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* Major contributions and discoveries by Russell King.
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*/
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#include <linux/bitops.h>
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#include <linux/device.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/regmap.h>
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#include <linux/vexpress.h>
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#include <drm/drm_fourcc.h>
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#include "pl111_versatile.h"
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#include "pl111_drm.h"
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static struct regmap *versatile_syscon_map;
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/*
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* We detect the different syscon types from the compatible strings.
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*/
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enum versatile_clcd {
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INTEGRATOR_IMPD1,
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INTEGRATOR_CLCD_CM,
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VERSATILE_CLCD,
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REALVIEW_CLCD_EB,
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REALVIEW_CLCD_PB1176,
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REALVIEW_CLCD_PB11MP,
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REALVIEW_CLCD_PBA8,
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REALVIEW_CLCD_PBX,
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VEXPRESS_CLCD_V2M,
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};
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static const struct of_device_id versatile_clcd_of_match[] = {
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{
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.compatible = "arm,core-module-integrator",
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.data = (void *)INTEGRATOR_CLCD_CM,
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},
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{
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.compatible = "arm,versatile-sysreg",
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.data = (void *)VERSATILE_CLCD,
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},
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{
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.compatible = "arm,realview-eb-syscon",
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.data = (void *)REALVIEW_CLCD_EB,
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},
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{
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.compatible = "arm,realview-pb1176-syscon",
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.data = (void *)REALVIEW_CLCD_PB1176,
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},
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{
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.compatible = "arm,realview-pb11mp-syscon",
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.data = (void *)REALVIEW_CLCD_PB11MP,
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},
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{
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.compatible = "arm,realview-pba8-syscon",
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.data = (void *)REALVIEW_CLCD_PBA8,
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},
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{
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.compatible = "arm,realview-pbx-syscon",
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.data = (void *)REALVIEW_CLCD_PBX,
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},
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{
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.compatible = "arm,vexpress-muxfpga",
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.data = (void *)VEXPRESS_CLCD_V2M,
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},
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{},
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};
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static const struct of_device_id impd1_clcd_of_match[] = {
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{
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.compatible = "arm,im-pd1-syscon",
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.data = (void *)INTEGRATOR_IMPD1,
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},
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{},
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};
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/*
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* Core module CLCD control on the Integrator/CP, bits
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* 8 thru 19 of the CM_CONTROL register controls a bunch
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* of CLCD settings.
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*/
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#define INTEGRATOR_HDR_CTRL_OFFSET 0x0C
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#define INTEGRATOR_CLCD_LCDBIASEN BIT(8)
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#define INTEGRATOR_CLCD_LCDBIASUP BIT(9)
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#define INTEGRATOR_CLCD_LCDBIASDN BIT(10)
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/* Bits 11,12,13 controls the LCD or VGA bridge type */
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#define INTEGRATOR_CLCD_LCDMUX_LCD24 BIT(11)
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#define INTEGRATOR_CLCD_LCDMUX_SHARP (BIT(11)|BIT(12))
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#define INTEGRATOR_CLCD_LCDMUX_VGA555 BIT(13)
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#define INTEGRATOR_CLCD_LCDMUX_VGA24 (BIT(11)|BIT(12)|BIT(13))
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#define INTEGRATOR_CLCD_LCD0_EN BIT(14)
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#define INTEGRATOR_CLCD_LCD1_EN BIT(15)
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/* R/L flip on Sharp */
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#define INTEGRATOR_CLCD_LCD_STATIC1 BIT(16)
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/* U/D flip on Sharp */
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#define INTEGRATOR_CLCD_LCD_STATIC2 BIT(17)
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/* No connection on Sharp */
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#define INTEGRATOR_CLCD_LCD_STATIC BIT(18)
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/* 0 = 24bit VGA, 1 = 18bit VGA */
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#define INTEGRATOR_CLCD_LCD_N24BITEN BIT(19)
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#define INTEGRATOR_CLCD_MASK GENMASK(19, 8)
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static void pl111_integrator_enable(struct drm_device *drm, u32 format)
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{
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u32 val;
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dev_info(drm->dev, "enable Integrator CLCD connectors\n");
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/* FIXME: really needed? */
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val = INTEGRATOR_CLCD_LCD_STATIC1 | INTEGRATOR_CLCD_LCD_STATIC2 |
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INTEGRATOR_CLCD_LCD0_EN | INTEGRATOR_CLCD_LCD1_EN;
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switch (format) {
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case DRM_FORMAT_XBGR8888:
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case DRM_FORMAT_XRGB8888:
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/* 24bit formats */
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val |= INTEGRATOR_CLCD_LCDMUX_VGA24;
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break;
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case DRM_FORMAT_XBGR1555:
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case DRM_FORMAT_XRGB1555:
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/* Pseudocolor, RGB555, BGR555 */
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val |= INTEGRATOR_CLCD_LCDMUX_VGA555;
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break;
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default:
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dev_err(drm->dev, "unhandled format on Integrator 0x%08x\n",
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format);
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break;
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}
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regmap_update_bits(versatile_syscon_map,
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INTEGRATOR_HDR_CTRL_OFFSET,
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INTEGRATOR_CLCD_MASK,
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val);
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}
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#define IMPD1_CTRL_OFFSET 0x18
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#define IMPD1_CTRL_DISP_LCD (0 << 0)
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#define IMPD1_CTRL_DISP_VGA (1 << 0)
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#define IMPD1_CTRL_DISP_LCD1 (2 << 0)
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#define IMPD1_CTRL_DISP_ENABLE (1 << 2)
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#define IMPD1_CTRL_DISP_MASK (7 << 0)
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static void pl111_impd1_enable(struct drm_device *drm, u32 format)
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{
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u32 val;
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dev_info(drm->dev, "enable IM-PD1 CLCD connectors\n");
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val = IMPD1_CTRL_DISP_VGA | IMPD1_CTRL_DISP_ENABLE;
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regmap_update_bits(versatile_syscon_map,
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IMPD1_CTRL_OFFSET,
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IMPD1_CTRL_DISP_MASK,
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val);
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}
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static void pl111_impd1_disable(struct drm_device *drm)
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{
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dev_info(drm->dev, "disable IM-PD1 CLCD connectors\n");
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regmap_update_bits(versatile_syscon_map,
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IMPD1_CTRL_OFFSET,
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IMPD1_CTRL_DISP_MASK,
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0);
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}
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/*
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* This configuration register in the Versatile and RealView
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* family is uniformly present but appears more and more
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* unutilized starting with the RealView series.
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*/
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#define SYS_CLCD 0x50
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#define SYS_CLCD_MODE_MASK (BIT(0)|BIT(1))
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#define SYS_CLCD_MODE_888 0
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#define SYS_CLCD_MODE_5551 BIT(0)
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#define SYS_CLCD_MODE_565_R_LSB BIT(1)
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#define SYS_CLCD_MODE_565_B_LSB (BIT(0)|BIT(1))
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#define SYS_CLCD_CONNECTOR_MASK (BIT(2)|BIT(3)|BIT(4)|BIT(5))
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#define SYS_CLCD_NLCDIOON BIT(2)
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#define SYS_CLCD_VDDPOSSWITCH BIT(3)
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#define SYS_CLCD_PWR3V5SWITCH BIT(4)
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#define SYS_CLCD_VDDNEGSWITCH BIT(5)
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static void pl111_versatile_disable(struct drm_device *drm)
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{
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dev_info(drm->dev, "disable Versatile CLCD connectors\n");
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regmap_update_bits(versatile_syscon_map,
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SYS_CLCD,
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SYS_CLCD_CONNECTOR_MASK,
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0);
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}
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static void pl111_versatile_enable(struct drm_device *drm, u32 format)
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{
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u32 val = 0;
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dev_info(drm->dev, "enable Versatile CLCD connectors\n");
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switch (format) {
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case DRM_FORMAT_ABGR8888:
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case DRM_FORMAT_XBGR8888:
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case DRM_FORMAT_ARGB8888:
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case DRM_FORMAT_XRGB8888:
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val |= SYS_CLCD_MODE_888;
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break;
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case DRM_FORMAT_BGR565:
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val |= SYS_CLCD_MODE_565_R_LSB;
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break;
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case DRM_FORMAT_RGB565:
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val |= SYS_CLCD_MODE_565_B_LSB;
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break;
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case DRM_FORMAT_ABGR1555:
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case DRM_FORMAT_XBGR1555:
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case DRM_FORMAT_ARGB1555:
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case DRM_FORMAT_XRGB1555:
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val |= SYS_CLCD_MODE_5551;
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break;
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default:
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dev_err(drm->dev, "unhandled format on Versatile 0x%08x\n",
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format);
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break;
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}
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/* Set up the MUX */
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regmap_update_bits(versatile_syscon_map,
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SYS_CLCD,
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SYS_CLCD_MODE_MASK,
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val);
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/* Then enable the display */
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regmap_update_bits(versatile_syscon_map,
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SYS_CLCD,
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SYS_CLCD_CONNECTOR_MASK,
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SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH);
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}
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static void pl111_realview_clcd_disable(struct drm_device *drm)
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{
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dev_info(drm->dev, "disable RealView CLCD connectors\n");
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regmap_update_bits(versatile_syscon_map,
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SYS_CLCD,
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SYS_CLCD_CONNECTOR_MASK,
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0);
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}
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static void pl111_realview_clcd_enable(struct drm_device *drm, u32 format)
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{
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dev_info(drm->dev, "enable RealView CLCD connectors\n");
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regmap_update_bits(versatile_syscon_map,
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SYS_CLCD,
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SYS_CLCD_CONNECTOR_MASK,
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SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH);
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}
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/* PL110 pixel formats for Integrator, vanilla PL110 */
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static const u32 pl110_integrator_pixel_formats[] = {
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DRM_FORMAT_ABGR8888,
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DRM_FORMAT_XBGR8888,
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_ABGR1555,
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DRM_FORMAT_XBGR1555,
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DRM_FORMAT_ARGB1555,
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DRM_FORMAT_XRGB1555,
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};
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/* Extended PL110 pixel formats for Integrator and Versatile */
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static const u32 pl110_versatile_pixel_formats[] = {
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DRM_FORMAT_ABGR8888,
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DRM_FORMAT_XBGR8888,
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_BGR565, /* Uses external PLD */
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DRM_FORMAT_RGB565, /* Uses external PLD */
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DRM_FORMAT_ABGR1555,
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DRM_FORMAT_XBGR1555,
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DRM_FORMAT_ARGB1555,
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DRM_FORMAT_XRGB1555,
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};
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static const u32 pl111_realview_pixel_formats[] = {
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DRM_FORMAT_ABGR8888,
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DRM_FORMAT_XBGR8888,
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_BGR565,
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DRM_FORMAT_RGB565,
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DRM_FORMAT_ABGR1555,
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DRM_FORMAT_XBGR1555,
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DRM_FORMAT_ARGB1555,
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DRM_FORMAT_XRGB1555,
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DRM_FORMAT_ABGR4444,
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DRM_FORMAT_XBGR4444,
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DRM_FORMAT_ARGB4444,
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DRM_FORMAT_XRGB4444,
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};
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/*
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* The Integrator variant is a PL110 with a bunch of broken, or not
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* yet implemented features
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*/
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static const struct pl111_variant_data pl110_integrator = {
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.name = "PL110 Integrator",
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.is_pl110 = true,
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.broken_clockdivider = true,
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.broken_vblank = true,
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.formats = pl110_integrator_pixel_formats,
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.nformats = ARRAY_SIZE(pl110_integrator_pixel_formats),
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.fb_bpp = 16,
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};
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/*
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* The IM-PD1 variant is a PL110 with a bunch of broken, or not
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* yet implemented features
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*/
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static const struct pl111_variant_data pl110_impd1 = {
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.name = "PL110 IM-PD1",
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.is_pl110 = true,
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.broken_clockdivider = true,
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.broken_vblank = true,
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.formats = pl110_integrator_pixel_formats,
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.nformats = ARRAY_SIZE(pl110_integrator_pixel_formats),
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.fb_bpp = 16,
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};
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/*
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* This is the in-between PL110 variant found in the ARM Versatile,
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* supporting RGB565/BGR565
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*/
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static const struct pl111_variant_data pl110_versatile = {
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.name = "PL110 Versatile",
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.is_pl110 = true,
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.external_bgr = true,
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.formats = pl110_versatile_pixel_formats,
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.nformats = ARRAY_SIZE(pl110_versatile_pixel_formats),
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.fb_bpp = 16,
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};
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/*
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* RealView PL111 variant, the only real difference from the vanilla
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* PL111 is that we select 16bpp framebuffer by default to be able
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* to get 1024x768 without saturating the memory bus.
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*/
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static const struct pl111_variant_data pl111_realview = {
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.name = "PL111 RealView",
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.formats = pl111_realview_pixel_formats,
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.nformats = ARRAY_SIZE(pl111_realview_pixel_formats),
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.fb_bpp = 16,
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};
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/*
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* Versatile Express PL111 variant, again we just push the maximum
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* BPP to 16 to be able to get 1024x768 without saturating the memory
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* bus. The clockdivider also seems broken on the Versatile Express.
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*/
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static const struct pl111_variant_data pl111_vexpress = {
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.name = "PL111 Versatile Express",
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.formats = pl111_realview_pixel_formats,
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.nformats = ARRAY_SIZE(pl111_realview_pixel_formats),
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.fb_bpp = 16,
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.broken_clockdivider = true,
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};
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#define VEXPRESS_FPGAMUX_MOTHERBOARD 0x00
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#define VEXPRESS_FPGAMUX_DAUGHTERBOARD_1 0x01
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#define VEXPRESS_FPGAMUX_DAUGHTERBOARD_2 0x02
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static int pl111_vexpress_clcd_init(struct device *dev, struct device_node *np,
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struct pl111_drm_dev_private *priv)
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{
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struct platform_device *pdev;
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struct device_node *root;
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struct device_node *child;
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struct device_node *ct_clcd = NULL;
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struct regmap *map;
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bool has_coretile_clcd = false;
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bool has_coretile_hdlcd = false;
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bool mux_motherboard = true;
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u32 val;
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int ret;
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if (!IS_ENABLED(CONFIG_VEXPRESS_CONFIG))
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return -ENODEV;
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/*
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* Check if we have a CLCD or HDLCD on the core tile by checking if a
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* CLCD or HDLCD is available in the root of the device tree.
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*/
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root = of_find_node_by_path("/");
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if (!root)
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return -EINVAL;
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for_each_available_child_of_node(root, child) {
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if (of_device_is_compatible(child, "arm,pl111")) {
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has_coretile_clcd = true;
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ct_clcd = child;
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of_node_put(child);
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break;
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}
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if (of_device_is_compatible(child, "arm,hdlcd")) {
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has_coretile_hdlcd = true;
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of_node_put(child);
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break;
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}
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}
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of_node_put(root);
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/*
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* If there is a coretile HDLCD and it has a driver,
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* do not mux the CLCD on the motherboard to the DVI.
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*/
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if (has_coretile_hdlcd && IS_ENABLED(CONFIG_DRM_HDLCD))
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mux_motherboard = false;
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/*
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* On the Vexpress CA9 we let the CLCD on the coretile
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* take precedence, so also in this case do not mux the
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* motherboard to the DVI.
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*/
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if (has_coretile_clcd)
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mux_motherboard = false;
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if (mux_motherboard) {
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dev_info(dev, "DVI muxed to motherboard CLCD\n");
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val = VEXPRESS_FPGAMUX_MOTHERBOARD;
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} else if (ct_clcd == dev->of_node) {
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dev_info(dev,
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"DVI muxed to daughterboard 1 (core tile) CLCD\n");
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val = VEXPRESS_FPGAMUX_DAUGHTERBOARD_1;
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} else {
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dev_info(dev, "core tile graphics present\n");
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dev_info(dev, "this device will be deactivated\n");
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return -ENODEV;
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}
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/* Call into deep Vexpress configuration API */
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pdev = of_find_device_by_node(np);
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if (!pdev) {
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dev_err(dev, "can't find the sysreg device, deferring\n");
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return -EPROBE_DEFER;
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}
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map = devm_regmap_init_vexpress_config(&pdev->dev);
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if (IS_ERR(map)) {
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platform_device_put(pdev);
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return PTR_ERR(map);
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}
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ret = regmap_write(map, 0, val);
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platform_device_put(pdev);
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if (ret) {
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dev_err(dev, "error setting DVI muxmode\n");
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return -ENODEV;
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}
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priv->variant = &pl111_vexpress;
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dev_info(dev, "initializing Versatile Express PL111\n");
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return 0;
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}
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int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv)
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{
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const struct of_device_id *clcd_id;
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enum versatile_clcd versatile_clcd_type;
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struct device_node *np;
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struct regmap *map;
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np = of_find_matching_node_and_match(NULL, versatile_clcd_of_match,
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&clcd_id);
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if (!np) {
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/* Non-ARM reference designs, just bail out */
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|
return 0;
|
|
}
|
|
|
|
versatile_clcd_type = (enum versatile_clcd)clcd_id->data;
|
|
|
|
/* Versatile Express special handling */
|
|
if (versatile_clcd_type == VEXPRESS_CLCD_V2M) {
|
|
int ret = pl111_vexpress_clcd_init(dev, np, priv);
|
|
of_node_put(np);
|
|
if (ret)
|
|
dev_err(dev, "Versatile Express init failed - %d", ret);
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* On the Integrator, check if we should use the IM-PD1 instead,
|
|
* if we find it, it will take precedence. This is on the Integrator/AP
|
|
* which only has this option for PL110 graphics.
|
|
*/
|
|
if (versatile_clcd_type == INTEGRATOR_CLCD_CM) {
|
|
np = of_find_matching_node_and_match(NULL, impd1_clcd_of_match,
|
|
&clcd_id);
|
|
if (np)
|
|
versatile_clcd_type = (enum versatile_clcd)clcd_id->data;
|
|
}
|
|
|
|
map = syscon_node_to_regmap(np);
|
|
of_node_put(np);
|
|
if (IS_ERR(map)) {
|
|
dev_err(dev, "no Versatile syscon regmap\n");
|
|
return PTR_ERR(map);
|
|
}
|
|
|
|
switch (versatile_clcd_type) {
|
|
case INTEGRATOR_CLCD_CM:
|
|
versatile_syscon_map = map;
|
|
priv->variant = &pl110_integrator;
|
|
priv->variant_display_enable = pl111_integrator_enable;
|
|
dev_info(dev, "set up callbacks for Integrator PL110\n");
|
|
break;
|
|
case INTEGRATOR_IMPD1:
|
|
versatile_syscon_map = map;
|
|
priv->variant = &pl110_impd1;
|
|
priv->variant_display_enable = pl111_impd1_enable;
|
|
priv->variant_display_disable = pl111_impd1_disable;
|
|
dev_info(dev, "set up callbacks for IM-PD1 PL110\n");
|
|
break;
|
|
case VERSATILE_CLCD:
|
|
versatile_syscon_map = map;
|
|
/* This can do RGB565 with external PLD */
|
|
priv->variant = &pl110_versatile;
|
|
priv->variant_display_enable = pl111_versatile_enable;
|
|
priv->variant_display_disable = pl111_versatile_disable;
|
|
/*
|
|
* The Versatile has a variant halfway between PL110
|
|
* and PL111 where these two registers have already been
|
|
* swapped.
|
|
*/
|
|
priv->ienb = CLCD_PL111_IENB;
|
|
priv->ctrl = CLCD_PL111_CNTL;
|
|
dev_info(dev, "set up callbacks for Versatile PL110\n");
|
|
break;
|
|
case REALVIEW_CLCD_EB:
|
|
case REALVIEW_CLCD_PB1176:
|
|
case REALVIEW_CLCD_PB11MP:
|
|
case REALVIEW_CLCD_PBA8:
|
|
case REALVIEW_CLCD_PBX:
|
|
versatile_syscon_map = map;
|
|
priv->variant = &pl111_realview;
|
|
priv->variant_display_enable = pl111_realview_clcd_enable;
|
|
priv->variant_display_disable = pl111_realview_clcd_disable;
|
|
dev_info(dev, "set up callbacks for RealView PL111\n");
|
|
break;
|
|
default:
|
|
dev_info(dev, "unknown Versatile system controller\n");
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(pl111_versatile_init);
|