308 lines
6.9 KiB
C
308 lines
6.9 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2021 Intel Corporation
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*/
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#define NUM_STEPS 5
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#define H2G_DELAY 50000
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#define delay_for_h2g() usleep_range(H2G_DELAY, H2G_DELAY + 10000)
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#define FREQUENCY_REQ_UNIT DIV_ROUND_CLOSEST(GT_FREQUENCY_MULTIPLIER, \
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GEN9_FREQ_SCALER)
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enum test_type {
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VARY_MIN,
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VARY_MAX,
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MAX_GRANTED
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};
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static int slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 freq)
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{
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int ret;
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ret = intel_guc_slpc_set_min_freq(slpc, freq);
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if (ret)
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pr_err("Could not set min frequency to [%u]\n", freq);
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else /* Delay to ensure h2g completes */
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delay_for_h2g();
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return ret;
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}
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static int slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 freq)
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{
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int ret;
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ret = intel_guc_slpc_set_max_freq(slpc, freq);
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if (ret)
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pr_err("Could not set maximum frequency [%u]\n",
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freq);
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else /* Delay to ensure h2g completes */
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delay_for_h2g();
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return ret;
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}
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static int vary_max_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
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u32 *max_act_freq)
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{
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u32 step, max_freq, req_freq;
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u32 act_freq;
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int err = 0;
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/* Go from max to min in 5 steps */
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step = (slpc->rp0_freq - slpc->min_freq) / NUM_STEPS;
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*max_act_freq = slpc->min_freq;
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for (max_freq = slpc->rp0_freq; max_freq > slpc->min_freq;
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max_freq -= step) {
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err = slpc_set_max_freq(slpc, max_freq);
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if (err)
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break;
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req_freq = intel_rps_read_punit_req_frequency(rps);
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/* GuC requests freq in multiples of 50/3 MHz */
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if (req_freq > (max_freq + FREQUENCY_REQ_UNIT)) {
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pr_err("SWReq is %d, should be at most %d\n", req_freq,
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max_freq + FREQUENCY_REQ_UNIT);
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err = -EINVAL;
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}
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act_freq = intel_rps_read_actual_frequency(rps);
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if (act_freq > *max_act_freq)
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*max_act_freq = act_freq;
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if (err)
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break;
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}
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return err;
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}
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static int vary_min_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
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u32 *max_act_freq)
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{
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u32 step, min_freq, req_freq;
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u32 act_freq;
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int err = 0;
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/* Go from min to max in 5 steps */
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step = (slpc->rp0_freq - slpc->min_freq) / NUM_STEPS;
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*max_act_freq = slpc->min_freq;
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for (min_freq = slpc->min_freq; min_freq < slpc->rp0_freq;
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min_freq += step) {
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err = slpc_set_min_freq(slpc, min_freq);
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if (err)
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break;
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req_freq = intel_rps_read_punit_req_frequency(rps);
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/* GuC requests freq in multiples of 50/3 MHz */
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if (req_freq < (min_freq - FREQUENCY_REQ_UNIT)) {
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pr_err("SWReq is %d, should be at least %d\n", req_freq,
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min_freq - FREQUENCY_REQ_UNIT);
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err = -EINVAL;
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}
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act_freq = intel_rps_read_actual_frequency(rps);
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if (act_freq > *max_act_freq)
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*max_act_freq = act_freq;
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if (err)
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break;
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}
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return err;
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}
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static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps, u32 *max_act_freq)
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{
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struct intel_gt *gt = rps_to_gt(rps);
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u32 perf_limit_reasons;
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int err = 0;
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err = slpc_set_min_freq(slpc, slpc->rp0_freq);
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if (err)
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return err;
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*max_act_freq = intel_rps_read_actual_frequency(rps);
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if (*max_act_freq != slpc->rp0_freq) {
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/* Check if there was some throttling by pcode */
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perf_limit_reasons = intel_uncore_read(gt->uncore, GT0_PERF_LIMIT_REASONS);
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/* If not, this is an error */
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if (!(perf_limit_reasons & GT0_PERF_LIMIT_REASONS_MASK)) {
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pr_err("Pcode did not grant max freq\n");
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err = -EINVAL;
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} else {
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pr_info("Pcode throttled frequency 0x%x\n", perf_limit_reasons);
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}
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}
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return err;
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}
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static int run_test(struct intel_gt *gt, int test_type)
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{
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struct intel_guc_slpc *slpc = >->uc.guc.slpc;
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struct intel_rps *rps = >->rps;
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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struct igt_spinner spin;
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u32 slpc_min_freq, slpc_max_freq;
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int err = 0;
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if (!intel_uc_uses_guc_slpc(>->uc))
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return 0;
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if (igt_spinner_init(&spin, gt))
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return -ENOMEM;
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if (intel_guc_slpc_get_max_freq(slpc, &slpc_max_freq)) {
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pr_err("Could not get SLPC max freq\n");
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return -EIO;
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}
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if (intel_guc_slpc_get_min_freq(slpc, &slpc_min_freq)) {
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pr_err("Could not get SLPC min freq\n");
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return -EIO;
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}
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/*
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* FIXME: With efficient frequency enabled, GuC can request
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* frequencies higher than the SLPC max. While this is fixed
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* in GuC, we level set these tests with RPn as min.
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*/
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err = slpc_set_min_freq(slpc, slpc->min_freq);
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if (err)
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return err;
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if (slpc->min_freq == slpc->rp0_freq) {
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pr_err("Min/Max are fused to the same value\n");
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return -EINVAL;
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}
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intel_gt_pm_wait_for_idle(gt);
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intel_gt_pm_get(gt);
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for_each_engine(engine, gt, id) {
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struct i915_request *rq;
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u32 max_act_freq;
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if (!intel_engine_can_store_dword(engine))
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continue;
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st_engine_heartbeat_disable(engine);
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rq = igt_spinner_create_request(&spin,
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engine->kernel_context,
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MI_NOOP);
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if (IS_ERR(rq)) {
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err = PTR_ERR(rq);
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st_engine_heartbeat_enable(engine);
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break;
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}
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i915_request_add(rq);
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if (!igt_wait_for_spinner(&spin, rq)) {
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pr_err("%s: Spinner did not start\n",
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engine->name);
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igt_spinner_end(&spin);
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st_engine_heartbeat_enable(engine);
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intel_gt_set_wedged(engine->gt);
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err = -EIO;
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break;
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}
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switch (test_type) {
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case VARY_MIN:
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err = vary_min_freq(slpc, rps, &max_act_freq);
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break;
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case VARY_MAX:
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err = vary_max_freq(slpc, rps, &max_act_freq);
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break;
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case MAX_GRANTED:
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/* Media engines have a different RP0 */
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if (engine->class == VIDEO_DECODE_CLASS ||
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engine->class == VIDEO_ENHANCEMENT_CLASS) {
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igt_spinner_end(&spin);
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st_engine_heartbeat_enable(engine);
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err = 0;
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continue;
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}
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err = max_granted_freq(slpc, rps, &max_act_freq);
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break;
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}
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pr_info("Max actual frequency for %s was %d\n",
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engine->name, max_act_freq);
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/* Actual frequency should rise above min */
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if (max_act_freq <= slpc_min_freq) {
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pr_err("Actual freq did not rise above min\n");
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pr_err("Perf Limit Reasons: 0x%x\n",
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intel_uncore_read(gt->uncore, GT0_PERF_LIMIT_REASONS));
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err = -EINVAL;
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}
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igt_spinner_end(&spin);
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st_engine_heartbeat_enable(engine);
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if (err)
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break;
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}
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/* Restore min/max frequencies */
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slpc_set_max_freq(slpc, slpc_max_freq);
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slpc_set_min_freq(slpc, slpc_min_freq);
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if (igt_flush_test(gt->i915))
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err = -EIO;
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intel_gt_pm_put(gt);
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igt_spinner_fini(&spin);
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intel_gt_pm_wait_for_idle(gt);
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return err;
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}
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static int live_slpc_vary_min(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct intel_gt *gt = to_gt(i915);
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return run_test(gt, VARY_MIN);
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}
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static int live_slpc_vary_max(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct intel_gt *gt = to_gt(i915);
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return run_test(gt, VARY_MAX);
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}
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/* check if pcode can grant RP0 */
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static int live_slpc_max_granted(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct intel_gt *gt = to_gt(i915);
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return run_test(gt, MAX_GRANTED);
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}
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int intel_slpc_live_selftests(struct drm_i915_private *i915)
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{
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static const struct i915_subtest tests[] = {
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SUBTEST(live_slpc_vary_max),
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SUBTEST(live_slpc_vary_min),
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SUBTEST(live_slpc_max_granted),
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};
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if (intel_gt_is_wedged(to_gt(i915)))
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return 0;
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return i915_live_subtests(tests, i915);
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}
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