434 lines
12 KiB
C
434 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright © 2006-2009 Intel Corporation
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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* Dave Airlie <airlied@linux.ie>
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* Jesse Barnes <jesse.barnes@intel.com>
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*/
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#include <linux/i2c.h>
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#include <linux/pm_runtime.h>
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#include <asm/intel-mid.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_simple_kms_helper.h>
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#include "intel_bios.h"
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#include "power.h"
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#include "psb_drv.h"
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#include "psb_intel_drv.h"
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#include "psb_intel_reg.h"
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/* The max/min PWM frequency in BPCR[31:17] - */
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/* The smallest number is 1 (not 0) that can fit in the
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* 15-bit field of the and then*/
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/* shifts to the left by one bit to get the actual 16-bit
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* value that the 15-bits correspond to.*/
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#define MRST_BLC_MAX_PWM_REG_FREQ 0xFFFF
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#define BRIGHTNESS_MAX_LEVEL 100
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/*
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* Sets the power state for the panel.
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*/
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static void oaktrail_lvds_set_power(struct drm_device *dev,
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struct gma_encoder *gma_encoder,
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bool on)
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{
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u32 pp_status;
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struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
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if (!gma_power_begin(dev, true))
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return;
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if (on) {
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REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
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POWER_TARGET_ON);
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do {
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pp_status = REG_READ(PP_STATUS);
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} while ((pp_status & (PP_ON | PP_READY)) == PP_READY);
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dev_priv->is_lvds_on = true;
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if (dev_priv->ops->lvds_bl_power)
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dev_priv->ops->lvds_bl_power(dev, true);
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} else {
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if (dev_priv->ops->lvds_bl_power)
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dev_priv->ops->lvds_bl_power(dev, false);
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REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
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~POWER_TARGET_ON);
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do {
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pp_status = REG_READ(PP_STATUS);
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} while (pp_status & PP_ON);
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dev_priv->is_lvds_on = false;
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}
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gma_power_end(dev);
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}
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static void oaktrail_lvds_dpms(struct drm_encoder *encoder, int mode)
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{
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struct drm_device *dev = encoder->dev;
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struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
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if (mode == DRM_MODE_DPMS_ON)
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oaktrail_lvds_set_power(dev, gma_encoder, true);
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else
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oaktrail_lvds_set_power(dev, gma_encoder, false);
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/* XXX: We never power down the LVDS pairs. */
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}
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static void oaktrail_lvds_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct drm_device *dev = encoder->dev;
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struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
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struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
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struct drm_connector_list_iter conn_iter;
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struct drm_connector *connector = NULL;
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struct drm_crtc *crtc = encoder->crtc;
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u32 lvds_port;
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uint64_t v = DRM_MODE_SCALE_FULLSCREEN;
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if (!gma_power_begin(dev, true))
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return;
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/*
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* The LVDS pin pair will already have been turned on in the
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* psb_intel_crtc_mode_set since it has a large impact on the DPLL
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* settings.
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*/
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lvds_port = (REG_READ(LVDS) &
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(~LVDS_PIPEB_SELECT)) |
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LVDS_PORT_EN |
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LVDS_BORDER_EN;
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/* If the firmware says dither on Moorestown, or the BIOS does
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on Oaktrail then enable dithering */
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if (mode_dev->panel_wants_dither || dev_priv->lvds_dither)
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lvds_port |= MRST_PANEL_8TO6_DITHER_ENABLE;
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REG_WRITE(LVDS, lvds_port);
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/* Find the connector we're trying to set up */
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drm_connector_list_iter_begin(dev, &conn_iter);
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drm_for_each_connector_iter(connector, &conn_iter) {
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if (connector->encoder && connector->encoder->crtc == crtc)
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break;
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}
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if (!connector) {
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drm_connector_list_iter_end(&conn_iter);
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DRM_ERROR("Couldn't find connector when setting mode");
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gma_power_end(dev);
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return;
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}
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drm_object_property_get_value( &connector->base,
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dev->mode_config.scaling_mode_property, &v);
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drm_connector_list_iter_end(&conn_iter);
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if (v == DRM_MODE_SCALE_NO_SCALE)
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REG_WRITE(PFIT_CONTROL, 0);
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else if (v == DRM_MODE_SCALE_ASPECT) {
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if ((mode->vdisplay != adjusted_mode->crtc_vdisplay) ||
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(mode->hdisplay != adjusted_mode->crtc_hdisplay)) {
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if ((adjusted_mode->crtc_hdisplay * mode->vdisplay) ==
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(mode->hdisplay * adjusted_mode->crtc_vdisplay))
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REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
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else if ((adjusted_mode->crtc_hdisplay *
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mode->vdisplay) > (mode->hdisplay *
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adjusted_mode->crtc_vdisplay))
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REG_WRITE(PFIT_CONTROL, PFIT_ENABLE |
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PFIT_SCALING_MODE_PILLARBOX);
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else
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REG_WRITE(PFIT_CONTROL, PFIT_ENABLE |
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PFIT_SCALING_MODE_LETTERBOX);
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} else
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REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
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} else /*(v == DRM_MODE_SCALE_FULLSCREEN)*/
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REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
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gma_power_end(dev);
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}
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static void oaktrail_lvds_prepare(struct drm_encoder *encoder)
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{
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struct drm_device *dev = encoder->dev;
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struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
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struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
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struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
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if (!gma_power_begin(dev, true))
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return;
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mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
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mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
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BACKLIGHT_DUTY_CYCLE_MASK);
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oaktrail_lvds_set_power(dev, gma_encoder, false);
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gma_power_end(dev);
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}
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static u32 oaktrail_lvds_get_max_backlight(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
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u32 ret;
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if (gma_power_begin(dev, false)) {
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ret = ((REG_READ(BLC_PWM_CTL) &
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BACKLIGHT_MODULATION_FREQ_MASK) >>
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BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
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gma_power_end(dev);
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} else
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ret = ((dev_priv->regs.saveBLC_PWM_CTL &
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BACKLIGHT_MODULATION_FREQ_MASK) >>
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BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
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return ret;
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}
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static void oaktrail_lvds_commit(struct drm_encoder *encoder)
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{
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struct drm_device *dev = encoder->dev;
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struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
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struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
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struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
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if (mode_dev->backlight_duty_cycle == 0)
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mode_dev->backlight_duty_cycle =
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oaktrail_lvds_get_max_backlight(dev);
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oaktrail_lvds_set_power(dev, gma_encoder, true);
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}
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static const struct drm_encoder_helper_funcs oaktrail_lvds_helper_funcs = {
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.dpms = oaktrail_lvds_dpms,
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.mode_fixup = psb_intel_lvds_mode_fixup,
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.prepare = oaktrail_lvds_prepare,
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.mode_set = oaktrail_lvds_mode_set,
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.commit = oaktrail_lvds_commit,
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};
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/* Returns the panel fixed mode from configuration. */
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static void oaktrail_lvds_get_configuration_mode(struct drm_device *dev,
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struct psb_intel_mode_device *mode_dev)
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{
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struct drm_display_mode *mode = NULL;
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struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
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struct oaktrail_timing_info *ti = &dev_priv->gct_data.DTD;
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mode_dev->panel_fixed_mode = NULL;
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/* Use the firmware provided data on Moorestown */
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if (dev_priv->has_gct) {
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mode = kzalloc(sizeof(*mode), GFP_KERNEL);
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if (!mode)
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return;
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mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo;
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mode->vdisplay = (ti->vactive_hi << 8) | ti->vactive_lo;
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mode->hsync_start = mode->hdisplay + \
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((ti->hsync_offset_hi << 8) | \
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ti->hsync_offset_lo);
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mode->hsync_end = mode->hsync_start + \
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((ti->hsync_pulse_width_hi << 8) | \
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ti->hsync_pulse_width_lo);
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mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | \
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ti->hblank_lo);
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mode->vsync_start = \
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mode->vdisplay + ((ti->vsync_offset_hi << 4) | \
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ti->vsync_offset_lo);
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mode->vsync_end = \
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mode->vsync_start + ((ti->vsync_pulse_width_hi << 4) | \
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ti->vsync_pulse_width_lo);
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mode->vtotal = mode->vdisplay + \
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((ti->vblank_hi << 8) | ti->vblank_lo);
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mode->clock = ti->pixel_clock * 10;
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#if 0
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pr_info("hdisplay is %d\n", mode->hdisplay);
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pr_info("vdisplay is %d\n", mode->vdisplay);
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pr_info("HSS is %d\n", mode->hsync_start);
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pr_info("HSE is %d\n", mode->hsync_end);
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pr_info("htotal is %d\n", mode->htotal);
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pr_info("VSS is %d\n", mode->vsync_start);
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pr_info("VSE is %d\n", mode->vsync_end);
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pr_info("vtotal is %d\n", mode->vtotal);
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pr_info("clock is %d\n", mode->clock);
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#endif
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mode_dev->panel_fixed_mode = mode;
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}
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/* Use the BIOS VBT mode if available */
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if (mode_dev->panel_fixed_mode == NULL && mode_dev->vbt_mode)
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mode_dev->panel_fixed_mode = drm_mode_duplicate(dev,
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mode_dev->vbt_mode);
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/* Then try the LVDS VBT mode */
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if (mode_dev->panel_fixed_mode == NULL)
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if (dev_priv->lfp_lvds_vbt_mode)
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mode_dev->panel_fixed_mode =
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drm_mode_duplicate(dev,
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dev_priv->lfp_lvds_vbt_mode);
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/* If we still got no mode then bail */
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if (mode_dev->panel_fixed_mode == NULL)
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return;
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drm_mode_set_name(mode_dev->panel_fixed_mode);
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drm_mode_set_crtcinfo(mode_dev->panel_fixed_mode, 0);
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}
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/**
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* oaktrail_lvds_init - setup LVDS connectors on this device
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* @dev: drm device
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* @mode_dev: PSB mode device
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*
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* Create the connector, register the LVDS DDC bus, and try to figure out what
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* modes we can display on the LVDS panel (if present).
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*/
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void oaktrail_lvds_init(struct drm_device *dev,
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struct psb_intel_mode_device *mode_dev)
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{
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struct gma_encoder *gma_encoder;
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struct gma_connector *gma_connector;
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struct gma_i2c_chan *ddc_bus;
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struct drm_connector *connector;
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struct drm_encoder *encoder;
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struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
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struct edid *edid;
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struct i2c_adapter *i2c_adap;
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struct drm_display_mode *scan; /* *modes, *bios_mode; */
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int ret;
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gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
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if (!gma_encoder)
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return;
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gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
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if (!gma_connector)
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goto err_free_encoder;
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connector = &gma_connector->base;
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encoder = &gma_encoder->base;
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dev_priv->is_lvds_on = true;
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ret = drm_connector_init(dev, connector,
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&psb_intel_lvds_connector_funcs,
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DRM_MODE_CONNECTOR_LVDS);
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if (ret)
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goto err_free_connector;
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ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_LVDS);
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if (ret)
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goto err_connector_cleanup;
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gma_connector_attach_encoder(gma_connector, gma_encoder);
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gma_encoder->type = INTEL_OUTPUT_LVDS;
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drm_encoder_helper_add(encoder, &oaktrail_lvds_helper_funcs);
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drm_connector_helper_add(connector,
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&psb_intel_lvds_connector_helper_funcs);
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connector->display_info.subpixel_order = SubPixelHorizontalRGB;
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connector->interlace_allowed = false;
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connector->doublescan_allowed = false;
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drm_object_attach_property(&connector->base,
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dev->mode_config.scaling_mode_property,
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DRM_MODE_SCALE_FULLSCREEN);
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drm_object_attach_property(&connector->base,
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dev_priv->backlight_property,
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BRIGHTNESS_MAX_LEVEL);
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mode_dev->panel_wants_dither = false;
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if (dev_priv->has_gct)
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mode_dev->panel_wants_dither = (dev_priv->gct_data.
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Panel_Port_Control & MRST_PANEL_8TO6_DITHER_ENABLE);
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if (dev_priv->lvds_dither)
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mode_dev->panel_wants_dither = 1;
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/*
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* LVDS discovery:
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* 1) check for EDID on DDC
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* 2) check for VBT data
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* 3) check to see if LVDS is already on
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* if none of the above, no panel
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* 4) make sure lid is open
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* if closed, act like it's not there for now
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*/
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edid = NULL;
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mutex_lock(&dev->mode_config.mutex);
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i2c_adap = i2c_get_adapter(dev_priv->ops->i2c_bus);
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if (i2c_adap)
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edid = drm_get_edid(connector, i2c_adap);
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if (edid == NULL && dev_priv->lpc_gpio_base) {
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ddc_bus = oaktrail_lvds_i2c_init(dev);
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if (!IS_ERR(ddc_bus)) {
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i2c_adap = &ddc_bus->base;
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edid = drm_get_edid(connector, i2c_adap);
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}
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}
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/*
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* Due to the logic in probing for i2c buses above we do not know the
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* i2c_adap until now. Hence we cannot use drm_connector_init_with_ddc()
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* but must instead set connector->ddc manually here.
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*/
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connector->ddc = i2c_adap;
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/*
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* Attempt to get the fixed panel mode from DDC. Assume that the
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* preferred mode is the right one.
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*/
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if (edid) {
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drm_connector_update_edid_property(connector, edid);
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drm_add_edid_modes(connector, edid);
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kfree(edid);
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list_for_each_entry(scan, &connector->probed_modes, head) {
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if (scan->type & DRM_MODE_TYPE_PREFERRED) {
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mode_dev->panel_fixed_mode =
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drm_mode_duplicate(dev, scan);
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goto out; /* FIXME: check for quirks */
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}
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}
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} else
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dev_err(dev->dev, "No ddc adapter available!\n");
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/*
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* If we didn't get EDID, try geting panel timing
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* from configuration data
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*/
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oaktrail_lvds_get_configuration_mode(dev, mode_dev);
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if (mode_dev->panel_fixed_mode) {
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mode_dev->panel_fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
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goto out; /* FIXME: check for quirks */
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}
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/* If we still don't have a mode after all that, give up. */
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if (!mode_dev->panel_fixed_mode) {
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dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
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goto err_unlock;
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}
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out:
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mutex_unlock(&dev->mode_config.mutex);
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return;
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err_unlock:
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mutex_unlock(&dev->mode_config.mutex);
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gma_i2c_destroy(to_gma_i2c_chan(connector->ddc));
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drm_encoder_cleanup(encoder);
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err_connector_cleanup:
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drm_connector_cleanup(connector);
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err_free_connector:
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kfree(gma_connector);
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err_free_encoder:
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kfree(gma_encoder);
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}
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