285 lines
7.7 KiB
C
285 lines
7.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2021 Aspeed Technology Inc.
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*/
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/of_irq.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include "aspeed-hace.h"
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#ifdef CONFIG_CRYPTO_DEV_ASPEED_DEBUG
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#define HACE_DBG(d, fmt, ...) \
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dev_info((d)->dev, "%s() " fmt, __func__, ##__VA_ARGS__)
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#else
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#define HACE_DBG(d, fmt, ...) \
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dev_dbg((d)->dev, "%s() " fmt, __func__, ##__VA_ARGS__)
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#endif
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/* HACE interrupt service routine */
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static irqreturn_t aspeed_hace_irq(int irq, void *dev)
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{
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struct aspeed_hace_dev *hace_dev = (struct aspeed_hace_dev *)dev;
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struct aspeed_engine_crypto *crypto_engine = &hace_dev->crypto_engine;
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struct aspeed_engine_hash *hash_engine = &hace_dev->hash_engine;
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u32 sts;
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sts = ast_hace_read(hace_dev, ASPEED_HACE_STS);
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ast_hace_write(hace_dev, sts, ASPEED_HACE_STS);
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HACE_DBG(hace_dev, "irq status: 0x%x\n", sts);
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if (sts & HACE_HASH_ISR) {
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if (hash_engine->flags & CRYPTO_FLAGS_BUSY)
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tasklet_schedule(&hash_engine->done_task);
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else
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dev_warn(hace_dev->dev, "HASH no active requests.\n");
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}
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if (sts & HACE_CRYPTO_ISR) {
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if (crypto_engine->flags & CRYPTO_FLAGS_BUSY)
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tasklet_schedule(&crypto_engine->done_task);
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else
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dev_warn(hace_dev->dev, "CRYPTO no active requests.\n");
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}
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return IRQ_HANDLED;
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}
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static void aspeed_hace_crypto_done_task(unsigned long data)
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{
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struct aspeed_hace_dev *hace_dev = (struct aspeed_hace_dev *)data;
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struct aspeed_engine_crypto *crypto_engine = &hace_dev->crypto_engine;
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crypto_engine->resume(hace_dev);
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}
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static void aspeed_hace_hash_done_task(unsigned long data)
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{
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struct aspeed_hace_dev *hace_dev = (struct aspeed_hace_dev *)data;
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struct aspeed_engine_hash *hash_engine = &hace_dev->hash_engine;
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hash_engine->resume(hace_dev);
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}
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static void aspeed_hace_register(struct aspeed_hace_dev *hace_dev)
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{
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#ifdef CONFIG_CRYPTO_DEV_ASPEED_HACE_HASH
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aspeed_register_hace_hash_algs(hace_dev);
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#endif
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#ifdef CONFIG_CRYPTO_DEV_ASPEED_HACE_CRYPTO
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aspeed_register_hace_crypto_algs(hace_dev);
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#endif
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}
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static void aspeed_hace_unregister(struct aspeed_hace_dev *hace_dev)
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{
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#ifdef CONFIG_CRYPTO_DEV_ASPEED_HACE_HASH
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aspeed_unregister_hace_hash_algs(hace_dev);
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#endif
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#ifdef CONFIG_CRYPTO_DEV_ASPEED_HACE_CRYPTO
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aspeed_unregister_hace_crypto_algs(hace_dev);
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#endif
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}
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static const struct of_device_id aspeed_hace_of_matches[] = {
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{ .compatible = "aspeed,ast2500-hace", .data = (void *)5, },
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{ .compatible = "aspeed,ast2600-hace", .data = (void *)6, },
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{},
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};
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static int aspeed_hace_probe(struct platform_device *pdev)
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{
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struct aspeed_engine_crypto *crypto_engine;
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const struct of_device_id *hace_dev_id;
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struct aspeed_engine_hash *hash_engine;
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struct aspeed_hace_dev *hace_dev;
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struct resource *res;
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int rc;
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hace_dev = devm_kzalloc(&pdev->dev, sizeof(struct aspeed_hace_dev),
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GFP_KERNEL);
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if (!hace_dev)
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return -ENOMEM;
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hace_dev_id = of_match_device(aspeed_hace_of_matches, &pdev->dev);
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if (!hace_dev_id) {
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dev_err(&pdev->dev, "Failed to match hace dev id\n");
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return -EINVAL;
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}
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hace_dev->dev = &pdev->dev;
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hace_dev->version = (unsigned long)hace_dev_id->data;
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hash_engine = &hace_dev->hash_engine;
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crypto_engine = &hace_dev->crypto_engine;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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platform_set_drvdata(pdev, hace_dev);
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hace_dev->regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(hace_dev->regs))
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return PTR_ERR(hace_dev->regs);
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/* Get irq number and register it */
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hace_dev->irq = platform_get_irq(pdev, 0);
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if (hace_dev->irq < 0)
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return -ENXIO;
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rc = devm_request_irq(&pdev->dev, hace_dev->irq, aspeed_hace_irq, 0,
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dev_name(&pdev->dev), hace_dev);
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if (rc) {
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dev_err(&pdev->dev, "Failed to request interrupt\n");
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return rc;
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}
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/* Get clk and enable it */
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hace_dev->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(hace_dev->clk)) {
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dev_err(&pdev->dev, "Failed to get clk\n");
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return -ENODEV;
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}
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rc = clk_prepare_enable(hace_dev->clk);
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if (rc) {
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dev_err(&pdev->dev, "Failed to enable clock 0x%x\n", rc);
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return rc;
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}
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/* Initialize crypto hardware engine structure for hash */
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hace_dev->crypt_engine_hash = crypto_engine_alloc_init(hace_dev->dev,
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true);
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if (!hace_dev->crypt_engine_hash) {
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rc = -ENOMEM;
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goto clk_exit;
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}
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rc = crypto_engine_start(hace_dev->crypt_engine_hash);
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if (rc)
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goto err_engine_hash_start;
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tasklet_init(&hash_engine->done_task, aspeed_hace_hash_done_task,
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(unsigned long)hace_dev);
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/* Initialize crypto hardware engine structure for crypto */
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hace_dev->crypt_engine_crypto = crypto_engine_alloc_init(hace_dev->dev,
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true);
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if (!hace_dev->crypt_engine_crypto) {
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rc = -ENOMEM;
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goto err_engine_hash_start;
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}
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rc = crypto_engine_start(hace_dev->crypt_engine_crypto);
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if (rc)
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goto err_engine_crypto_start;
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tasklet_init(&crypto_engine->done_task, aspeed_hace_crypto_done_task,
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(unsigned long)hace_dev);
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/* Allocate DMA buffer for hash engine input used */
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hash_engine->ahash_src_addr =
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dmam_alloc_coherent(&pdev->dev,
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ASPEED_HASH_SRC_DMA_BUF_LEN,
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&hash_engine->ahash_src_dma_addr,
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GFP_KERNEL);
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if (!hash_engine->ahash_src_addr) {
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dev_err(&pdev->dev, "Failed to allocate dma buffer\n");
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rc = -ENOMEM;
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goto err_engine_crypto_start;
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}
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/* Allocate DMA buffer for crypto engine context used */
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crypto_engine->cipher_ctx =
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dmam_alloc_coherent(&pdev->dev,
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PAGE_SIZE,
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&crypto_engine->cipher_ctx_dma,
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GFP_KERNEL);
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if (!crypto_engine->cipher_ctx) {
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dev_err(&pdev->dev, "Failed to allocate cipher ctx dma\n");
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rc = -ENOMEM;
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goto err_engine_crypto_start;
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}
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/* Allocate DMA buffer for crypto engine input used */
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crypto_engine->cipher_addr =
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dmam_alloc_coherent(&pdev->dev,
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ASPEED_CRYPTO_SRC_DMA_BUF_LEN,
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&crypto_engine->cipher_dma_addr,
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GFP_KERNEL);
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if (!crypto_engine->cipher_addr) {
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dev_err(&pdev->dev, "Failed to allocate cipher addr dma\n");
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rc = -ENOMEM;
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goto err_engine_crypto_start;
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}
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/* Allocate DMA buffer for crypto engine output used */
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if (hace_dev->version == AST2600_VERSION) {
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crypto_engine->dst_sg_addr =
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dmam_alloc_coherent(&pdev->dev,
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ASPEED_CRYPTO_DST_DMA_BUF_LEN,
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&crypto_engine->dst_sg_dma_addr,
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GFP_KERNEL);
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if (!crypto_engine->dst_sg_addr) {
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dev_err(&pdev->dev, "Failed to allocate dst_sg dma\n");
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rc = -ENOMEM;
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goto err_engine_crypto_start;
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}
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}
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aspeed_hace_register(hace_dev);
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dev_info(&pdev->dev, "Aspeed Crypto Accelerator successfully registered\n");
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return 0;
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err_engine_crypto_start:
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crypto_engine_exit(hace_dev->crypt_engine_crypto);
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err_engine_hash_start:
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crypto_engine_exit(hace_dev->crypt_engine_hash);
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clk_exit:
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clk_disable_unprepare(hace_dev->clk);
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return rc;
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}
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static int aspeed_hace_remove(struct platform_device *pdev)
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{
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struct aspeed_hace_dev *hace_dev = platform_get_drvdata(pdev);
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struct aspeed_engine_crypto *crypto_engine = &hace_dev->crypto_engine;
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struct aspeed_engine_hash *hash_engine = &hace_dev->hash_engine;
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aspeed_hace_unregister(hace_dev);
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crypto_engine_exit(hace_dev->crypt_engine_hash);
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crypto_engine_exit(hace_dev->crypt_engine_crypto);
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tasklet_kill(&hash_engine->done_task);
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tasklet_kill(&crypto_engine->done_task);
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clk_disable_unprepare(hace_dev->clk);
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return 0;
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}
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MODULE_DEVICE_TABLE(of, aspeed_hace_of_matches);
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static struct platform_driver aspeed_hace_driver = {
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.probe = aspeed_hace_probe,
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.remove = aspeed_hace_remove,
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.driver = {
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.name = KBUILD_MODNAME,
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.of_match_table = aspeed_hace_of_matches,
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},
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};
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module_platform_driver(aspeed_hace_driver);
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MODULE_AUTHOR("Neal Liu <neal_liu@aspeedtech.com>");
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MODULE_DESCRIPTION("Aspeed HACE driver Crypto Accelerator");
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MODULE_LICENSE("GPL");
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