222 lines
6.0 KiB
C
222 lines
6.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
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* Authors: Benjamin Gaignard <benjamin.gaignard@st.com> for STMicroelectronics.
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* Pascal Paillet <p.paillet@st.com> for STMicroelectronics.
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*/
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#include <linux/clk.h>
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#include <linux/clockchips.h>
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#include <linux/interrupt.h>
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#include <linux/mfd/stm32-lptimer.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include <linux/pm_wakeirq.h>
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#define CFGR_PSC_OFFSET 9
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#define STM32_LP_RATING 1000
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#define STM32_TARGET_CLKRATE (32000 * HZ)
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#define STM32_LP_MAX_PSC 7
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struct stm32_lp_private {
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struct regmap *reg;
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struct clock_event_device clkevt;
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unsigned long period;
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struct device *dev;
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};
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static struct stm32_lp_private*
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to_priv(struct clock_event_device *clkevt)
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{
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return container_of(clkevt, struct stm32_lp_private, clkevt);
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}
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static int stm32_clkevent_lp_shutdown(struct clock_event_device *clkevt)
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{
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struct stm32_lp_private *priv = to_priv(clkevt);
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regmap_write(priv->reg, STM32_LPTIM_CR, 0);
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regmap_write(priv->reg, STM32_LPTIM_IER, 0);
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/* clear pending flags */
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regmap_write(priv->reg, STM32_LPTIM_ICR, STM32_LPTIM_ARRMCF);
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return 0;
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}
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static int stm32_clkevent_lp_set_timer(unsigned long evt,
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struct clock_event_device *clkevt,
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int is_periodic)
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{
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struct stm32_lp_private *priv = to_priv(clkevt);
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/* disable LPTIMER to be able to write into IER register*/
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regmap_write(priv->reg, STM32_LPTIM_CR, 0);
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/* enable ARR interrupt */
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regmap_write(priv->reg, STM32_LPTIM_IER, STM32_LPTIM_ARRMIE);
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/* enable LPTIMER to be able to write into ARR register */
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regmap_write(priv->reg, STM32_LPTIM_CR, STM32_LPTIM_ENABLE);
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/* set next event counter */
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regmap_write(priv->reg, STM32_LPTIM_ARR, evt);
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/* start counter */
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if (is_periodic)
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regmap_write(priv->reg, STM32_LPTIM_CR,
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STM32_LPTIM_CNTSTRT | STM32_LPTIM_ENABLE);
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else
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regmap_write(priv->reg, STM32_LPTIM_CR,
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STM32_LPTIM_SNGSTRT | STM32_LPTIM_ENABLE);
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return 0;
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}
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static int stm32_clkevent_lp_set_next_event(unsigned long evt,
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struct clock_event_device *clkevt)
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{
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return stm32_clkevent_lp_set_timer(evt, clkevt,
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clockevent_state_periodic(clkevt));
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}
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static int stm32_clkevent_lp_set_periodic(struct clock_event_device *clkevt)
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{
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struct stm32_lp_private *priv = to_priv(clkevt);
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return stm32_clkevent_lp_set_timer(priv->period, clkevt, true);
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}
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static int stm32_clkevent_lp_set_oneshot(struct clock_event_device *clkevt)
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{
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struct stm32_lp_private *priv = to_priv(clkevt);
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return stm32_clkevent_lp_set_timer(priv->period, clkevt, false);
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}
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static irqreturn_t stm32_clkevent_lp_irq_handler(int irq, void *dev_id)
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{
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struct clock_event_device *clkevt = (struct clock_event_device *)dev_id;
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struct stm32_lp_private *priv = to_priv(clkevt);
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regmap_write(priv->reg, STM32_LPTIM_ICR, STM32_LPTIM_ARRMCF);
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if (clkevt->event_handler)
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clkevt->event_handler(clkevt);
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return IRQ_HANDLED;
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}
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static void stm32_clkevent_lp_set_prescaler(struct stm32_lp_private *priv,
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unsigned long *rate)
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{
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int i;
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for (i = 0; i <= STM32_LP_MAX_PSC; i++) {
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if (DIV_ROUND_CLOSEST(*rate, 1 << i) < STM32_TARGET_CLKRATE)
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break;
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}
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regmap_write(priv->reg, STM32_LPTIM_CFGR, i << CFGR_PSC_OFFSET);
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/* Adjust rate and period given the prescaler value */
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*rate = DIV_ROUND_CLOSEST(*rate, (1 << i));
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priv->period = DIV_ROUND_UP(*rate, HZ);
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}
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static void stm32_clkevent_lp_init(struct stm32_lp_private *priv,
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struct device_node *np, unsigned long rate)
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{
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priv->clkevt.name = np->full_name;
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priv->clkevt.cpumask = cpu_possible_mask;
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priv->clkevt.features = CLOCK_EVT_FEAT_PERIODIC |
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CLOCK_EVT_FEAT_ONESHOT;
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priv->clkevt.set_state_shutdown = stm32_clkevent_lp_shutdown;
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priv->clkevt.set_state_periodic = stm32_clkevent_lp_set_periodic;
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priv->clkevt.set_state_oneshot = stm32_clkevent_lp_set_oneshot;
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priv->clkevt.set_next_event = stm32_clkevent_lp_set_next_event;
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priv->clkevt.rating = STM32_LP_RATING;
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clockevents_config_and_register(&priv->clkevt, rate, 0x1,
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STM32_LPTIM_MAX_ARR);
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}
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static int stm32_clkevent_lp_probe(struct platform_device *pdev)
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{
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struct stm32_lptimer *ddata = dev_get_drvdata(pdev->dev.parent);
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struct stm32_lp_private *priv;
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unsigned long rate;
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int ret, irq;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->reg = ddata->regmap;
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ret = clk_prepare_enable(ddata->clk);
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if (ret)
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return -EINVAL;
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rate = clk_get_rate(ddata->clk);
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if (!rate) {
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ret = -EINVAL;
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goto out_clk_disable;
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}
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irq = platform_get_irq(to_platform_device(pdev->dev.parent), 0);
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if (irq <= 0) {
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ret = irq;
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goto out_clk_disable;
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}
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if (of_property_read_bool(pdev->dev.parent->of_node, "wakeup-source")) {
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ret = device_init_wakeup(&pdev->dev, true);
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if (ret)
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goto out_clk_disable;
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ret = dev_pm_set_wake_irq(&pdev->dev, irq);
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if (ret)
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goto out_clk_disable;
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}
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ret = devm_request_irq(&pdev->dev, irq, stm32_clkevent_lp_irq_handler,
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IRQF_TIMER, pdev->name, &priv->clkevt);
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if (ret)
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goto out_clk_disable;
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stm32_clkevent_lp_set_prescaler(priv, &rate);
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stm32_clkevent_lp_init(priv, pdev->dev.parent->of_node, rate);
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priv->dev = &pdev->dev;
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return 0;
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out_clk_disable:
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clk_disable_unprepare(ddata->clk);
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return ret;
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}
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static int stm32_clkevent_lp_remove(struct platform_device *pdev)
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{
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return -EBUSY; /* cannot unregister clockevent */
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}
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static const struct of_device_id stm32_clkevent_lp_of_match[] = {
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{ .compatible = "st,stm32-lptimer-timer", },
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{},
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};
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MODULE_DEVICE_TABLE(of, stm32_clkevent_lp_of_match);
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static struct platform_driver stm32_clkevent_lp_driver = {
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.probe = stm32_clkevent_lp_probe,
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.remove = stm32_clkevent_lp_remove,
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.driver = {
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.name = "stm32-lptimer-timer",
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.of_match_table = of_match_ptr(stm32_clkevent_lp_of_match),
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},
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};
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module_platform_driver(stm32_clkevent_lp_driver);
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MODULE_ALIAS("platform:stm32-lptimer-timer");
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MODULE_DESCRIPTION("STMicroelectronics STM32 clockevent low power driver");
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MODULE_LICENSE("GPL v2");
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