124 lines
3.0 KiB
C
124 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) STMicroelectronics 2022 - All Rights Reserved
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* Author: Gabriel Fernandez <gabriel.fernandez@foss.st.com> for STMicroelectronics.
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*/
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/reset-controller.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include "clk-stm32-core.h"
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#define STM32_RESET_ID_MASK GENMASK(15, 0)
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struct stm32_reset_data {
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/* reset lock */
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spinlock_t lock;
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struct reset_controller_dev rcdev;
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void __iomem *membase;
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u32 clear_offset;
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};
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static inline struct stm32_reset_data *
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to_stm32_reset_data(struct reset_controller_dev *rcdev)
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{
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return container_of(rcdev, struct stm32_reset_data, rcdev);
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}
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static int stm32_reset_update(struct reset_controller_dev *rcdev,
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unsigned long id, bool assert)
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{
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struct stm32_reset_data *data = to_stm32_reset_data(rcdev);
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int reg_width = sizeof(u32);
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int bank = id / (reg_width * BITS_PER_BYTE);
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int offset = id % (reg_width * BITS_PER_BYTE);
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if (data->clear_offset) {
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void __iomem *addr;
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addr = data->membase + (bank * reg_width);
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if (!assert)
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addr += data->clear_offset;
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writel(BIT(offset), addr);
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} else {
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unsigned long flags;
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u32 reg;
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spin_lock_irqsave(&data->lock, flags);
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reg = readl(data->membase + (bank * reg_width));
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if (assert)
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reg |= BIT(offset);
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else
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reg &= ~BIT(offset);
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writel(reg, data->membase + (bank * reg_width));
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spin_unlock_irqrestore(&data->lock, flags);
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}
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return 0;
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}
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static int stm32_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return stm32_reset_update(rcdev, id, true);
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}
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static int stm32_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return stm32_reset_update(rcdev, id, false);
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}
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static int stm32_reset_status(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct stm32_reset_data *data = to_stm32_reset_data(rcdev);
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int reg_width = sizeof(u32);
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int bank = id / (reg_width * BITS_PER_BYTE);
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int offset = id % (reg_width * BITS_PER_BYTE);
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u32 reg;
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reg = readl(data->membase + (bank * reg_width));
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return !!(reg & BIT(offset));
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}
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static const struct reset_control_ops stm32_reset_ops = {
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.assert = stm32_reset_assert,
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.deassert = stm32_reset_deassert,
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.status = stm32_reset_status,
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};
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int stm32_rcc_reset_init(struct device *dev, const struct of_device_id *match,
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void __iomem *base)
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{
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const struct stm32_rcc_match_data *data = match->data;
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struct stm32_reset_data *reset_data = NULL;
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data = match->data;
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reset_data = kzalloc(sizeof(*reset_data), GFP_KERNEL);
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if (!reset_data)
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return -ENOMEM;
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spin_lock_init(&reset_data->lock);
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reset_data->membase = base;
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reset_data->rcdev.owner = THIS_MODULE;
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reset_data->rcdev.ops = &stm32_reset_ops;
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reset_data->rcdev.of_node = dev_of_node(dev);
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reset_data->rcdev.nr_resets = STM32_RESET_ID_MASK;
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reset_data->clear_offset = data->clear_offset;
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return reset_controller_register(&reset_data->rcdev);
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}
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