788 lines
19 KiB
C
788 lines
19 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2014, 2015 Intel Corporation
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*
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* Authors:
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* Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
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*
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* Maintained by: <tpmdd-devel@lists.sourceforge.net>
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*
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* This file contains TPM2 protocol implementations of the commands
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* used by the kernel internally.
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*/
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#include "tpm.h"
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#include <crypto/hash_info.h>
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static struct tpm2_hash tpm2_hash_map[] = {
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{HASH_ALGO_SHA1, TPM_ALG_SHA1},
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{HASH_ALGO_SHA256, TPM_ALG_SHA256},
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{HASH_ALGO_SHA384, TPM_ALG_SHA384},
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{HASH_ALGO_SHA512, TPM_ALG_SHA512},
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{HASH_ALGO_SM3_256, TPM_ALG_SM3_256},
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};
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int tpm2_get_timeouts(struct tpm_chip *chip)
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{
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/* Fixed timeouts for TPM2 */
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chip->timeout_a = msecs_to_jiffies(TPM2_TIMEOUT_A);
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chip->timeout_b = msecs_to_jiffies(TPM2_TIMEOUT_B);
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chip->timeout_c = msecs_to_jiffies(TPM2_TIMEOUT_C);
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chip->timeout_d = msecs_to_jiffies(TPM2_TIMEOUT_D);
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/* PTP spec timeouts */
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chip->duration[TPM_SHORT] = msecs_to_jiffies(TPM2_DURATION_SHORT);
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chip->duration[TPM_MEDIUM] = msecs_to_jiffies(TPM2_DURATION_MEDIUM);
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chip->duration[TPM_LONG] = msecs_to_jiffies(TPM2_DURATION_LONG);
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/* Key creation commands long timeouts */
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chip->duration[TPM_LONG_LONG] =
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msecs_to_jiffies(TPM2_DURATION_LONG_LONG);
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chip->flags |= TPM_CHIP_FLAG_HAVE_TIMEOUTS;
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return 0;
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}
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/**
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* tpm2_ordinal_duration_index() - returns an index to the chip duration table
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* @ordinal: TPM command ordinal.
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*
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* The function returns an index to the chip duration table
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* (enum tpm_duration), that describes the maximum amount of
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* time the chip could take to return the result for a particular ordinal.
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*
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* The values of the MEDIUM, and LONG durations are taken
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* from the PC Client Profile (PTP) specification (750, 2000 msec)
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*
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* LONG_LONG is for commands that generates keys which empirically takes
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* a longer time on some systems.
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*
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* Return:
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* * TPM_MEDIUM
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* * TPM_LONG
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* * TPM_LONG_LONG
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* * TPM_UNDEFINED
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*/
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static u8 tpm2_ordinal_duration_index(u32 ordinal)
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{
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switch (ordinal) {
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/* Startup */
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case TPM2_CC_STARTUP: /* 144 */
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return TPM_MEDIUM;
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case TPM2_CC_SELF_TEST: /* 143 */
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return TPM_LONG;
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case TPM2_CC_GET_RANDOM: /* 17B */
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return TPM_LONG;
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case TPM2_CC_SEQUENCE_UPDATE: /* 15C */
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return TPM_MEDIUM;
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case TPM2_CC_SEQUENCE_COMPLETE: /* 13E */
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return TPM_MEDIUM;
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case TPM2_CC_EVENT_SEQUENCE_COMPLETE: /* 185 */
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return TPM_MEDIUM;
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case TPM2_CC_HASH_SEQUENCE_START: /* 186 */
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return TPM_MEDIUM;
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case TPM2_CC_VERIFY_SIGNATURE: /* 177 */
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return TPM_LONG_LONG;
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case TPM2_CC_PCR_EXTEND: /* 182 */
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return TPM_MEDIUM;
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case TPM2_CC_HIERARCHY_CONTROL: /* 121 */
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return TPM_LONG;
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case TPM2_CC_HIERARCHY_CHANGE_AUTH: /* 129 */
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return TPM_LONG;
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case TPM2_CC_GET_CAPABILITY: /* 17A */
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return TPM_MEDIUM;
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case TPM2_CC_NV_READ: /* 14E */
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return TPM_LONG;
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case TPM2_CC_CREATE_PRIMARY: /* 131 */
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return TPM_LONG_LONG;
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case TPM2_CC_CREATE: /* 153 */
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return TPM_LONG_LONG;
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case TPM2_CC_CREATE_LOADED: /* 191 */
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return TPM_LONG_LONG;
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default:
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return TPM_UNDEFINED;
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}
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}
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/**
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* tpm2_calc_ordinal_duration() - calculate the maximum command duration
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* @chip: TPM chip to use.
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* @ordinal: TPM command ordinal.
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*
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* The function returns the maximum amount of time the chip could take
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* to return the result for a particular ordinal in jiffies.
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*
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* Return: A maximal duration time for an ordinal in jiffies.
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*/
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unsigned long tpm2_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal)
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{
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unsigned int index;
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index = tpm2_ordinal_duration_index(ordinal);
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if (index != TPM_UNDEFINED)
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return chip->duration[index];
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else
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return msecs_to_jiffies(TPM2_DURATION_DEFAULT);
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}
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struct tpm2_pcr_read_out {
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__be32 update_cnt;
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__be32 pcr_selects_cnt;
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__be16 hash_alg;
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u8 pcr_select_size;
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u8 pcr_select[TPM2_PCR_SELECT_MIN];
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__be32 digests_cnt;
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__be16 digest_size;
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u8 digest[];
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} __packed;
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/**
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* tpm2_pcr_read() - read a PCR value
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* @chip: TPM chip to use.
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* @pcr_idx: index of the PCR to read.
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* @digest: PCR bank and buffer current PCR value is written to.
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* @digest_size_ptr: pointer to variable that stores the digest size.
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*
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* Return: Same as with tpm_transmit_cmd.
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*/
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int tpm2_pcr_read(struct tpm_chip *chip, u32 pcr_idx,
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struct tpm_digest *digest, u16 *digest_size_ptr)
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{
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int i;
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int rc;
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struct tpm_buf buf;
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struct tpm2_pcr_read_out *out;
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u8 pcr_select[TPM2_PCR_SELECT_MIN] = {0};
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u16 digest_size;
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u16 expected_digest_size = 0;
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if (pcr_idx >= TPM2_PLATFORM_PCR)
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return -EINVAL;
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if (!digest_size_ptr) {
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for (i = 0; i < chip->nr_allocated_banks &&
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chip->allocated_banks[i].alg_id != digest->alg_id; i++)
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;
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if (i == chip->nr_allocated_banks)
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return -EINVAL;
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expected_digest_size = chip->allocated_banks[i].digest_size;
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}
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rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_PCR_READ);
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if (rc)
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return rc;
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pcr_select[pcr_idx >> 3] = 1 << (pcr_idx & 0x7);
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tpm_buf_append_u32(&buf, 1);
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tpm_buf_append_u16(&buf, digest->alg_id);
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tpm_buf_append_u8(&buf, TPM2_PCR_SELECT_MIN);
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tpm_buf_append(&buf, (const unsigned char *)pcr_select,
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sizeof(pcr_select));
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rc = tpm_transmit_cmd(chip, &buf, 0, "attempting to read a pcr value");
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if (rc)
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goto out;
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out = (struct tpm2_pcr_read_out *)&buf.data[TPM_HEADER_SIZE];
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digest_size = be16_to_cpu(out->digest_size);
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if (digest_size > sizeof(digest->digest) ||
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(!digest_size_ptr && digest_size != expected_digest_size)) {
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rc = -EINVAL;
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goto out;
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}
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if (digest_size_ptr)
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*digest_size_ptr = digest_size;
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memcpy(digest->digest, out->digest, digest_size);
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out:
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tpm_buf_destroy(&buf);
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return rc;
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}
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struct tpm2_null_auth_area {
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__be32 handle;
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__be16 nonce_size;
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u8 attributes;
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__be16 auth_size;
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} __packed;
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/**
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* tpm2_pcr_extend() - extend a PCR value
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*
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* @chip: TPM chip to use.
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* @pcr_idx: index of the PCR.
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* @digests: list of pcr banks and corresponding digest values to extend.
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*
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* Return: Same as with tpm_transmit_cmd.
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*/
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int tpm2_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
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struct tpm_digest *digests)
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{
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struct tpm_buf buf;
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struct tpm2_null_auth_area auth_area;
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int rc;
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int i;
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rc = tpm_buf_init(&buf, TPM2_ST_SESSIONS, TPM2_CC_PCR_EXTEND);
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if (rc)
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return rc;
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tpm_buf_append_u32(&buf, pcr_idx);
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auth_area.handle = cpu_to_be32(TPM2_RS_PW);
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auth_area.nonce_size = 0;
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auth_area.attributes = 0;
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auth_area.auth_size = 0;
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tpm_buf_append_u32(&buf, sizeof(struct tpm2_null_auth_area));
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tpm_buf_append(&buf, (const unsigned char *)&auth_area,
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sizeof(auth_area));
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tpm_buf_append_u32(&buf, chip->nr_allocated_banks);
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for (i = 0; i < chip->nr_allocated_banks; i++) {
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tpm_buf_append_u16(&buf, digests[i].alg_id);
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tpm_buf_append(&buf, (const unsigned char *)&digests[i].digest,
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chip->allocated_banks[i].digest_size);
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}
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rc = tpm_transmit_cmd(chip, &buf, 0, "attempting extend a PCR value");
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tpm_buf_destroy(&buf);
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return rc;
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}
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struct tpm2_get_random_out {
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__be16 size;
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u8 buffer[TPM_MAX_RNG_DATA];
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} __packed;
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/**
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* tpm2_get_random() - get random bytes from the TPM RNG
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*
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* @chip: a &tpm_chip instance
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* @dest: destination buffer
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* @max: the max number of random bytes to pull
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*
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* Return:
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* size of the buffer on success,
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* -errno otherwise (positive TPM return codes are masked to -EIO)
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*/
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int tpm2_get_random(struct tpm_chip *chip, u8 *dest, size_t max)
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{
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struct tpm2_get_random_out *out;
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struct tpm_buf buf;
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u32 recd;
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u32 num_bytes = max;
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int err;
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int total = 0;
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int retries = 5;
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u8 *dest_ptr = dest;
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if (!num_bytes || max > TPM_MAX_RNG_DATA)
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return -EINVAL;
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err = tpm_buf_init(&buf, 0, 0);
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if (err)
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return err;
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do {
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tpm_buf_reset(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_RANDOM);
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tpm_buf_append_u16(&buf, num_bytes);
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err = tpm_transmit_cmd(chip, &buf,
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offsetof(struct tpm2_get_random_out,
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buffer),
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"attempting get random");
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if (err) {
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if (err > 0)
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err = -EIO;
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goto out;
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}
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out = (struct tpm2_get_random_out *)
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&buf.data[TPM_HEADER_SIZE];
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recd = min_t(u32, be16_to_cpu(out->size), num_bytes);
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if (tpm_buf_length(&buf) <
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TPM_HEADER_SIZE +
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offsetof(struct tpm2_get_random_out, buffer) +
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recd) {
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err = -EFAULT;
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goto out;
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}
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memcpy(dest_ptr, out->buffer, recd);
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dest_ptr += recd;
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total += recd;
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num_bytes -= recd;
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} while (retries-- && total < max);
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tpm_buf_destroy(&buf);
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return total ? total : -EIO;
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out:
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tpm_buf_destroy(&buf);
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return err;
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}
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/**
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* tpm2_flush_context() - execute a TPM2_FlushContext command
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* @chip: TPM chip to use
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* @handle: context handle
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*/
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void tpm2_flush_context(struct tpm_chip *chip, u32 handle)
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{
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struct tpm_buf buf;
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int rc;
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rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_FLUSH_CONTEXT);
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if (rc) {
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dev_warn(&chip->dev, "0x%08x was not flushed, out of memory\n",
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handle);
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return;
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}
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tpm_buf_append_u32(&buf, handle);
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tpm_transmit_cmd(chip, &buf, 0, "flushing context");
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tpm_buf_destroy(&buf);
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}
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EXPORT_SYMBOL_GPL(tpm2_flush_context);
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struct tpm2_get_cap_out {
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u8 more_data;
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__be32 subcap_id;
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__be32 property_cnt;
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__be32 property_id;
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__be32 value;
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} __packed;
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/**
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* tpm2_get_tpm_pt() - get value of a TPM_CAP_TPM_PROPERTIES type property
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* @chip: a &tpm_chip instance
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* @property_id: property ID.
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* @value: output variable.
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* @desc: passed to tpm_transmit_cmd()
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*
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* Return:
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* 0 on success,
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* -errno or a TPM return code otherwise
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*/
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ssize_t tpm2_get_tpm_pt(struct tpm_chip *chip, u32 property_id, u32 *value,
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const char *desc)
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{
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struct tpm2_get_cap_out *out;
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struct tpm_buf buf;
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int rc;
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rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY);
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if (rc)
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return rc;
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tpm_buf_append_u32(&buf, TPM2_CAP_TPM_PROPERTIES);
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tpm_buf_append_u32(&buf, property_id);
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tpm_buf_append_u32(&buf, 1);
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rc = tpm_transmit_cmd(chip, &buf, 0, NULL);
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if (!rc) {
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out = (struct tpm2_get_cap_out *)
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&buf.data[TPM_HEADER_SIZE];
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/*
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* To prevent failing boot up of some systems, Infineon TPM2.0
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* returns SUCCESS on TPM2_Startup in field upgrade mode. Also
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* the TPM2_Getcapability command returns a zero length list
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* in field upgrade mode.
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*/
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if (be32_to_cpu(out->property_cnt) > 0)
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*value = be32_to_cpu(out->value);
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else
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rc = -ENODATA;
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}
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tpm_buf_destroy(&buf);
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return rc;
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}
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EXPORT_SYMBOL_GPL(tpm2_get_tpm_pt);
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/**
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* tpm2_shutdown() - send a TPM shutdown command
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*
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* Sends a TPM shutdown command. The shutdown command is used in call
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* sites where the system is going down. If it fails, there is not much
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* that can be done except print an error message.
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*
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* @chip: a &tpm_chip instance
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* @shutdown_type: TPM_SU_CLEAR or TPM_SU_STATE.
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*/
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void tpm2_shutdown(struct tpm_chip *chip, u16 shutdown_type)
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{
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struct tpm_buf buf;
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int rc;
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rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_SHUTDOWN);
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if (rc)
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return;
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tpm_buf_append_u16(&buf, shutdown_type);
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tpm_transmit_cmd(chip, &buf, 0, "stopping the TPM");
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tpm_buf_destroy(&buf);
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}
|
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|
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/**
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* tpm2_do_selftest() - ensure that all self tests have passed
|
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*
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* @chip: TPM chip to use
|
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*
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* Return: Same as with tpm_transmit_cmd.
|
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*
|
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* The TPM can either run all self tests synchronously and then return
|
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* RC_SUCCESS once all tests were successful. Or it can choose to run the tests
|
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* asynchronously and return RC_TESTING immediately while the self tests still
|
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* execute in the background. This function handles both cases and waits until
|
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* all tests have completed.
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*/
|
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static int tpm2_do_selftest(struct tpm_chip *chip)
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{
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struct tpm_buf buf;
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int full;
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int rc;
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for (full = 0; full < 2; full++) {
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rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_SELF_TEST);
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if (rc)
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return rc;
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tpm_buf_append_u8(&buf, full);
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rc = tpm_transmit_cmd(chip, &buf, 0,
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"attempting the self test");
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tpm_buf_destroy(&buf);
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if (rc == TPM2_RC_TESTING)
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rc = TPM2_RC_SUCCESS;
|
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if (rc == TPM2_RC_INITIALIZE || rc == TPM2_RC_SUCCESS)
|
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return rc;
|
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}
|
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|
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return rc;
|
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}
|
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|
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/**
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* tpm2_probe() - probe for the TPM 2.0 protocol
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* @chip: a &tpm_chip instance
|
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*
|
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* Send an idempotent TPM 2.0 command and see whether there is TPM2 chip in the
|
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* other end based on the response tag. The flag TPM_CHIP_FLAG_TPM2 is set by
|
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* this function if this is the case.
|
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*
|
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* Return:
|
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* 0 on success,
|
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* -errno otherwise
|
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*/
|
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int tpm2_probe(struct tpm_chip *chip)
|
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{
|
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struct tpm_header *out;
|
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struct tpm_buf buf;
|
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int rc;
|
|
|
|
rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY);
|
|
if (rc)
|
|
return rc;
|
|
tpm_buf_append_u32(&buf, TPM2_CAP_TPM_PROPERTIES);
|
|
tpm_buf_append_u32(&buf, TPM_PT_TOTAL_COMMANDS);
|
|
tpm_buf_append_u32(&buf, 1);
|
|
rc = tpm_transmit_cmd(chip, &buf, 0, NULL);
|
|
/* We ignore TPM return codes on purpose. */
|
|
if (rc >= 0) {
|
|
out = (struct tpm_header *)buf.data;
|
|
if (be16_to_cpu(out->tag) == TPM2_ST_NO_SESSIONS)
|
|
chip->flags |= TPM_CHIP_FLAG_TPM2;
|
|
}
|
|
tpm_buf_destroy(&buf);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(tpm2_probe);
|
|
|
|
static int tpm2_init_bank_info(struct tpm_chip *chip, u32 bank_index)
|
|
{
|
|
struct tpm_bank_info *bank = chip->allocated_banks + bank_index;
|
|
struct tpm_digest digest = { .alg_id = bank->alg_id };
|
|
int i;
|
|
|
|
/*
|
|
* Avoid unnecessary PCR read operations to reduce overhead
|
|
* and obtain identifiers of the crypto subsystem.
|
|
*/
|
|
for (i = 0; i < ARRAY_SIZE(tpm2_hash_map); i++) {
|
|
enum hash_algo crypto_algo = tpm2_hash_map[i].crypto_id;
|
|
|
|
if (bank->alg_id != tpm2_hash_map[i].tpm_id)
|
|
continue;
|
|
|
|
bank->digest_size = hash_digest_size[crypto_algo];
|
|
bank->crypto_id = crypto_algo;
|
|
return 0;
|
|
}
|
|
|
|
bank->crypto_id = HASH_ALGO__LAST;
|
|
|
|
return tpm2_pcr_read(chip, 0, &digest, &bank->digest_size);
|
|
}
|
|
|
|
struct tpm2_pcr_selection {
|
|
__be16 hash_alg;
|
|
u8 size_of_select;
|
|
u8 pcr_select[3];
|
|
} __packed;
|
|
|
|
ssize_t tpm2_get_pcr_allocation(struct tpm_chip *chip)
|
|
{
|
|
struct tpm2_pcr_selection pcr_selection;
|
|
struct tpm_buf buf;
|
|
void *marker;
|
|
void *end;
|
|
void *pcr_select_offset;
|
|
u32 sizeof_pcr_selection;
|
|
u32 nr_possible_banks;
|
|
u32 nr_alloc_banks = 0;
|
|
u16 hash_alg;
|
|
u32 rsp_len;
|
|
int rc;
|
|
int i = 0;
|
|
|
|
rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY);
|
|
if (rc)
|
|
return rc;
|
|
|
|
tpm_buf_append_u32(&buf, TPM2_CAP_PCRS);
|
|
tpm_buf_append_u32(&buf, 0);
|
|
tpm_buf_append_u32(&buf, 1);
|
|
|
|
rc = tpm_transmit_cmd(chip, &buf, 9, "get tpm pcr allocation");
|
|
if (rc)
|
|
goto out;
|
|
|
|
nr_possible_banks = be32_to_cpup(
|
|
(__be32 *)&buf.data[TPM_HEADER_SIZE + 5]);
|
|
|
|
chip->allocated_banks = kcalloc(nr_possible_banks,
|
|
sizeof(*chip->allocated_banks),
|
|
GFP_KERNEL);
|
|
if (!chip->allocated_banks) {
|
|
rc = -ENOMEM;
|
|
goto out;
|
|
}
|
|
|
|
marker = &buf.data[TPM_HEADER_SIZE + 9];
|
|
|
|
rsp_len = be32_to_cpup((__be32 *)&buf.data[2]);
|
|
end = &buf.data[rsp_len];
|
|
|
|
for (i = 0; i < nr_possible_banks; i++) {
|
|
pcr_select_offset = marker +
|
|
offsetof(struct tpm2_pcr_selection, size_of_select);
|
|
if (pcr_select_offset >= end) {
|
|
rc = -EFAULT;
|
|
break;
|
|
}
|
|
|
|
memcpy(&pcr_selection, marker, sizeof(pcr_selection));
|
|
hash_alg = be16_to_cpu(pcr_selection.hash_alg);
|
|
|
|
pcr_select_offset = memchr_inv(pcr_selection.pcr_select, 0,
|
|
pcr_selection.size_of_select);
|
|
if (pcr_select_offset) {
|
|
chip->allocated_banks[nr_alloc_banks].alg_id = hash_alg;
|
|
|
|
rc = tpm2_init_bank_info(chip, nr_alloc_banks);
|
|
if (rc < 0)
|
|
break;
|
|
|
|
nr_alloc_banks++;
|
|
}
|
|
|
|
sizeof_pcr_selection = sizeof(pcr_selection.hash_alg) +
|
|
sizeof(pcr_selection.size_of_select) +
|
|
pcr_selection.size_of_select;
|
|
marker = marker + sizeof_pcr_selection;
|
|
}
|
|
|
|
chip->nr_allocated_banks = nr_alloc_banks;
|
|
out:
|
|
tpm_buf_destroy(&buf);
|
|
|
|
return rc;
|
|
}
|
|
|
|
int tpm2_get_cc_attrs_tbl(struct tpm_chip *chip)
|
|
{
|
|
struct tpm_buf buf;
|
|
u32 nr_commands;
|
|
__be32 *attrs;
|
|
u32 cc;
|
|
int i;
|
|
int rc;
|
|
|
|
rc = tpm2_get_tpm_pt(chip, TPM_PT_TOTAL_COMMANDS, &nr_commands, NULL);
|
|
if (rc)
|
|
goto out;
|
|
|
|
if (nr_commands > 0xFFFFF) {
|
|
rc = -EFAULT;
|
|
goto out;
|
|
}
|
|
|
|
chip->cc_attrs_tbl = devm_kcalloc(&chip->dev, 4, nr_commands,
|
|
GFP_KERNEL);
|
|
if (!chip->cc_attrs_tbl) {
|
|
rc = -ENOMEM;
|
|
goto out;
|
|
}
|
|
|
|
rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY);
|
|
if (rc)
|
|
goto out;
|
|
|
|
tpm_buf_append_u32(&buf, TPM2_CAP_COMMANDS);
|
|
tpm_buf_append_u32(&buf, TPM2_CC_FIRST);
|
|
tpm_buf_append_u32(&buf, nr_commands);
|
|
|
|
rc = tpm_transmit_cmd(chip, &buf, 9 + 4 * nr_commands, NULL);
|
|
if (rc) {
|
|
tpm_buf_destroy(&buf);
|
|
goto out;
|
|
}
|
|
|
|
if (nr_commands !=
|
|
be32_to_cpup((__be32 *)&buf.data[TPM_HEADER_SIZE + 5])) {
|
|
rc = -EFAULT;
|
|
tpm_buf_destroy(&buf);
|
|
goto out;
|
|
}
|
|
|
|
chip->nr_commands = nr_commands;
|
|
|
|
attrs = (__be32 *)&buf.data[TPM_HEADER_SIZE + 9];
|
|
for (i = 0; i < nr_commands; i++, attrs++) {
|
|
chip->cc_attrs_tbl[i] = be32_to_cpup(attrs);
|
|
cc = chip->cc_attrs_tbl[i] & 0xFFFF;
|
|
|
|
if (cc == TPM2_CC_CONTEXT_SAVE || cc == TPM2_CC_FLUSH_CONTEXT) {
|
|
chip->cc_attrs_tbl[i] &=
|
|
~(GENMASK(2, 0) << TPM2_CC_ATTR_CHANDLES);
|
|
chip->cc_attrs_tbl[i] |= 1 << TPM2_CC_ATTR_CHANDLES;
|
|
}
|
|
}
|
|
|
|
tpm_buf_destroy(&buf);
|
|
|
|
out:
|
|
if (rc > 0)
|
|
rc = -ENODEV;
|
|
return rc;
|
|
}
|
|
EXPORT_SYMBOL_GPL(tpm2_get_cc_attrs_tbl);
|
|
|
|
/**
|
|
* tpm2_startup - turn on the TPM
|
|
* @chip: TPM chip to use
|
|
*
|
|
* Normally the firmware should start the TPM. This function is provided as a
|
|
* workaround if this does not happen. A legal case for this could be for
|
|
* example when a TPM emulator is used.
|
|
*
|
|
* Return: same as tpm_transmit_cmd()
|
|
*/
|
|
|
|
static int tpm2_startup(struct tpm_chip *chip)
|
|
{
|
|
struct tpm_buf buf;
|
|
int rc;
|
|
|
|
dev_info(&chip->dev, "starting up the TPM manually\n");
|
|
|
|
rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_STARTUP);
|
|
if (rc < 0)
|
|
return rc;
|
|
|
|
tpm_buf_append_u16(&buf, TPM2_SU_CLEAR);
|
|
rc = tpm_transmit_cmd(chip, &buf, 0, "attempting to start the TPM");
|
|
tpm_buf_destroy(&buf);
|
|
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* tpm2_auto_startup - Perform the standard automatic TPM initialization
|
|
* sequence
|
|
* @chip: TPM chip to use
|
|
*
|
|
* Returns 0 on success, < 0 in case of fatal error.
|
|
*/
|
|
int tpm2_auto_startup(struct tpm_chip *chip)
|
|
{
|
|
int rc;
|
|
|
|
rc = tpm2_get_timeouts(chip);
|
|
if (rc)
|
|
goto out;
|
|
|
|
rc = tpm2_do_selftest(chip);
|
|
if (rc && rc != TPM2_RC_INITIALIZE)
|
|
goto out;
|
|
|
|
if (rc == TPM2_RC_INITIALIZE) {
|
|
rc = tpm2_startup(chip);
|
|
if (rc)
|
|
goto out;
|
|
|
|
rc = tpm2_do_selftest(chip);
|
|
if (rc)
|
|
goto out;
|
|
}
|
|
|
|
rc = tpm2_get_cc_attrs_tbl(chip);
|
|
if (rc == TPM2_RC_FAILURE || (rc < 0 && rc != -ENOMEM)) {
|
|
dev_info(&chip->dev,
|
|
"TPM in field failure mode, requires firmware upgrade\n");
|
|
chip->flags |= TPM_CHIP_FLAG_FIRMWARE_UPGRADE;
|
|
rc = 0;
|
|
}
|
|
|
|
out:
|
|
/*
|
|
* Infineon TPM in field upgrade mode will return no data for the number
|
|
* of supported commands.
|
|
*/
|
|
if (rc == TPM2_RC_UPGRADE || rc == -ENODATA) {
|
|
dev_info(&chip->dev, "TPM in field upgrade mode, requires firmware upgrade\n");
|
|
chip->flags |= TPM_CHIP_FLAG_FIRMWARE_UPGRADE;
|
|
rc = 0;
|
|
}
|
|
|
|
if (rc > 0)
|
|
rc = -ENODEV;
|
|
return rc;
|
|
}
|
|
|
|
int tpm2_find_cc(struct tpm_chip *chip, u32 cc)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < chip->nr_commands; i++)
|
|
if (cc == (chip->cc_attrs_tbl[i] & GENMASK(15, 0)))
|
|
return i;
|
|
|
|
return -1;
|
|
}
|