129 lines
3.4 KiB
C
129 lines
3.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* S390 version
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*
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* Derived from "include/asm-i386/mmu_context.h"
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*/
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#ifndef __S390_MMU_CONTEXT_H
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#define __S390_MMU_CONTEXT_H
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#include <asm/pgalloc.h>
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#include <linux/uaccess.h>
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#include <linux/mm_types.h>
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#include <asm/tlbflush.h>
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#include <asm/ctl_reg.h>
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#include <asm-generic/mm_hooks.h>
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#define init_new_context init_new_context
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static inline int init_new_context(struct task_struct *tsk,
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struct mm_struct *mm)
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{
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unsigned long asce_type, init_entry;
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spin_lock_init(&mm->context.lock);
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INIT_LIST_HEAD(&mm->context.pgtable_list);
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INIT_LIST_HEAD(&mm->context.gmap_list);
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cpumask_clear(&mm->context.cpu_attach_mask);
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atomic_set(&mm->context.flush_count, 0);
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atomic_set(&mm->context.protected_count, 0);
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mm->context.gmap_asce = 0;
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mm->context.flush_mm = 0;
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#ifdef CONFIG_PGSTE
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mm->context.alloc_pgste = page_table_allocate_pgste ||
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test_thread_flag(TIF_PGSTE) ||
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(current->mm && current->mm->context.alloc_pgste);
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mm->context.has_pgste = 0;
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mm->context.uses_skeys = 0;
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mm->context.uses_cmm = 0;
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mm->context.allow_gmap_hpage_1m = 0;
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#endif
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switch (mm->context.asce_limit) {
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default:
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/*
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* context created by exec, the value of asce_limit can
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* only be zero in this case
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*/
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VM_BUG_ON(mm->context.asce_limit);
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/* continue as 3-level task */
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mm->context.asce_limit = _REGION2_SIZE;
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fallthrough;
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case _REGION2_SIZE:
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/* forked 3-level task */
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init_entry = _REGION3_ENTRY_EMPTY;
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asce_type = _ASCE_TYPE_REGION3;
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break;
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case TASK_SIZE_MAX:
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/* forked 5-level task */
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init_entry = _REGION1_ENTRY_EMPTY;
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asce_type = _ASCE_TYPE_REGION1;
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break;
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case _REGION1_SIZE:
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/* forked 4-level task */
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init_entry = _REGION2_ENTRY_EMPTY;
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asce_type = _ASCE_TYPE_REGION2;
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break;
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}
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mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
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_ASCE_USER_BITS | asce_type;
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crst_table_init((unsigned long *) mm->pgd, init_entry);
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return 0;
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}
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static inline void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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int cpu = smp_processor_id();
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if (next == &init_mm)
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S390_lowcore.user_asce = s390_invalid_asce;
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else
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S390_lowcore.user_asce = next->context.asce;
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cpumask_set_cpu(cpu, &next->context.cpu_attach_mask);
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/* Clear previous user-ASCE from CR7 */
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__ctl_load(s390_invalid_asce, 7, 7);
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if (prev != next)
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cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
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}
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#define switch_mm_irqs_off switch_mm_irqs_off
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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unsigned long flags;
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local_irq_save(flags);
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switch_mm_irqs_off(prev, next, tsk);
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local_irq_restore(flags);
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}
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#define finish_arch_post_lock_switch finish_arch_post_lock_switch
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static inline void finish_arch_post_lock_switch(void)
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{
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struct task_struct *tsk = current;
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struct mm_struct *mm = tsk->mm;
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if (mm) {
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preempt_disable();
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while (atomic_read(&mm->context.flush_count))
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cpu_relax();
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
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__tlb_flush_mm_lazy(mm);
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preempt_enable();
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}
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__ctl_load(S390_lowcore.user_asce, 7, 7);
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}
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#define activate_mm activate_mm
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static inline void activate_mm(struct mm_struct *prev,
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struct mm_struct *next)
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{
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switch_mm(prev, next, current);
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
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__ctl_load(S390_lowcore.user_asce, 7, 7);
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}
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#include <asm-generic/mmu_context.h>
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#endif /* __S390_MMU_CONTEXT_H */
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