218 lines
5.7 KiB
C
218 lines
5.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* User-space Probes (UProbes) for powerpc
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*
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* Copyright IBM Corporation, 2007-2012
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*
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* Adapted from the x86 port by Ananth N Mavinakayanahalli <ananth@in.ibm.com>
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*/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/ptrace.h>
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#include <linux/uprobes.h>
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#include <linux/uaccess.h>
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#include <linux/kdebug.h>
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#include <asm/sstep.h>
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#include <asm/inst.h>
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#define UPROBE_TRAP_NR UINT_MAX
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/**
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* is_trap_insn - check if the instruction is a trap variant
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* @insn: instruction to be checked.
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* Returns true if @insn is a trap variant.
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*/
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bool is_trap_insn(uprobe_opcode_t *insn)
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{
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return (is_trap(*insn));
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}
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/**
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* arch_uprobe_analyze_insn
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* @mm: the probed address space.
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* @arch_uprobe: the probepoint information.
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* @addr: vaddr to probe.
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* Return 0 on success or a -ve number on error.
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*/
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int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe,
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struct mm_struct *mm, unsigned long addr)
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{
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if (addr & 0x03)
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return -EINVAL;
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if (cpu_has_feature(CPU_FTR_ARCH_31) &&
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ppc_inst_prefixed(ppc_inst_read(auprobe->insn)) &&
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(addr & 0x3f) == 60) {
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pr_info_ratelimited("Cannot register a uprobe on 64 byte unaligned prefixed instruction\n");
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return -EINVAL;
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}
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if (!can_single_step(ppc_inst_val(ppc_inst_read(auprobe->insn)))) {
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pr_info_ratelimited("Cannot register a uprobe on instructions that can't be single stepped\n");
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return -ENOTSUPP;
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}
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return 0;
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}
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/*
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* arch_uprobe_pre_xol - prepare to execute out of line.
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* @auprobe: the probepoint information.
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* @regs: reflects the saved user state of current task.
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*/
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int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
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{
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struct arch_uprobe_task *autask = ¤t->utask->autask;
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autask->saved_trap_nr = current->thread.trap_nr;
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current->thread.trap_nr = UPROBE_TRAP_NR;
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regs_set_return_ip(regs, current->utask->xol_vaddr);
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user_enable_single_step(current);
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return 0;
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}
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/**
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* uprobe_get_swbp_addr - compute address of swbp given post-swbp regs
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* @regs: Reflects the saved state of the task after it has hit a breakpoint
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* instruction.
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* Return the address of the breakpoint instruction.
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*/
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unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
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{
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return instruction_pointer(regs);
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}
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/*
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* If xol insn itself traps and generates a signal (SIGILL/SIGSEGV/etc),
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* then detect the case where a singlestepped instruction jumps back to its
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* own address. It is assumed that anything like do_page_fault/do_trap/etc
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* sets thread.trap_nr != UINT_MAX.
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*
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* arch_uprobe_pre_xol/arch_uprobe_post_xol save/restore thread.trap_nr,
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* arch_uprobe_xol_was_trapped() simply checks that ->trap_nr is not equal to
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* UPROBE_TRAP_NR == UINT_MAX set by arch_uprobe_pre_xol().
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*/
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bool arch_uprobe_xol_was_trapped(struct task_struct *t)
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{
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if (t->thread.trap_nr != UPROBE_TRAP_NR)
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return true;
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return false;
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}
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/*
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* Called after single-stepping. To avoid the SMP problems that can
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* occur when we temporarily put back the original opcode to
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* single-step, we single-stepped a copy of the instruction.
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*
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* This function prepares to resume execution after the single-step.
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*/
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int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
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{
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struct uprobe_task *utask = current->utask;
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WARN_ON_ONCE(current->thread.trap_nr != UPROBE_TRAP_NR);
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current->thread.trap_nr = utask->autask.saved_trap_nr;
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/*
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* On powerpc, except for loads and stores, most instructions
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* including ones that alter code flow (branches, calls, returns)
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* are emulated in the kernel. We get here only if the emulation
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* support doesn't exist and have to fix-up the next instruction
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* to be executed.
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*/
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regs_set_return_ip(regs, (unsigned long)ppc_inst_next((void *)utask->vaddr, auprobe->insn));
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user_disable_single_step(current);
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return 0;
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}
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/* callback routine for handling exceptions. */
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int arch_uprobe_exception_notify(struct notifier_block *self,
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unsigned long val, void *data)
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{
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struct die_args *args = data;
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struct pt_regs *regs = args->regs;
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/* regs == NULL is a kernel bug */
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if (WARN_ON(!regs))
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return NOTIFY_DONE;
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/* We are only interested in userspace traps */
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if (!user_mode(regs))
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return NOTIFY_DONE;
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switch (val) {
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case DIE_BPT:
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if (uprobe_pre_sstep_notifier(regs))
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return NOTIFY_STOP;
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break;
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case DIE_SSTEP:
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if (uprobe_post_sstep_notifier(regs))
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return NOTIFY_STOP;
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break;
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default:
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break;
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}
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return NOTIFY_DONE;
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}
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/*
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* This function gets called when XOL instruction either gets trapped or
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* the thread has a fatal signal, so reset the instruction pointer to its
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* probed address.
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*/
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void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
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{
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struct uprobe_task *utask = current->utask;
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current->thread.trap_nr = utask->autask.saved_trap_nr;
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instruction_pointer_set(regs, utask->vaddr);
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user_disable_single_step(current);
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}
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/*
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* See if the instruction can be emulated.
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* Returns true if instruction was emulated, false otherwise.
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*/
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bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
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{
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int ret;
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/*
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* emulate_step() returns 1 if the insn was successfully emulated.
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* For all other cases, we need to single-step in hardware.
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*/
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ret = emulate_step(regs, ppc_inst_read(auprobe->insn));
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if (ret > 0)
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return true;
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return false;
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}
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unsigned long
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arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr, struct pt_regs *regs)
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{
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unsigned long orig_ret_vaddr;
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orig_ret_vaddr = regs->link;
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/* Replace the return addr with trampoline addr */
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regs->link = trampoline_vaddr;
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return orig_ret_vaddr;
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}
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bool arch_uretprobe_is_alive(struct return_instance *ret, enum rp_check ctx,
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struct pt_regs *regs)
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{
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if (ctx == RP_CHECK_CHAIN_CALL)
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return regs->gpr[1] <= ret->stack;
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else
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return regs->gpr[1] < ret->stack;
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}
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