215 lines
5.7 KiB
C
215 lines
5.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_IA64_PAGE_H
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#define _ASM_IA64_PAGE_H
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/*
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* Pagetable related stuff.
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*
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* Copyright (C) 1998, 1999, 2002 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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#include <asm/intrinsics.h>
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#include <asm/types.h>
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/*
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* The top three bits of an IA64 address are its Region Number.
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* Different regions are assigned to different purposes.
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*/
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#define RGN_SHIFT (61)
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#define RGN_BASE(r) (__IA64_UL_CONST(r)<<RGN_SHIFT)
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#define RGN_BITS (RGN_BASE(-1))
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#define RGN_KERNEL 7 /* Identity mapped region */
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#define RGN_UNCACHED 6 /* Identity mapped I/O region */
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#define RGN_GATE 5 /* Gate page, Kernel text, etc */
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#define RGN_HPAGE 4 /* For Huge TLB pages */
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/*
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* PAGE_SHIFT determines the actual kernel page size.
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*/
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#if defined(CONFIG_IA64_PAGE_SIZE_4KB)
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# define PAGE_SHIFT 12
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#elif defined(CONFIG_IA64_PAGE_SIZE_8KB)
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# define PAGE_SHIFT 13
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#elif defined(CONFIG_IA64_PAGE_SIZE_16KB)
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# define PAGE_SHIFT 14
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#elif defined(CONFIG_IA64_PAGE_SIZE_64KB)
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# define PAGE_SHIFT 16
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#else
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# error Unsupported page size!
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#endif
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#define PAGE_SIZE (__IA64_UL_CONST(1) << PAGE_SHIFT)
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#define PAGE_MASK (~(PAGE_SIZE - 1))
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#define PERCPU_PAGE_SHIFT 18 /* log2() of max. size of per-CPU area */
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#define PERCPU_PAGE_SIZE (__IA64_UL_CONST(1) << PERCPU_PAGE_SHIFT)
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#ifdef CONFIG_HUGETLB_PAGE
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# define HPAGE_REGION_BASE RGN_BASE(RGN_HPAGE)
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# define HPAGE_SHIFT hpage_shift
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# define HPAGE_SHIFT_DEFAULT 28 /* check ia64 SDM for architecture supported size */
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# define HPAGE_SIZE (__IA64_UL_CONST(1) << HPAGE_SHIFT)
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# define HPAGE_MASK (~(HPAGE_SIZE - 1))
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# define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
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#endif /* CONFIG_HUGETLB_PAGE */
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#ifdef __ASSEMBLY__
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# define __pa(x) ((x) - PAGE_OFFSET)
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# define __va(x) ((x) + PAGE_OFFSET)
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#else /* !__ASSEMBLY */
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# define STRICT_MM_TYPECHECKS
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extern void clear_page (void *page);
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extern void copy_page (void *to, void *from);
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/*
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* clear_user_page() and copy_user_page() can't be inline functions because
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* flush_dcache_page() can't be defined until later...
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*/
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#define clear_user_page(addr, vaddr, page) \
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do { \
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clear_page(addr); \
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flush_dcache_page(page); \
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} while (0)
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#define copy_user_page(to, from, vaddr, page) \
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do { \
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copy_page((to), (from)); \
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flush_dcache_page(page); \
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} while (0)
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#define alloc_zeroed_user_highpage_movable(vma, vaddr) \
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({ \
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struct page *page = alloc_page_vma( \
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GFP_HIGHUSER_MOVABLE | __GFP_ZERO, vma, vaddr); \
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if (page) \
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flush_dcache_page(page); \
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page; \
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})
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#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE_MOVABLE
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#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
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#include <asm-generic/memory_model.h>
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#ifdef CONFIG_FLATMEM
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# define pfn_valid(pfn) ((pfn) < max_mapnr)
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#endif
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#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
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#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
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#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
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typedef union ia64_va {
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struct {
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unsigned long off : 61; /* intra-region offset */
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unsigned long reg : 3; /* region number */
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} f;
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unsigned long l;
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void *p;
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} ia64_va;
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/*
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* Note: These macros depend on the fact that PAGE_OFFSET has all
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* region bits set to 1 and all other bits set to zero. They are
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* expressed in this way to ensure they result in a single "dep"
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* instruction.
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*/
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#define __pa(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg = 0; _v.l;})
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#define __va(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg = -1; _v.p;})
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#define REGION_NUMBER(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg;})
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#define REGION_OFFSET(x) ({ia64_va _v; _v.l = (long) (x); _v.f.off;})
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#ifdef CONFIG_HUGETLB_PAGE
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# define htlbpage_to_page(x) (((unsigned long) REGION_NUMBER(x) << 61) \
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| (REGION_OFFSET(x) >> (HPAGE_SHIFT-PAGE_SHIFT)))
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# define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
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extern unsigned int hpage_shift;
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#endif
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static __inline__ int
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get_order (unsigned long size)
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{
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long double d = size - 1;
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long order;
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order = ia64_getf_exp(d);
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order = order - PAGE_SHIFT - 0xffff + 1;
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if (order < 0)
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order = 0;
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return order;
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}
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#endif /* !__ASSEMBLY__ */
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#ifdef STRICT_MM_TYPECHECKS
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/*
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* These are used to make use of C type-checking..
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*/
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typedef struct { unsigned long pte; } pte_t;
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typedef struct { unsigned long pmd; } pmd_t;
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#if CONFIG_PGTABLE_LEVELS == 4
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typedef struct { unsigned long pud; } pud_t;
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#endif
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typedef struct { unsigned long pgd; } pgd_t;
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typedef struct { unsigned long pgprot; } pgprot_t;
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typedef struct page *pgtable_t;
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# define pte_val(x) ((x).pte)
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# define pmd_val(x) ((x).pmd)
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#if CONFIG_PGTABLE_LEVELS == 4
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# define pud_val(x) ((x).pud)
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#endif
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# define pgd_val(x) ((x).pgd)
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# define pgprot_val(x) ((x).pgprot)
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# define __pte(x) ((pte_t) { (x) } )
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# define __pmd(x) ((pmd_t) { (x) } )
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# define __pgprot(x) ((pgprot_t) { (x) } )
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#else /* !STRICT_MM_TYPECHECKS */
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/*
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* .. while these make it easier on the compiler
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*/
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# ifndef __ASSEMBLY__
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typedef unsigned long pte_t;
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typedef unsigned long pmd_t;
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typedef unsigned long pgd_t;
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typedef unsigned long pgprot_t;
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typedef struct page *pgtable_t;
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# endif
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# define pte_val(x) (x)
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# define pmd_val(x) (x)
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# define pgd_val(x) (x)
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# define pgprot_val(x) (x)
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# define __pte(x) (x)
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# define __pgd(x) (x)
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# define __pgprot(x) (x)
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#endif /* !STRICT_MM_TYPECHECKS */
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#define PAGE_OFFSET RGN_BASE(RGN_KERNEL)
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#define VM_DATA_DEFAULT_FLAGS VM_DATA_FLAGS_TSK_EXEC
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#define GATE_ADDR RGN_BASE(RGN_GATE)
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/*
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* 0xa000000000000000+2*PERCPU_PAGE_SIZE
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* - 0xa000000000000000+3*PERCPU_PAGE_SIZE remain unmapped (guard page)
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*/
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#define KERNEL_START (GATE_ADDR+__IA64_UL_CONST(0x100000000))
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#define PERCPU_ADDR (-PERCPU_PAGE_SIZE)
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#define LOAD_OFFSET (KERNEL_START - KERNEL_TR_PAGE_SIZE)
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#define __HAVE_ARCH_GATE_AREA 1
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#endif /* _ASM_IA64_PAGE_H */
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