1463 lines
29 KiB
Plaintext
1463 lines
29 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Google Cheza device tree source (common between revisions)
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*
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* Copyright 2018 Google LLC.
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*/
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
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#include "sdm845.dtsi"
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/* PMICs depend on spmi_bus label and so must come after SoC */
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#include "pm8005.dtsi"
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#include "pm8998.dtsi"
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/ {
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aliases {
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bluetooth0 = &bluetooth;
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hsuart0 = &uart6;
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serial0 = &uart9;
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wifi0 = &wifi;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&cros_ec_pwm 0>;
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enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
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power-supply = <&ppvar_sys>;
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pinctrl-names = "default";
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pinctrl-0 = <&ap_edp_bklten>;
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};
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/* FIXED REGULATORS - parents above children */
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/* This is the top level supply and variable voltage */
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ppvar_sys: ppvar-sys-regulator {
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compatible = "regulator-fixed";
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regulator-name = "ppvar_sys";
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regulator-always-on;
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regulator-boot-on;
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};
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/* This divides ppvar_sys by 2, so voltage is variable */
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src_vph_pwr: src-vph-pwr-regulator {
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compatible = "regulator-fixed";
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regulator-name = "src_vph_pwr";
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/* EC turns on with switchcap_on_l; always on for AP */
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&ppvar_sys>;
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};
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pp5000_a: pp5000-a-regulator {
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compatible = "regulator-fixed";
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regulator-name = "pp5000_a";
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/* EC turns on with en_pp5000_a; always on for AP */
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&ppvar_sys>;
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};
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src_vreg_bob: src-vreg-bob-regulator {
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compatible = "regulator-fixed";
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regulator-name = "src_vreg_bob";
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/* EC turns on with vbob_en; always on for AP */
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3600000>;
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regulator-max-microvolt = <3600000>;
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vin-supply = <&ppvar_sys>;
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};
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pp3300_dx_edp: pp3300-dx-edp-regulator {
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compatible = "regulator-fixed";
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regulator-name = "pp3300_dx_edp";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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pinctrl-names = "default";
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pinctrl-0 = <&en_pp3300_dx_edp>;
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};
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/*
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* Apparently RPMh does not provide support for PM8998 S4 because it
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* is always-on; model it as a fixed regulator.
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*/
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src_pp1800_s4a: pm8998-smps4 {
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compatible = "regulator-fixed";
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regulator-name = "src_pp1800_s4a";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&src_vph_pwr>;
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};
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/* BOARD-SPECIFIC TOP LEVEL NODES */
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pen_eject_odl>;
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switch-pen-insert {
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label = "Pen Insert";
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/* Insert = low, eject = high */
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gpios = <&tlmm 119 GPIO_ACTIVE_LOW>;
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linux,code = <SW_PEN_INSERTED>;
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linux,input-type = <EV_SW>;
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wakeup-source;
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};
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};
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panel: panel {
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compatible = "innolux,p120zdg-bf1";
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power-supply = <&pp3300_dx_edp>;
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backlight = <&backlight>;
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no-hpd;
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ports {
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panel_in: port {
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panel_in_edp: endpoint {
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remote-endpoint = <&sn65dsi86_out>;
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};
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};
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};
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};
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};
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&psci {
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/delete-node/ cpu0;
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/delete-node/ cpu1;
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/delete-node/ cpu2;
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/delete-node/ cpu3;
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/delete-node/ cpu4;
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/delete-node/ cpu5;
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/delete-node/ cpu6;
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/delete-node/ cpu7;
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/delete-node/ cpu-cluster0;
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};
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&cpus {
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/delete-node/ domain-idle-states;
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};
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&cpu_idle_states {
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LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
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compatible = "arm,idle-state";
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idle-state-name = "little-power-down";
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arm,psci-suspend-param = <0x40000003>;
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entry-latency-us = <350>;
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exit-latency-us = <461>;
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min-residency-us = <1890>;
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local-timer-stop;
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};
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LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
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compatible = "arm,idle-state";
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idle-state-name = "little-rail-power-down";
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arm,psci-suspend-param = <0x40000004>;
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entry-latency-us = <360>;
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exit-latency-us = <531>;
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min-residency-us = <3934>;
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local-timer-stop;
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};
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BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
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compatible = "arm,idle-state";
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idle-state-name = "big-power-down";
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arm,psci-suspend-param = <0x40000003>;
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entry-latency-us = <264>;
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exit-latency-us = <621>;
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min-residency-us = <952>;
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local-timer-stop;
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};
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BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
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compatible = "arm,idle-state";
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idle-state-name = "big-rail-power-down";
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arm,psci-suspend-param = <0x40000004>;
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entry-latency-us = <702>;
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exit-latency-us = <1061>;
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min-residency-us = <4488>;
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local-timer-stop;
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};
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CLUSTER_SLEEP_0: cluster-sleep-0 {
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compatible = "arm,idle-state";
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idle-state-name = "cluster-power-down";
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arm,psci-suspend-param = <0x400000F4>;
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entry-latency-us = <3263>;
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exit-latency-us = <6562>;
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min-residency-us = <9987>;
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local-timer-stop;
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};
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};
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&CPU0 {
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/delete-property/ power-domains;
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/delete-property/ power-domain-names;
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cpu-idle-states = <&LITTLE_CPU_SLEEP_0
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&LITTLE_CPU_SLEEP_1
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&CLUSTER_SLEEP_0>;
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};
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&CPU1 {
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/delete-property/ power-domains;
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/delete-property/ power-domain-names;
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cpu-idle-states = <&LITTLE_CPU_SLEEP_0
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&LITTLE_CPU_SLEEP_1
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&CLUSTER_SLEEP_0>;
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};
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&CPU2 {
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/delete-property/ power-domains;
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/delete-property/ power-domain-names;
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cpu-idle-states = <&LITTLE_CPU_SLEEP_0
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&LITTLE_CPU_SLEEP_1
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&CLUSTER_SLEEP_0>;
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};
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&CPU3 {
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/delete-property/ power-domains;
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/delete-property/ power-domain-names;
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cpu-idle-states = <&LITTLE_CPU_SLEEP_0
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&LITTLE_CPU_SLEEP_1
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&CLUSTER_SLEEP_0>;
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};
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&CPU4 {
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/delete-property/ power-domains;
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/delete-property/ power-domain-names;
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cpu-idle-states = <&BIG_CPU_SLEEP_0
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&BIG_CPU_SLEEP_1
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&CLUSTER_SLEEP_0>;
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};
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&CPU5 {
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/delete-property/ power-domains;
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/delete-property/ power-domain-names;
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cpu-idle-states = <&BIG_CPU_SLEEP_0
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&BIG_CPU_SLEEP_1
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&CLUSTER_SLEEP_0>;
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};
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&CPU6 {
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/delete-property/ power-domains;
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/delete-property/ power-domain-names;
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cpu-idle-states = <&BIG_CPU_SLEEP_0
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&BIG_CPU_SLEEP_1
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&CLUSTER_SLEEP_0>;
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};
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&CPU7 {
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/delete-property/ power-domains;
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/delete-property/ power-domain-names;
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cpu-idle-states = <&BIG_CPU_SLEEP_0
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&BIG_CPU_SLEEP_1
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&CLUSTER_SLEEP_0>;
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};
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/*
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* Reserved memory changes
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*
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* Putting this all together (out of order with the rest of the file) to keep
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* all modifications to the memory map (from sdm845.dtsi) in one place.
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*/
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/*
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* Our mpss_region is 8MB bigger than the default one and that conflicts
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* with venus_mem and cdsp_mem.
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*
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* For venus_mem we'll delete and re-create at a different address.
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*
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* cdsp_mem isn't used on cheza right now so we won't bother re-creating it; but
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* that also means we need to delete cdsp_pas.
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*/
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/delete-node/ &venus_mem;
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/delete-node/ &cdsp_mem;
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/delete-node/ &cdsp_pas;
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/delete-node/ &gpu_mem;
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/* Increase the size from 120 MB to 128 MB */
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&mpss_region {
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reg = <0 0x8e000000 0 0x8000000>;
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};
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/* Increase the size from 2MB to 8MB */
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&rmtfs_mem {
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reg = <0 0x88f00000 0 0x800000>;
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};
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/ {
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reserved-memory {
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venus_mem: memory@96000000 {
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reg = <0 0x96000000 0 0x500000>;
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no-map;
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};
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};
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};
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&qspi {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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/*
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* In theory chip supports up to 104 MHz and controller up
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* to 80 MHz, but above 25 MHz wasn't reliable so we'll use
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* that for now. b:117440651
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*/
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spi-max-frequency = <25000000>;
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spi-tx-bus-width = <2>;
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spi-rx-bus-width = <2>;
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};
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};
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&apps_rsc {
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pm8998-rpmh-regulators {
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compatible = "qcom,pm8998-rpmh-regulators";
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qcom,pmic-id = "a";
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vdd-s1-supply = <&src_vph_pwr>;
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vdd-s2-supply = <&src_vph_pwr>;
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vdd-s3-supply = <&src_vph_pwr>;
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vdd-s4-supply = <&src_vph_pwr>;
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vdd-s5-supply = <&src_vph_pwr>;
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vdd-s6-supply = <&src_vph_pwr>;
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vdd-s7-supply = <&src_vph_pwr>;
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vdd-s8-supply = <&src_vph_pwr>;
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vdd-s9-supply = <&src_vph_pwr>;
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vdd-s10-supply = <&src_vph_pwr>;
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vdd-s11-supply = <&src_vph_pwr>;
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vdd-s12-supply = <&src_vph_pwr>;
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vdd-s13-supply = <&src_vph_pwr>;
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vdd-l1-l27-supply = <&src_pp1025_s7a>;
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vdd-l2-l8-l17-supply = <&src_pp1350_s3a>;
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vdd-l3-l11-supply = <&src_pp1025_s7a>;
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vdd-l4-l5-supply = <&src_pp1025_s7a>;
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vdd-l6-supply = <&src_vph_pwr>;
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vdd-l7-l12-l14-l15-supply = <&src_pp2040_s5a>;
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vdd-l9-supply = <&src_pp2040_s5a>;
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vdd-l10-l23-l25-supply = <&src_vreg_bob>;
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vdd-l13-l19-l21-supply = <&src_vreg_bob>;
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vdd-l16-l28-supply = <&src_vreg_bob>;
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vdd-l18-l22-supply = <&src_vreg_bob>;
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vdd-l20-l24-supply = <&src_vreg_bob>;
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vdd-l26-supply = <&src_pp1350_s3a>;
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vin-lvs-1-2-supply = <&src_pp1800_s4a>;
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src_pp1125_s2a: smps2 {
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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};
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src_pp1350_s3a: smps3 {
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regulator-min-microvolt = <1352000>;
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regulator-max-microvolt = <1352000>;
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};
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src_pp2040_s5a: smps5 {
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regulator-min-microvolt = <1904000>;
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regulator-max-microvolt = <2040000>;
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};
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src_pp1025_s7a: smps7 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1028000>;
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};
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vdd_qusb_hs0:
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vdda_hp_pcie_core:
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vdda_mipi_csi0_0p9:
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vdda_mipi_csi1_0p9:
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vdda_mipi_csi2_0p9:
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vdda_mipi_dsi0_pll:
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vdda_mipi_dsi1_pll:
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vdda_qlink_lv:
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vdda_qlink_lv_ck:
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vdda_qrefs_0p875:
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vdda_pcie_core:
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vdda_pll_cc_ebi01:
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vdda_pll_cc_ebi23:
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vdda_sp_sensor:
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vdda_ufs1_core:
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vdda_ufs2_core:
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vdda_usb1_ss_core:
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vdda_usb2_ss_core:
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src_pp875_l1a: ldo1 {
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regulator-min-microvolt = <880000>;
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regulator-max-microvolt = <880000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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vddpx_10:
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src_pp1200_l2a: ldo2 {
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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/* TODO: why??? */
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regulator-always-on;
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};
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pp1000_l3a_sdr845: ldo3 {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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vdd_wcss_cx:
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vdd_wcss_mx:
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vdda_wcss_pll:
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src_pp800_l5a: ldo5 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <800000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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vddpx_13:
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src_pp1800_l6a: ldo6 {
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regulator-min-microvolt = <1856000>;
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regulator-max-microvolt = <1856000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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pp1800_l7a_wcn3990: ldo7 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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src_pp1200_l8a: ldo8 {
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1248000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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pp1800_dx_pen:
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src_pp1800_l9a: ldo9 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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src_pp1800_l10a: ldo10 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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pp1000_l11a_sdr845: ldo11 {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1048000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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vdd_qfprom:
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vdd_qfprom_sp:
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vdda_apc1_cs_1p8:
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vdda_gfx_cs_1p8:
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vdda_qrefs_1p8:
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vdda_qusb_hs0_1p8:
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vddpx_11:
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src_pp1800_l12a: ldo12 {
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regulator-min-microvolt = <1800000>;
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|
regulator-max-microvolt = <1800000>;
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
};
|
|
|
|
vddpx_2:
|
|
src_pp2950_l13a: ldo13 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <2960000>;
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
};
|
|
|
|
src_pp1800_l14a: ldo14 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
};
|
|
|
|
src_pp1800_l15a: ldo15 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
};
|
|
|
|
pp2700_l16a: ldo16 {
|
|
regulator-min-microvolt = <2704000>;
|
|
regulator-max-microvolt = <2704000>;
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
};
|
|
|
|
src_pp1300_l17a: ldo17 {
|
|
regulator-min-microvolt = <1304000>;
|
|
regulator-max-microvolt = <1304000>;
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
};
|
|
|
|
pp2700_l18a: ldo18 {
|
|
regulator-min-microvolt = <2704000>;
|
|
regulator-max-microvolt = <2960000>;
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
};
|
|
|
|
/*
|
|
* NOTE: this rail should have been called
|
|
* src_pp3300_l19a in the schematic
|
|
*/
|
|
src_pp3000_l19a: ldo19 {
|
|
regulator-min-microvolt = <3304000>;
|
|
regulator-max-microvolt = <3304000>;
|
|
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
};
|
|
|
|
src_pp2950_l20a: ldo20 {
|
|
regulator-min-microvolt = <2704000>;
|
|
regulator-max-microvolt = <2960000>;
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
};
|
|
|
|
src_pp2950_l21a: ldo21 {
|
|
regulator-min-microvolt = <2704000>;
|
|
regulator-max-microvolt = <2960000>;
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
};
|
|
|
|
pp3300_hub:
|
|
src_pp3300_l22a: ldo22 {
|
|
regulator-min-microvolt = <3304000>;
|
|
regulator-max-microvolt = <3304000>;
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
/*
|
|
* HACK: Should add a usb hub node and driver
|
|
* to turn this on and off at suspend/resume time
|
|
*/
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
pp3300_l23a_ch1_wcn3990: ldo23 {
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3312000>;
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
};
|
|
|
|
vdda_qusb_hs0_3p1:
|
|
src_pp3075_l24a: ldo24 {
|
|
regulator-min-microvolt = <3088000>;
|
|
regulator-max-microvolt = <3088000>;
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
};
|
|
|
|
pp3300_l25a_ch0_wcn3990: ldo25 {
|
|
regulator-min-microvolt = <3304000>;
|
|
regulator-max-microvolt = <3304000>;
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
};
|
|
|
|
pp1200_hub:
|
|
vdda_hp_pcie_1p2:
|
|
vdda_hv_ebi0:
|
|
vdda_hv_ebi1:
|
|
vdda_hv_ebi2:
|
|
vdda_hv_ebi3:
|
|
vdda_mipi_csi_1p25:
|
|
vdda_mipi_dsi0_1p2:
|
|
vdda_mipi_dsi1_1p2:
|
|
vdda_pcie_1p2:
|
|
vdda_ufs1_1p2:
|
|
vdda_ufs2_1p2:
|
|
vdda_usb1_ss_1p2:
|
|
vdda_usb2_ss_1p2:
|
|
src_pp1200_l26a: ldo26 {
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
};
|
|
|
|
pp3300_dx_pen:
|
|
src_pp3300_l28a: ldo28 {
|
|
regulator-min-microvolt = <3304000>;
|
|
regulator-max-microvolt = <3304000>;
|
|
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
|
};
|
|
|
|
src_pp1800_lvs1: lvs1 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
src_pp1800_lvs2: lvs2 {
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
pm8005-rpmh-regulators {
|
|
compatible = "qcom,pm8005-rpmh-regulators";
|
|
qcom,pmic-id = "c";
|
|
|
|
vdd-s1-supply = <&src_vph_pwr>;
|
|
vdd-s2-supply = <&src_vph_pwr>;
|
|
vdd-s3-supply = <&src_vph_pwr>;
|
|
vdd-s4-supply = <&src_vph_pwr>;
|
|
|
|
src_pp600_s3c: smps3 {
|
|
regulator-min-microvolt = <600000>;
|
|
regulator-max-microvolt = <600000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&dsi0 {
|
|
status = "okay";
|
|
vdda-supply = <&vdda_mipi_dsi0_1p2>;
|
|
|
|
ports {
|
|
port@1 {
|
|
endpoint {
|
|
remote-endpoint = <&sn65dsi86_in>;
|
|
data-lanes = <0 1 2 3>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&dsi0_phy {
|
|
status = "okay";
|
|
vdds-supply = <&vdda_mipi_dsi0_pll>;
|
|
};
|
|
|
|
edp_brij_i2c: &i2c3 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
sn65dsi86_bridge: bridge@2d {
|
|
compatible = "ti,sn65dsi86";
|
|
reg = <0x2d>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&edp_brij_en &edp_brij_irq>;
|
|
|
|
interrupt-parent = <&tlmm>;
|
|
interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
enable-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>;
|
|
|
|
vpll-supply = <&src_pp1800_s4a>;
|
|
vccio-supply = <&src_pp1800_s4a>;
|
|
vcca-supply = <&src_pp1200_l2a>;
|
|
vcc-supply = <&src_pp1200_l2a>;
|
|
|
|
clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
|
|
clock-names = "refclk";
|
|
|
|
no-hpd;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
sn65dsi86_in: endpoint {
|
|
remote-endpoint = <&dsi0_out>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
sn65dsi86_out: endpoint {
|
|
remote-endpoint = <&panel_in_edp>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ap_pen_1v8: &i2c11 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
digitizer@9 {
|
|
compatible = "wacom,w9013", "hid-over-i2c";
|
|
reg = <0x9>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pen_irq_l>, <&pen_pdct_l>, <&pen_rst_l>;
|
|
|
|
vdd-supply = <&pp3300_dx_pen>;
|
|
vddl-supply = <&pp1800_dx_pen>;
|
|
post-power-on-delay-ms = <100>;
|
|
|
|
interrupt-parent = <&tlmm>;
|
|
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
|
|
|
|
hid-descr-addr = <0x1>;
|
|
};
|
|
};
|
|
|
|
amp_i2c: &i2c12 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
};
|
|
|
|
ap_ts_i2c: &i2c14 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
touchscreen@10 {
|
|
compatible = "elan,ekth3500";
|
|
reg = <0x10>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&ts_int_l &ts_reset_l>;
|
|
|
|
interrupt-parent = <&tlmm>;
|
|
interrupts = <125 IRQ_TYPE_LEVEL_LOW>;
|
|
|
|
vcc33-supply = <&src_pp3300_l28a>;
|
|
|
|
reset-gpios = <&tlmm 118 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
&gmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpu {
|
|
status = "okay";
|
|
};
|
|
|
|
&ipa {
|
|
status = "okay";
|
|
modem-init;
|
|
};
|
|
|
|
&lpasscc {
|
|
status = "okay";
|
|
};
|
|
|
|
&mdss {
|
|
status = "okay";
|
|
};
|
|
|
|
/*
|
|
* Cheza fw does not properly program the GPU aperture to allow the
|
|
* GPU to update the SMMU pagetables for context switches. Work
|
|
* around this by dropping the "qcom,adreno-smmu" compat string.
|
|
*/
|
|
&adreno_smmu {
|
|
compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
|
|
};
|
|
|
|
&mss_pil {
|
|
status = "okay";
|
|
|
|
iommus = <&apps_smmu 0x781 0x0>,
|
|
<&apps_smmu 0x724 0x3>;
|
|
};
|
|
|
|
&pm8998_pwrkey {
|
|
status = "disabled";
|
|
};
|
|
|
|
&qupv3_id_0 {
|
|
status = "okay";
|
|
iommus = <&apps_smmu 0x0 0x3>;
|
|
};
|
|
|
|
&qupv3_id_1 {
|
|
status = "okay";
|
|
iommus = <&apps_smmu 0x6c0 0x3>;
|
|
};
|
|
|
|
&sdhc_2 {
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_cd_odl>;
|
|
|
|
vmmc-supply = <&src_pp2950_l21a>;
|
|
vqmmc-supply = <&vddpx_2>;
|
|
|
|
cd-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&spi5 {
|
|
status = "okay";
|
|
|
|
tpm@0 {
|
|
compatible = "google,cr50";
|
|
reg = <0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&h1_ap_int_odl>;
|
|
spi-max-frequency = <800000>;
|
|
interrupt-parent = <&tlmm>;
|
|
interrupts = <129 IRQ_TYPE_EDGE_RISING>;
|
|
};
|
|
};
|
|
|
|
&spi10 {
|
|
status = "okay";
|
|
|
|
cros_ec: ec@0 {
|
|
compatible = "google,cros-ec-spi";
|
|
reg = <0>;
|
|
interrupt-parent = <&tlmm>;
|
|
interrupts = <122 IRQ_TYPE_LEVEL_LOW>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&ec_ap_int_l>;
|
|
spi-max-frequency = <3000000>;
|
|
|
|
cros_ec_pwm: pwm {
|
|
compatible = "google,cros-ec-pwm";
|
|
#pwm-cells = <1>;
|
|
};
|
|
|
|
i2c_tunnel: i2c-tunnel {
|
|
compatible = "google,cros-ec-i2c-tunnel";
|
|
google,remote-bus = <0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
#include <arm/cros-ec-keyboard.dtsi>
|
|
#include <arm/cros-ec-sbs.dtsi>
|
|
|
|
&uart6 {
|
|
status = "okay";
|
|
|
|
bluetooth: wcn3990-bt {
|
|
compatible = "qcom,wcn3990-bt";
|
|
vddio-supply = <&src_pp1800_s4a>;
|
|
vddxo-supply = <&pp1800_l7a_wcn3990>;
|
|
vddrf-supply = <&src_pp1300_l17a>;
|
|
vddch0-supply = <&pp3300_l25a_ch0_wcn3990>;
|
|
max-speed = <3200000>;
|
|
};
|
|
};
|
|
|
|
&uart9 {
|
|
status = "okay";
|
|
};
|
|
|
|
&ufs_mem_hc {
|
|
status = "okay";
|
|
|
|
reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
|
|
|
|
vcc-supply = <&src_pp2950_l20a>;
|
|
vcc-max-microamp = <600000>;
|
|
};
|
|
|
|
&ufs_mem_phy {
|
|
status = "okay";
|
|
|
|
vdda-phy-supply = <&vdda_ufs1_core>;
|
|
vdda-pll-supply = <&vdda_ufs1_1p2>;
|
|
};
|
|
|
|
&usb_1 {
|
|
status = "okay";
|
|
|
|
/* We'll use this as USB 2.0 only */
|
|
qcom,select-utmi-as-pipe-clk;
|
|
};
|
|
|
|
&usb_1_dwc3 {
|
|
/*
|
|
* The hardware design intends this port to be hooked up in peripheral
|
|
* mode, so we'll hardcode it here. Some details:
|
|
* - SDM845 expects only a single Type C connector so it has only one
|
|
* native Type C port but cheza has two Type C connectors.
|
|
* - The only source of DP is the single native Type C port.
|
|
* - On cheza we want to be able to hook DP up to _either_ of the
|
|
* two Type C connectors and want to be able to achieve 4 lanes of DP.
|
|
* - When you configure a Type C port for 4 lanes of DP you lose USB3.
|
|
* - In order to make everything work, the native Type C port is always
|
|
* configured as 4-lanes DP so it's always available.
|
|
* - The extra USB3 port on SDM845 goes to a USB 3 hub which is then
|
|
* sent to the two Type C connectors.
|
|
* - The extra USB2 lines from the native Type C port are always
|
|
* setup as "peripheral" so that we can mux them over to one connector
|
|
* or the other if someone needs the connector configured as a gadget
|
|
* (but they only get USB2 speeds).
|
|
*
|
|
* All the hardware muxes would allow us to hook things up in different
|
|
* ways to some potential benefit for static configurations (you could
|
|
* achieve extra USB2 bandwidth by using two different ports for the
|
|
* two connectors or possibly even get USB3 peripheral mode), but in
|
|
* each case you end up forcing to disconnect/reconnect an in-use
|
|
* USB session in some cases depending on what you hotplug into the
|
|
* other connector. Thus hardcoding this as peripheral makes sense.
|
|
*/
|
|
dr_mode = "peripheral";
|
|
|
|
/*
|
|
* We always need the high speed pins as 4-lanes DP in case someone
|
|
* hotplugs a DP peripheral. Thus limit this port to a max of high
|
|
* speed.
|
|
*/
|
|
maximum-speed = "high-speed";
|
|
|
|
/*
|
|
* We don't need the usb3-phy since we run in highspeed mode always, so
|
|
* re-define these properties removing the superspeed USB PHY reference.
|
|
*/
|
|
phys = <&usb_1_hsphy>;
|
|
phy-names = "usb2-phy";
|
|
};
|
|
|
|
&usb_1_hsphy {
|
|
status = "okay";
|
|
|
|
vdd-supply = <&vdda_usb1_ss_core>;
|
|
vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
|
|
vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
|
|
|
|
qcom,imp-res-offset-value = <8>;
|
|
qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
|
|
qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
|
|
qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
|
|
};
|
|
|
|
&usb_2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_2_dwc3 {
|
|
/* We have this hooked up to a hub and we always use in host mode */
|
|
dr_mode = "host";
|
|
};
|
|
|
|
&usb_2_hsphy {
|
|
status = "okay";
|
|
|
|
vdd-supply = <&vdda_usb2_ss_core>;
|
|
vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
|
|
vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
|
|
|
|
qcom,imp-res-offset-value = <8>;
|
|
qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
|
|
};
|
|
|
|
&usb_2_qmpphy {
|
|
status = "okay";
|
|
|
|
vdda-phy-supply = <&vdda_usb2_ss_1p2>;
|
|
vdda-pll-supply = <&vdda_usb2_ss_core>;
|
|
};
|
|
|
|
&wifi {
|
|
status = "okay";
|
|
|
|
vdd-0.8-cx-mx-supply = <&src_pp800_l5a >;
|
|
vdd-1.8-xo-supply = <&pp1800_l7a_wcn3990>;
|
|
vdd-1.3-rfa-supply = <&src_pp1300_l17a>;
|
|
vdd-3.3-ch0-supply = <&pp3300_l25a_ch0_wcn3990>;
|
|
};
|
|
|
|
/* PINCTRL - additions to nodes defined in sdm845.dtsi */
|
|
|
|
&qspi_cs0 {
|
|
pinconf {
|
|
pins = "gpio90";
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
&qspi_clk {
|
|
pinconf {
|
|
pins = "gpio95";
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
&qspi_data01 {
|
|
pinconf {
|
|
pins = "gpio91", "gpio92";
|
|
|
|
/* High-Z when no transfers; nice to park the lines */
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
&qup_i2c3_default {
|
|
pinconf {
|
|
pins = "gpio41", "gpio42";
|
|
drive-strength = <2>;
|
|
|
|
/* Has external pullup */
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
&qup_i2c11_default {
|
|
pinconf {
|
|
pins = "gpio31", "gpio32";
|
|
drive-strength = <2>;
|
|
|
|
/* Has external pullup */
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
&qup_i2c12_default {
|
|
pinconf {
|
|
pins = "gpio49", "gpio50";
|
|
drive-strength = <2>;
|
|
|
|
/* Has external pullup */
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
&qup_i2c14_default {
|
|
pinconf {
|
|
pins = "gpio33", "gpio34";
|
|
drive-strength = <2>;
|
|
|
|
/* Has external pullup */
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
&qup_spi0_default {
|
|
pinconf {
|
|
pins = "gpio0", "gpio1", "gpio2", "gpio3";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
&qup_spi5_default {
|
|
pinconf {
|
|
pins = "gpio85", "gpio86", "gpio87", "gpio88";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
&qup_spi10_default {
|
|
pinconf {
|
|
pins = "gpio53", "gpio54", "gpio55", "gpio56";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
&qup_uart6_default {
|
|
/* Change pinmux to all 4 pins since CTS and RTS are connected */
|
|
pinmux {
|
|
pins = "gpio45", "gpio46",
|
|
"gpio47", "gpio48";
|
|
};
|
|
|
|
pinconf-cts {
|
|
/*
|
|
* Configure a pull-down on 45 (CTS) to match the pull of
|
|
* the Bluetooth module.
|
|
*/
|
|
pins = "gpio45";
|
|
bias-pull-down;
|
|
};
|
|
|
|
pinconf-rts-tx {
|
|
/* We'll drive 46 (RTS) and 47 (TX), so no pull */
|
|
pins = "gpio46", "gpio47";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
|
|
pinconf-rx {
|
|
/*
|
|
* Configure a pull-up on 48 (RX). This is needed to avoid
|
|
* garbage data when the TX pin of the Bluetooth module is
|
|
* in tri-state (module powered off or not driving the
|
|
* signal yet).
|
|
*/
|
|
pins = "gpio48";
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
&qup_uart9_default {
|
|
pinconf-tx {
|
|
pins = "gpio4";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
|
|
pinconf-rx {
|
|
pins = "gpio5";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
/* PINCTRL - board-specific pinctrl */
|
|
&pm8005_gpio {
|
|
gpio-line-names = "",
|
|
"",
|
|
"SLB",
|
|
"";
|
|
};
|
|
|
|
&pm8998_adc {
|
|
adc-chan@4d {
|
|
reg = <ADC5_AMUX_THM1_100K_PU>;
|
|
label = "sdm_temp";
|
|
};
|
|
|
|
adc-chan@4e {
|
|
reg = <ADC5_AMUX_THM2_100K_PU>;
|
|
label = "quiet_temp";
|
|
};
|
|
|
|
adc-chan@4f {
|
|
reg = <ADC5_AMUX_THM3_100K_PU>;
|
|
label = "lte_temp_1";
|
|
};
|
|
|
|
adc-chan@50 {
|
|
reg = <ADC5_AMUX_THM4_100K_PU>;
|
|
label = "lte_temp_2";
|
|
};
|
|
|
|
adc-chan@51 {
|
|
reg = <ADC5_AMUX_THM5_100K_PU>;
|
|
label = "charger_temp";
|
|
};
|
|
};
|
|
|
|
&pm8998_gpio {
|
|
gpio-line-names = "",
|
|
"",
|
|
"SW_CTRL",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"",
|
|
"CFG_OPT1",
|
|
"WCSS_PWR_REQ",
|
|
"",
|
|
"CFG_OPT2",
|
|
"SLB";
|
|
};
|
|
|
|
&tlmm {
|
|
/*
|
|
* pinctrl settings for pins that have no real owners.
|
|
*/
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&bios_flash_wp_r_l>,
|
|
<&ap_suspend_l_deassert>;
|
|
|
|
pinctrl-1 = <&bios_flash_wp_r_l>,
|
|
<&ap_suspend_l_assert>;
|
|
|
|
/*
|
|
* Hogs prevent usermode from changing the value. A GPIO can be both
|
|
* here and in the pinctrl section.
|
|
*/
|
|
ap-suspend-l-hog {
|
|
gpio-hog;
|
|
gpios = <126 GPIO_ACTIVE_LOW>;
|
|
output-low;
|
|
};
|
|
|
|
ap_edp_bklten: ap-edp-bklten {
|
|
pinmux {
|
|
pins = "gpio37";
|
|
function = "gpio";
|
|
};
|
|
|
|
pinconf {
|
|
pins = "gpio37";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
bios_flash_wp_r_l: bios-flash-wp-r-l {
|
|
pinmux {
|
|
pins = "gpio128";
|
|
function = "gpio";
|
|
input-enable;
|
|
};
|
|
|
|
pinconf {
|
|
pins = "gpio128";
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
ec_ap_int_l: ec-ap-int-l {
|
|
pinmux {
|
|
pins = "gpio122";
|
|
function = "gpio";
|
|
input-enable;
|
|
};
|
|
|
|
pinconf {
|
|
pins = "gpio122";
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
edp_brij_en: edp-brij-en {
|
|
pinmux {
|
|
pins = "gpio102";
|
|
function = "gpio";
|
|
};
|
|
|
|
pinconf {
|
|
pins = "gpio102";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
edp_brij_irq: edp-brij-irq {
|
|
pinmux {
|
|
pins = "gpio10";
|
|
function = "gpio";
|
|
};
|
|
|
|
pinconf {
|
|
pins = "gpio10";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
en_pp3300_dx_edp: en-pp3300-dx-edp {
|
|
pinmux {
|
|
pins = "gpio43";
|
|
function = "gpio";
|
|
};
|
|
|
|
pinconf {
|
|
pins = "gpio43";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
h1_ap_int_odl: h1-ap-int-odl {
|
|
pinmux {
|
|
pins = "gpio129";
|
|
function = "gpio";
|
|
input-enable;
|
|
};
|
|
|
|
pinconf {
|
|
pins = "gpio129";
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
pen_eject_odl: pen-eject-odl {
|
|
pinmux {
|
|
pins = "gpio119";
|
|
function = "gpio";
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
pen_irq_l: pen-irq-l {
|
|
pinmux {
|
|
pins = "gpio24";
|
|
function = "gpio";
|
|
};
|
|
|
|
pinconf {
|
|
pins = "gpio24";
|
|
|
|
/* Has external pullup */
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
pen_pdct_l: pen-pdct-l {
|
|
pinmux {
|
|
pins = "gpio63";
|
|
function = "gpio";
|
|
};
|
|
|
|
pinconf {
|
|
pins = "gpio63";
|
|
|
|
/* Has external pullup */
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
pen_rst_l: pen-rst-l {
|
|
pinmux {
|
|
pins = "gpio23";
|
|
function = "gpio";
|
|
};
|
|
|
|
pinconf {
|
|
pins = "gpio23";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
|
|
/*
|
|
* The pen driver doesn't currently support
|
|
* driving this reset line. By specifying
|
|
* output-high here we're relying on the fact
|
|
* that this pin has a default pulldown at boot
|
|
* (which makes sure the pen was in reset if it
|
|
* was powered) and then we set it high here to
|
|
* take it out of reset. Better would be if the
|
|
* pen driver could control this and we could
|
|
* remove "output-high" here.
|
|
*/
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
sdc2_clk: sdc2-clk {
|
|
pinconf {
|
|
pins = "sdc2_clk";
|
|
bias-disable;
|
|
|
|
/*
|
|
* It seems that mmc_test reports errors if drive
|
|
* strength is not 16.
|
|
*/
|
|
drive-strength = <16>;
|
|
};
|
|
};
|
|
|
|
sdc2_cmd: sdc2-cmd {
|
|
pinconf {
|
|
pins = "sdc2_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <16>;
|
|
};
|
|
};
|
|
|
|
sdc2_data: sdc2-data {
|
|
pinconf {
|
|
pins = "sdc2_data";
|
|
bias-pull-up;
|
|
drive-strength = <16>;
|
|
};
|
|
};
|
|
|
|
sd_cd_odl: sd-cd-odl {
|
|
pinmux {
|
|
pins = "gpio44";
|
|
function = "gpio";
|
|
};
|
|
|
|
pinconf {
|
|
pins = "gpio44";
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
ts_int_l: ts-int-l {
|
|
pinmux {
|
|
pins = "gpio125";
|
|
function = "gpio";
|
|
};
|
|
|
|
pinconf {
|
|
pins = "gpio125";
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
ts_reset_l: ts-reset-l {
|
|
pinmux {
|
|
pins = "gpio118";
|
|
function = "gpio";
|
|
};
|
|
|
|
pinconf {
|
|
pins = "gpio118";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
|
|
ap_suspend_l_assert: ap_suspend_l_assert {
|
|
config {
|
|
pins = "gpio126";
|
|
function = "gpio";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
ap_suspend_l_deassert: ap_suspend_l_deassert {
|
|
config {
|
|
pins = "gpio126";
|
|
function = "gpio";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
&venus {
|
|
status = "okay";
|
|
|
|
video-firmware {
|
|
iommus = <&apps_smmu 0x10b2 0x0>;
|
|
};
|
|
};
|