730 lines
21 KiB
Plaintext
730 lines
21 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
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*
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* Copyright (C) 2011 Atmel,
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* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
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* 2012 Joachim Eastwood <manabian@gmail.com>
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*
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* Based on at91sam9260.dtsi
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*/
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#include <dt-bindings/pinctrl/at91.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/at91.h>
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#include <dt-bindings/mfd/at91-usart.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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model = "Atmel AT91RM9200 family SoC";
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compatible = "atmel,at91rm9200";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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serial4 = &usart3;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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gpio3 = &pioD;
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tcb0 = &tcb0;
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tcb1 = &tcb1;
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i2c0 = &i2c0;
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ssc0 = &ssc0;
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ssc1 = &ssc1;
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ssc2 = &ssc2;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,arm920t";
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device_type = "cpu";
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reg = <0>;
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};
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};
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memory@20000000 {
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device_type = "memory";
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reg = <0x20000000 0x04000000>;
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};
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clocks {
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slow_xtal: slow_xtal {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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main_xtal: main_xtal {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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};
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sram: sram@200000 {
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compatible = "mmio-sram";
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reg = <0x00200000 0x4000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x00200000 0x4000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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aic: interrupt-controller@fffff000 {
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#interrupt-cells = <3>;
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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atmel,external-irqs = <25 26 27 28 29 30 31>;
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};
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ramc0: ramc@ffffff00 {
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compatible = "atmel,at91rm9200-sdramc", "syscon";
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reg = <0xffffff00 0x100>;
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};
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pmc: pmc@fffffc00 {
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compatible = "atmel,at91rm9200-pmc", "syscon";
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reg = <0xfffffc00 0x100>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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#clock-cells = <2>;
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clocks = <&slow_xtal>, <&main_xtal>;
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clock-names = "slow_xtal", "main_xtal";
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};
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st: timer@fffffd00 {
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compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd";
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reg = <0xfffffd00 0x100>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&slow_xtal>;
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watchdog {
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compatible = "atmel,at91rm9200-wdt";
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};
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};
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rtc: rtc@fffffe00 {
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compatible = "atmel,at91rm9200-rtc";
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reg = <0xfffffe00 0x40>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&slow_xtal>;
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status = "disabled";
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};
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tcb0: timer@fffa0000 {
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compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xfffa0000 0x100>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
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18 IRQ_TYPE_LEVEL_HIGH 0
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19 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
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clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
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};
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tcb1: timer@fffa4000 {
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compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xfffa4000 0x100>;
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interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
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21 IRQ_TYPE_LEVEL_HIGH 0
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22 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&slow_xtal>;
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clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
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};
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i2c0: i2c@fffb8000 {
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compatible = "atmel,at91rm9200-i2c";
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reg = <0xfffb8000 0x4000>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_twi>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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mmc0: mmc@fffb4000 {
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compatible = "atmel,hsmci";
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reg = <0xfffb4000 0x4000>;
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interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
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clock-names = "mci_clk";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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ssc0: ssc@fffd0000 {
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compatible = "atmel,at91rm9200-ssc";
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reg = <0xfffd0000 0x4000>;
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interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
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clock-names = "pclk";
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status = "disabled";
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};
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ssc1: ssc@fffd4000 {
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compatible = "atmel,at91rm9200-ssc";
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reg = <0xfffd4000 0x4000>;
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interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
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clock-names = "pclk";
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status = "disabled";
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};
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ssc2: ssc@fffd8000 {
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compatible = "atmel,at91rm9200-ssc";
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reg = <0xfffd8000 0x4000>;
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interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
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clock-names = "pclk";
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status = "disabled";
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};
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macb0: ethernet@fffbc000 {
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compatible = "cdns,at91rm9200-emac", "cdns,emac";
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reg = <0xfffbc000 0x4000>;
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interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
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phy-mode = "rmii";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_macb_rmii>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
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clock-names = "ether_clk";
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status = "disabled";
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};
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pinctrl@fffff400 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
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ranges = <0xfffff400 0xfffff400 0x800>;
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atmel,mux-mask = <
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/* A B */
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0xffffffff 0xffffffff /* pioA */
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0xffffffff 0x083fffff /* pioB */
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0xffff3fff 0x00000000 /* pioC */
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0x03ff87ff 0x0fffff80 /* pioD */
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>;
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/* shared pinctrl settings */
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dbgu {
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pinctrl_dbgu: dbgu-0 {
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atmel,pins =
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<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
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AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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};
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uart0 {
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pinctrl_uart0: uart0-0 {
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atmel,pins =
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<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_uart0_cts: uart0_cts-0 {
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atmel,pins =
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<AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
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};
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pinctrl_uart0_rts: uart0_rts-0 {
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atmel,pins =
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<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
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};
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};
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_uart1_rts: uart1_rts-0 {
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atmel,pins =
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<AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */
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};
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pinctrl_uart1_cts: uart1_cts-0 {
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atmel,pins =
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<AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
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};
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pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
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atmel,pins =
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<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
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AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
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};
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pinctrl_uart1_dcd: uart1_dcd-0 {
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atmel,pins =
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<AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
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};
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pinctrl_uart1_ri: uart1_ri-0 {
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atmel,pins =
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<AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
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};
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};
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uart2 {
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pinctrl_uart2: uart2-0 {
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atmel,pins =
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<AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
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AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_uart2_rts: uart2_rts-0 {
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atmel,pins =
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<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
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};
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pinctrl_uart2_cts: uart2_cts-0 {
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atmel,pins =
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<AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */
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};
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};
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uart3 {
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pinctrl_uart3: uart3-0 {
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atmel,pins =
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<AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE
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AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_uart3_rts: uart3_rts-0 {
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atmel,pins =
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<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
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};
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pinctrl_uart3_cts: uart3_cts-0 {
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atmel,pins =
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<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
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};
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};
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nand {
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pinctrl_nand: nand-0 {
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atmel,pins =
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<AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */
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AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */
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};
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};
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macb {
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pinctrl_macb_rmii: macb_rmii-0 {
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atmel,pins =
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<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */
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AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */
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AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
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AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
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AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
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AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
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AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
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AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
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AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
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AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */
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};
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pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
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atmel,pins =
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<AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */
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AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */
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AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */
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AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */
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AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */
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AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */
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AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */
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AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */
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};
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};
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mmc0 {
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pinctrl_mmc0_clk: mmc0_clk-0 {
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atmel,pins =
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<AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
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};
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pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
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atmel,pins =
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<AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
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AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */
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};
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pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
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atmel,pins =
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<AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */
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AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */
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AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */
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};
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pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
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atmel,pins =
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<AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */
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AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */
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};
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pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
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atmel,pins =
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<AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */
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AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
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AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */
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};
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};
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ssc0 {
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pinctrl_ssc0_tx: ssc0_tx-0 {
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atmel,pins =
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<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
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AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
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AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */
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};
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pinctrl_ssc0_rx: ssc0_rx-0 {
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atmel,pins =
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<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
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AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
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AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
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};
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};
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ssc1 {
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pinctrl_ssc1_tx: ssc1_tx-0 {
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atmel,pins =
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<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
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AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
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AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
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};
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pinctrl_ssc1_rx: ssc1_rx-0 {
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atmel,pins =
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<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
|
|
AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
|
|
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
|
|
};
|
|
};
|
|
|
|
ssc2 {
|
|
pinctrl_ssc2_tx: ssc2_tx-0 {
|
|
atmel,pins =
|
|
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
|
|
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
|
|
AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */
|
|
};
|
|
|
|
pinctrl_ssc2_rx: ssc2_rx-0 {
|
|
atmel,pins =
|
|
<AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
|
|
AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
|
|
AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
|
|
};
|
|
};
|
|
|
|
twi {
|
|
pinctrl_twi: twi-0 {
|
|
atmel,pins =
|
|
<AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */
|
|
AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */
|
|
};
|
|
|
|
pinctrl_twi_gpio: twi_gpio-0 {
|
|
atmel,pins =
|
|
<AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */
|
|
AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */
|
|
};
|
|
};
|
|
|
|
tcb0 {
|
|
pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
|
|
atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
|
|
atmel,pins = <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
|
|
atmel,pins = <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
|
|
atmel,pins = <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
|
|
atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
|
|
atmel,pins = <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
|
|
atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
|
|
atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
|
|
atmel,pins = <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
};
|
|
|
|
tcb1 {
|
|
pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
|
|
atmel,pins = <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
|
|
atmel,pins = <AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
|
|
atmel,pins = <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
|
|
atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
|
|
atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
|
|
atmel,pins = <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
|
|
atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
|
|
atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
|
|
pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
|
|
atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
};
|
|
};
|
|
|
|
spi0 {
|
|
pinctrl_spi0: spi0-0 {
|
|
atmel,pins =
|
|
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
|
|
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
|
|
AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
|
|
};
|
|
};
|
|
|
|
pioA: gpio@fffff400 {
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
reg = <0xfffff400 0x200>;
|
|
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
|
|
};
|
|
|
|
pioB: gpio@fffff600 {
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
reg = <0xfffff600 0x200>;
|
|
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
|
|
};
|
|
|
|
pioC: gpio@fffff800 {
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
reg = <0xfffff800 0x200>;
|
|
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
|
|
};
|
|
|
|
pioD: gpio@fffffa00 {
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
reg = <0xfffffa00 0x200>;
|
|
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
|
|
};
|
|
};
|
|
|
|
dbgu: serial@fffff200 {
|
|
compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
|
|
reg = <0xfffff200 0x200>;
|
|
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
|
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_dbgu>;
|
|
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
|
|
clock-names = "usart";
|
|
status = "disabled";
|
|
};
|
|
|
|
usart0: serial@fffc0000 {
|
|
compatible = "atmel,at91rm9200-usart";
|
|
reg = <0xfffc0000 0x200>;
|
|
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
|
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart0>;
|
|
clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
|
|
clock-names = "usart";
|
|
status = "disabled";
|
|
};
|
|
|
|
usart1: serial@fffc4000 {
|
|
compatible = "atmel,at91rm9200-usart";
|
|
reg = <0xfffc4000 0x200>;
|
|
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
|
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
|
|
clock-names = "usart";
|
|
status = "disabled";
|
|
};
|
|
|
|
usart2: serial@fffc8000 {
|
|
compatible = "atmel,at91rm9200-usart";
|
|
reg = <0xfffc8000 0x200>;
|
|
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
|
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart2>;
|
|
clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
|
|
clock-names = "usart";
|
|
status = "disabled";
|
|
};
|
|
|
|
usart3: serial@fffcc000 {
|
|
compatible = "atmel,at91rm9200-usart";
|
|
reg = <0xfffcc000 0x200>;
|
|
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
|
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart3>;
|
|
clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
|
|
clock-names = "usart";
|
|
status = "disabled";
|
|
};
|
|
|
|
usb1: gadget@fffb0000 {
|
|
compatible = "atmel,at91rm9200-udc";
|
|
reg = <0xfffb0000 0x4000>;
|
|
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
|
|
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>, <&pmc PMC_TYPE_SYSTEM 1>;
|
|
clock-names = "pclk", "hclk";
|
|
status = "disabled";
|
|
};
|
|
|
|
spi0: spi@fffe0000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "atmel,at91rm9200-spi";
|
|
reg = <0xfffe0000 0x200>;
|
|
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_spi0>;
|
|
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
|
|
clock-names = "spi_clk";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
nand0: nand@40000000 {
|
|
compatible = "atmel,at91rm9200-nand";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x40000000 0x10000000>;
|
|
atmel,nand-addr-offset = <21>;
|
|
atmel,nand-cmd-offset = <22>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_nand>;
|
|
nand-ecc-mode = "soft";
|
|
gpios = <&pioC 2 GPIO_ACTIVE_HIGH
|
|
0
|
|
&pioB 1 GPIO_ACTIVE_HIGH
|
|
>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usb0: ohci@300000 {
|
|
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
|
reg = <0x00300000 0x100000>;
|
|
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
|
|
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_SYSTEM 4>;
|
|
clock-names = "ohci_clk", "hclk", "uhpck";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
i2c-gpio-0 {
|
|
compatible = "i2c-gpio";
|
|
gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
|
|
&pioA 26 GPIO_ACTIVE_HIGH /* scl */
|
|
>;
|
|
i2c-gpio,sda-open-drain;
|
|
i2c-gpio,scl-open-drain;
|
|
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_twi_gpio>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
};
|