156 lines
4.4 KiB
C
156 lines
4.4 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2020, Konrad Dybcio
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*/
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#ifndef _DT_BINDINGS_CLK_MSM_MMCC_8994_H
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#define _DT_BINDINGS_CLK_MSM_MMCC_8994_H
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/* Clocks */
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#define MMPLL0_EARLY 0
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#define MMPLL0_PLL 1
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#define MMPLL1_EARLY 2
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#define MMPLL1_PLL 3
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#define MMPLL3_EARLY 4
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#define MMPLL3_PLL 5
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#define MMPLL4_EARLY 6
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#define MMPLL4_PLL 7
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#define MMPLL5_EARLY 8
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#define MMPLL5_PLL 9
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#define AXI_CLK_SRC 10
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#define RBBMTIMER_CLK_SRC 11
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#define PCLK0_CLK_SRC 12
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#define PCLK1_CLK_SRC 13
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#define MDP_CLK_SRC 14
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#define VSYNC_CLK_SRC 15
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#define BYTE0_CLK_SRC 16
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#define BYTE1_CLK_SRC 17
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#define ESC0_CLK_SRC 18
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#define ESC1_CLK_SRC 19
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#define MDSS_AHB_CLK 20
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#define MDSS_PCLK0_CLK 21
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#define MDSS_PCLK1_CLK 22
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#define MDSS_VSYNC_CLK 23
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#define MDSS_BYTE0_CLK 24
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#define MDSS_BYTE1_CLK 25
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#define MDSS_ESC0_CLK 26
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#define MDSS_ESC1_CLK 27
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#define CSI0_CLK_SRC 28
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#define CSI1_CLK_SRC 29
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#define CSI2_CLK_SRC 30
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#define CSI3_CLK_SRC 31
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#define VFE0_CLK_SRC 32
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#define VFE1_CLK_SRC 33
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#define CPP_CLK_SRC 34
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#define JPEG0_CLK_SRC 35
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#define JPEG1_CLK_SRC 36
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#define JPEG2_CLK_SRC 37
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#define CSI2PHYTIMER_CLK_SRC 38
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#define FD_CORE_CLK_SRC 39
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#define OCMEMNOC_CLK_SRC 40
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#define CCI_CLK_SRC 41
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#define MMSS_GP0_CLK_SRC 42
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#define MMSS_GP1_CLK_SRC 43
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#define JPEG_DMA_CLK_SRC 44
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#define MCLK0_CLK_SRC 45
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#define MCLK1_CLK_SRC 46
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#define MCLK2_CLK_SRC 47
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#define MCLK3_CLK_SRC 48
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#define CSI0PHYTIMER_CLK_SRC 49
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#define CSI1PHYTIMER_CLK_SRC 50
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#define EXTPCLK_CLK_SRC 51
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#define HDMI_CLK_SRC 52
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#define CAMSS_AHB_CLK 53
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#define CAMSS_CCI_CCI_AHB_CLK 54
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#define CAMSS_CCI_CCI_CLK 55
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#define CAMSS_VFE_CPP_AHB_CLK 56
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#define CAMSS_VFE_CPP_AXI_CLK 57
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#define CAMSS_VFE_CPP_CLK 58
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#define CAMSS_CSI0_AHB_CLK 59
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#define CAMSS_CSI0_CLK 60
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#define CAMSS_CSI0PHY_CLK 61
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#define CAMSS_CSI0PIX_CLK 62
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#define CAMSS_CSI0RDI_CLK 63
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#define CAMSS_CSI1_AHB_CLK 64
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#define CAMSS_CSI1_CLK 65
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#define CAMSS_CSI1PHY_CLK 66
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#define CAMSS_CSI1PIX_CLK 67
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#define CAMSS_CSI1RDI_CLK 68
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#define CAMSS_CSI2_AHB_CLK 69
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#define CAMSS_CSI2_CLK 70
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#define CAMSS_CSI2PHY_CLK 71
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#define CAMSS_CSI2PIX_CLK 72
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#define CAMSS_CSI2RDI_CLK 73
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#define CAMSS_CSI3_AHB_CLK 74
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#define CAMSS_CSI3_CLK 75
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#define CAMSS_CSI3PHY_CLK 76
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#define CAMSS_CSI3PIX_CLK 77
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#define CAMSS_CSI3RDI_CLK 78
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#define CAMSS_CSI_VFE0_CLK 79
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#define CAMSS_CSI_VFE1_CLK 80
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#define CAMSS_GP0_CLK 81
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#define CAMSS_GP1_CLK 82
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#define CAMSS_ISPIF_AHB_CLK 83
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#define CAMSS_JPEG_DMA_CLK 84
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#define CAMSS_JPEG_JPEG0_CLK 85
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#define CAMSS_JPEG_JPEG1_CLK 86
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#define CAMSS_JPEG_JPEG2_CLK 87
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#define CAMSS_JPEG_JPEG_AHB_CLK 88
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#define CAMSS_JPEG_JPEG_AXI_CLK 89
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#define CAMSS_MCLK0_CLK 90
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#define CAMSS_MCLK1_CLK 91
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#define CAMSS_MCLK2_CLK 92
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#define CAMSS_MCLK3_CLK 93
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#define CAMSS_MICRO_AHB_CLK 94
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#define CAMSS_PHY0_CSI0PHYTIMER_CLK 95
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#define CAMSS_PHY1_CSI1PHYTIMER_CLK 96
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#define CAMSS_PHY2_CSI2PHYTIMER_CLK 97
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#define CAMSS_TOP_AHB_CLK 98
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#define CAMSS_VFE_VFE0_CLK 99
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#define CAMSS_VFE_VFE1_CLK 100
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#define CAMSS_VFE_VFE_AHB_CLK 101
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#define CAMSS_VFE_VFE_AXI_CLK 102
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#define FD_AXI_CLK 103
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#define FD_CORE_CLK 104
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#define FD_CORE_UAR_CLK 105
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#define MDSS_AXI_CLK 106
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#define MDSS_EXTPCLK_CLK 107
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#define MDSS_HDMI_AHB_CLK 108
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#define MDSS_HDMI_CLK 109
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#define MDSS_MDP_CLK 110
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#define MMSS_MISC_AHB_CLK 111
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#define MMSS_MMSSNOC_AXI_CLK 112
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#define MMSS_S0_AXI_CLK 113
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#define OCMEMCX_OCMEMNOC_CLK 114
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#define OXILI_GFX3D_CLK 115
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#define OXILI_RBBMTIMER_CLK 116
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#define OXILICX_AHB_CLK 117
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#define VENUS0_AHB_CLK 118
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#define VENUS0_AXI_CLK 119
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#define VENUS0_OCMEMNOC_CLK 120
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#define VENUS0_VCODEC0_CLK 121
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#define VENUS0_CORE0_VCODEC_CLK 122
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#define VENUS0_CORE1_VCODEC_CLK 123
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#define VENUS0_CORE2_VCODEC_CLK 124
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#define AHB_CLK_SRC 125
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#define FD_AHB_CLK 126
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/* GDSCs */
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#define VENUS_GDSC 0
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#define VENUS_CORE0_GDSC 1
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#define VENUS_CORE1_GDSC 2
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#define VENUS_CORE2_GDSC 3
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#define CAMSS_TOP_GDSC 4
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#define MDSS_GDSC 5
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#define JPEG_GDSC 6
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#define VFE_GDSC 7
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#define CPP_GDSC 8
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#define OXILI_GX_GDSC 9
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#define OXILI_CX_GDSC 10
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#define FD_GDSC 11
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/* Resets */
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#define CAMSS_MICRO_BCR 0
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#endif
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