51 lines
1.4 KiB
C
51 lines
1.4 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2022 Collabora Ltd.
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* Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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*/
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#include <dt-bindings/clock/mediatek,mt6795-clk.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include "clk-gate.h"
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#include "clk-mtk.h"
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static const struct mtk_gate_regs mfg_cg_regs = {
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.set_ofs = 0x4,
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.clr_ofs = 0x8,
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.sta_ofs = 0x0,
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};
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#define GATE_MFG(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &mfg_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
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static const struct mtk_gate mfg_clks[] = {
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GATE_MFG(CLK_MFG_BAXI, "mfg_baxi", "axi_mfg_in_sel", 0),
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GATE_MFG(CLK_MFG_BMEM, "mfg_bmem", "mem_mfg_in_sel", 1),
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GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 2),
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GATE_MFG(CLK_MFG_B26M, "mfg_b26m", "clk26m", 3),
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};
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static const struct mtk_clk_desc mfg_desc = {
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.clks = mfg_clks,
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.num_clks = ARRAY_SIZE(mfg_clks),
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};
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static const struct of_device_id of_match_clk_mt6795_mfg[] = {
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{ .compatible = "mediatek,mt6795-mfgcfg", .data = &mfg_desc },
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{ /* sentinel */ }
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};
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static struct platform_driver clk_mt6795_mfg_drv = {
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.driver = {
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.name = "clk-mt6795-mfg",
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.of_match_table = of_match_clk_mt6795_mfg,
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},
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.probe = mtk_clk_simple_probe,
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.remove = mtk_clk_simple_remove,
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};
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module_platform_driver(clk_mt6795_mfg_drv);
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MODULE_DESCRIPTION("MediaTek MT6795 mfg clocks driver");
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MODULE_LICENSE("GPL");
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