146 lines
4.0 KiB
C
146 lines
4.0 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Freescale MPC85xx/MPC86xx RapidIO support
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*
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* Copyright 2009 Sysgo AG
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* Thomas Moll <thomas.moll@sysgo.com>
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* - fixed maintenance access routines, check for aligned access
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*
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* Copyright 2009 Integrated Device Technology, Inc.
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* Alex Bounine <alexandre.bounine@idt.com>
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* - Added Port-Write message handling
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* - Added Machine Check exception handling
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*
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* Copyright (C) 2007, 2008, 2010, 2011 Freescale Semiconductor, Inc.
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* Zhang Wei <wei.zhang@freescale.com>
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* Lian Minghuan-B31939 <Minghuan.Lian@freescale.com>
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* Liu Gang <Gang.Liu@freescale.com>
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*
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* Copyright 2005 MontaVista Software, Inc.
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* Matt Porter <mporter@kernel.crashing.org>
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*/
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#ifndef __FSL_RIO_H
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#define __FSL_RIO_H
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#include <linux/rio.h>
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#include <linux/rio_drv.h>
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#include <linux/kfifo.h>
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#define RIO_REGS_WIN(mport) (((struct rio_priv *)(mport->priv))->regs_win)
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#define RIO_MAINT_WIN_SIZE 0x400000
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#define RIO_LTLEDCSR 0x0608
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#define DOORBELL_ROWAR_EN 0x80000000
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#define DOORBELL_ROWAR_TFLOWLV 0x08000000 /* highest priority level */
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#define DOORBELL_ROWAR_PCI 0x02000000 /* PCI window */
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#define DOORBELL_ROWAR_NREAD 0x00040000 /* NREAD */
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#define DOORBELL_ROWAR_MAINTRD 0x00070000 /* maintenance read */
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#define DOORBELL_ROWAR_RES 0x00002000 /* wrtpy: reserved */
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#define DOORBELL_ROWAR_MAINTWD 0x00007000
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#define DOORBELL_ROWAR_SIZE 0x0000000b /* window size is 4k */
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#define RIO_ATMU_REGS_PORT1_OFFSET 0x10c00
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#define RIO_ATMU_REGS_PORT2_OFFSET 0x10e00
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#define RIO_S_DBELL_REGS_OFFSET 0x13400
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#define RIO_S_PW_REGS_OFFSET 0x134e0
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#define RIO_ATMU_REGS_DBELL_OFFSET 0x10C40
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#define RIO_INB_ATMU_REGS_PORT1_OFFSET 0x10d60
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#define RIO_INB_ATMU_REGS_PORT2_OFFSET 0x10f60
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#define MAX_MSG_UNIT_NUM 2
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#define MAX_PORT_NUM 4
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#define RIO_INB_ATMU_COUNT 4
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struct rio_atmu_regs {
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u32 rowtar;
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u32 rowtear;
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u32 rowbar;
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u32 pad1;
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u32 rowar;
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u32 pad2[3];
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};
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struct rio_inb_atmu_regs {
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u32 riwtar;
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u32 pad1;
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u32 riwbar;
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u32 pad2;
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u32 riwar;
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u32 pad3[3];
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};
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struct rio_dbell_ring {
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void *virt;
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dma_addr_t phys;
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};
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struct rio_port_write_msg {
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void *virt;
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dma_addr_t phys;
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u32 msg_count;
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u32 err_count;
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u32 discard_count;
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};
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struct fsl_rio_dbell {
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struct rio_mport *mport[MAX_PORT_NUM];
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struct device *dev;
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struct rio_dbell_regs __iomem *dbell_regs;
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struct rio_dbell_ring dbell_ring;
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int bellirq;
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};
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struct fsl_rio_pw {
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struct rio_mport *mport[MAX_PORT_NUM];
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struct device *dev;
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struct rio_pw_regs __iomem *pw_regs;
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struct rio_port_write_msg port_write_msg;
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int pwirq;
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struct work_struct pw_work;
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struct kfifo pw_fifo;
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spinlock_t pw_fifo_lock;
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};
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struct rio_priv {
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struct device *dev;
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void __iomem *regs_win;
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struct rio_atmu_regs __iomem *atmu_regs;
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struct rio_atmu_regs __iomem *maint_atmu_regs;
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struct rio_inb_atmu_regs __iomem *inb_atmu_regs;
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void __iomem *maint_win;
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void *rmm_handle; /* RapidIO message manager(unit) Handle */
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};
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extern void __iomem *rio_regs_win;
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extern void __iomem *rmu_regs_win;
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extern resource_size_t rio_law_start;
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extern struct fsl_rio_dbell *dbell;
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extern struct fsl_rio_pw *pw;
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extern int fsl_rio_setup_rmu(struct rio_mport *mport,
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struct device_node *node);
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extern int fsl_rio_port_write_init(struct fsl_rio_pw *pw);
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extern int fsl_rio_pw_enable(struct rio_mport *mport, int enable);
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extern void fsl_rio_port_error_handler(int offset);
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extern int fsl_rio_doorbell_init(struct fsl_rio_dbell *dbell);
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extern int fsl_rio_doorbell_send(struct rio_mport *mport,
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int index, u16 destid, u16 data);
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extern int fsl_add_outb_message(struct rio_mport *mport,
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struct rio_dev *rdev,
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int mbox, void *buffer, size_t len);
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extern int fsl_open_outb_mbox(struct rio_mport *mport,
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void *dev_id, int mbox, int entries);
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extern void fsl_close_outb_mbox(struct rio_mport *mport, int mbox);
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extern int fsl_open_inb_mbox(struct rio_mport *mport,
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void *dev_id, int mbox, int entries);
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extern void fsl_close_inb_mbox(struct rio_mport *mport, int mbox);
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extern int fsl_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf);
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extern void *fsl_get_inb_message(struct rio_mport *mport, int mbox);
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#endif
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