50 lines
1.6 KiB
C
50 lines
1.6 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_POWERPC_BOOK3S_PGTABLE_H
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#define _ASM_POWERPC_BOOK3S_PGTABLE_H
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#ifdef CONFIG_PPC64
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#include <asm/book3s/64/pgtable.h>
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#else
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#include <asm/book3s/32/pgtable.h>
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#endif
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#ifndef __ASSEMBLY__
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/* Insert a PTE, top-level function is out of line. It uses an inline
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* low level function in the respective pgtable-* files
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*/
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extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
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pte_t pte);
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#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
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extern int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
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pte_t *ptep, pte_t entry, int dirty);
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struct file;
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extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
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unsigned long size, pgprot_t vma_prot);
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#define __HAVE_PHYS_MEM_ACCESS_PROT
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void __update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep);
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/*
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* This gets called at the end of handling a page fault, when
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* the kernel has put a new PTE into the page table for the process.
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* We use it to ensure coherency between the i-cache and d-cache
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* for the page which has just been mapped in.
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* On machines which use an MMU hash table, we use this to put a
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* corresponding HPTE into the hash table ahead of time, instead of
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* waiting for the inevitable extra hash-table miss exception.
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*/
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static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
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{
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if (IS_ENABLED(CONFIG_PPC32) && !mmu_has_feature(MMU_FTR_HPTE_TABLE))
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return;
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if (radix_enabled())
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return;
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__update_mmu_cache(vma, address, ptep);
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}
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#endif /* __ASSEMBLY__ */
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#endif
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