95 lines
3.7 KiB
C
95 lines
3.7 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2016 ARM Ltd.
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*/
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#ifndef __ASM_PGTABLE_PROT_H
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#define __ASM_PGTABLE_PROT_H
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#include <asm/memory.h>
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#include <asm/pgtable-hwdef.h>
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#include <linux/const.h>
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/*
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* Software defined PTE bits definition.
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*/
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#define PTE_WRITE (PTE_DBM) /* same as DBM (51) */
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#define PTE_SWP_EXCLUSIVE (_AT(pteval_t, 1) << 2) /* only for swp ptes */
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#define PTE_DIRTY (_AT(pteval_t, 1) << 55)
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#define PTE_SPECIAL (_AT(pteval_t, 1) << 56)
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#define PTE_DEVMAP (_AT(pteval_t, 1) << 57)
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#define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */
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/*
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* This bit indicates that the entry is present i.e. pmd_page()
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* still points to a valid huge page in memory even if the pmd
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* has been invalidated.
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*/
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#define PMD_PRESENT_INVALID (_AT(pteval_t, 1) << 59) /* only when !PMD_SECT_VALID */
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#ifndef __ASSEMBLY__
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#include <asm/cpufeature.h>
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#include <asm/pgtable-types.h>
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extern bool arm64_use_ng_mappings;
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#define _PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
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#define _PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
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#define PTE_MAYBE_NG (arm64_use_ng_mappings ? PTE_NG : 0)
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#define PMD_MAYBE_NG (arm64_use_ng_mappings ? PMD_SECT_NG : 0)
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/*
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* If we have userspace only BTI we don't want to mark kernel pages
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* guarded even if the system does support BTI.
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*/
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#ifdef CONFIG_ARM64_BTI_KERNEL
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#define PTE_MAYBE_GP (system_supports_bti() ? PTE_GP : 0)
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#else
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#define PTE_MAYBE_GP 0
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#endif
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#define PROT_DEFAULT (_PROT_DEFAULT | PTE_MAYBE_NG)
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#define PROT_SECT_DEFAULT (_PROT_SECT_DEFAULT | PMD_MAYBE_NG)
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#define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
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#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE))
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#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC))
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#define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL))
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#define PROT_NORMAL_TAGGED (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_TAGGED))
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#define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
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#define PROT_SECT_NORMAL (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
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#define PROT_SECT_NORMAL_EXEC (PROT_SECT_DEFAULT | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
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#define _PAGE_DEFAULT (_PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))
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#define PAGE_KERNEL __pgprot(PROT_NORMAL)
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#define PAGE_KERNEL_RO __pgprot((PROT_NORMAL & ~PTE_WRITE) | PTE_RDONLY)
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#define PAGE_KERNEL_ROX __pgprot((PROT_NORMAL & ~(PTE_WRITE | PTE_PXN)) | PTE_RDONLY)
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#define PAGE_KERNEL_EXEC __pgprot(PROT_NORMAL & ~PTE_PXN)
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#define PAGE_KERNEL_EXEC_CONT __pgprot((PROT_NORMAL & ~PTE_PXN) | PTE_CONT)
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#define PAGE_S2_MEMATTR(attr, has_fwb) \
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({ \
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u64 __val; \
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if (has_fwb) \
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__val = PTE_S2_MEMATTR(MT_S2_FWB_ ## attr); \
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else \
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__val = PTE_S2_MEMATTR(MT_S2_ ## attr); \
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__val; \
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})
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#define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN)
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/* shared+writable pages are clean by default, hence PTE_RDONLY|PTE_WRITE */
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#define PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)
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#define PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_WRITE)
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#define PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN)
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#define PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN)
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#define PAGE_EXECONLY __pgprot(_PAGE_DEFAULT | PTE_RDONLY | PTE_NG | PTE_PXN)
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_PGTABLE_PROT_H */
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