97 lines
2.3 KiB
C
97 lines
2.3 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C24xx - PM core support for arch/arm/plat-s3c/pm.c
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*/
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#include <linux/delay.h>
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#include <linux/io.h>
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#include "regs-clock.h"
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#include "regs-irq-s3c24xx.h"
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#include "irqs.h"
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static inline void s3c_pm_debug_init_uart(void)
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{
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#ifdef CONFIG_SAMSUNG_PM_DEBUG
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unsigned long tmp = __raw_readl(S3C2410_CLKCON);
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/* re-start uart clocks */
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tmp |= S3C2410_CLKCON_UART0;
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tmp |= S3C2410_CLKCON_UART1;
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tmp |= S3C2410_CLKCON_UART2;
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__raw_writel(tmp, S3C2410_CLKCON);
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udelay(10);
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#endif
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}
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static inline void s3c_pm_arch_prepare_irqs(void)
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{
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__raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK);
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__raw_writel(s3c_irqwake_eintmask, S3C2410_EINTMASK);
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/* ack any outstanding external interrupts before we go to sleep */
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__raw_writel(__raw_readl(S3C2410_EINTPEND), S3C2410_EINTPEND);
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__raw_writel(__raw_readl(S3C2410_INTPND), S3C2410_INTPND);
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__raw_writel(__raw_readl(S3C2410_SRCPND), S3C2410_SRCPND);
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}
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static inline void s3c_pm_arch_stop_clocks(void)
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{
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__raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */
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}
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/* s3c2410_pm_show_resume_irqs
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*
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* print any IRQs asserted at resume time (ie, we woke from)
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*/
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static inline void s3c_pm_show_resume_irqs(int start, unsigned long which,
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unsigned long mask)
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{
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int i;
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which &= ~mask;
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for (i = 0; i <= 31; i++) {
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if (which & (1L<<i)) {
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S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
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}
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}
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}
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static inline void s3c_pm_arch_show_resume_irqs(void)
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{
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S3C_PMDBG("post sleep: IRQs 0x%08x, 0x%08x\n",
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__raw_readl(S3C2410_SRCPND),
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__raw_readl(S3C2410_EINTPEND));
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s3c_pm_show_resume_irqs(IRQ_EINT0, __raw_readl(S3C2410_SRCPND),
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s3c_irqwake_intmask);
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s3c_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND),
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s3c_irqwake_eintmask);
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}
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static inline void s3c_pm_restored_gpios(void) { }
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static inline void samsung_pm_saved_gpios(void) { }
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/* state for IRQs over sleep */
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/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources
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*
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* set bit to 1 in allow bitfield to enable the wakeup settings on it
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*/
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#ifdef CONFIG_PM_SLEEP
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#define s3c_irqwake_intallow (1L << 30 | 0xfL)
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#define s3c_irqwake_eintallow (0x0000fff0L)
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#else
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#define s3c_irqwake_eintallow 0
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#define s3c_irqwake_intallow 0
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#endif
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