100 lines
2.0 KiB
YAML
100 lines
2.0 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/atmel,quadspi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Atmel Quad Serial Peripheral Interface (QSPI)
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maintainers:
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- Tudor Ambarus <tudor.ambarus@microchip.com>
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allOf:
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- $ref: spi-controller.yaml#
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properties:
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compatible:
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enum:
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- atmel,sama5d2-qspi
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- microchip,sam9x60-qspi
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- microchip,sama7g5-qspi
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- microchip,sama7g5-ospi
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reg:
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items:
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- description: base registers
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- description: mapped memory
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reg-names:
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items:
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- const: qspi_base
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- const: qspi_mmap
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clocks:
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minItems: 1
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items:
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- description: peripheral clock
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- description: system clock or generic clock, if available
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clock-names:
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minItems: 1
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items:
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- const: pclk
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- enum: [ qspick, gclk ]
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interrupts:
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maxItems: 1
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dmas:
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items:
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- description: tx DMA channel
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- description: rx DMA channel
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dma-names:
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items:
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- const: tx
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- const: rx
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- clocks
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- clock-names
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- '#address-cells'
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- '#size-cells'
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/at91.h>
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spi@f0020000 {
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compatible = "atmel,sama5d2-qspi";
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reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>;
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reg-names = "qspi_base", "qspi_mmap";
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interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
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clock-names = "pclk";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi0_default>;
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flash@0 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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reg = <0>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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};
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};
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