49 lines
1.1 KiB
YAML
49 lines
1.1 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/reset/snps,axs10x-reset.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: AXS10x reset controller
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maintainers:
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- Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
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description: |
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This binding describes the ARC AXS10x boards custom IP-block which allows
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to control reset signals of selected peripherals. For example DW GMAC, etc...
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This block is controlled via memory-mapped register (AKA CREG) which
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represents up-to 32 reset lines.
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As of today only the following lines are used:
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- DW GMAC - line 5
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properties:
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compatible:
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const: snps,axs10x-reset
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reg:
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maxItems: 1
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'#reset-cells':
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const: 1
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required:
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- compatible
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- reg
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- '#reset-cells'
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additionalProperties: false
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examples:
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- |
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reset: reset-controller@11220 {
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compatible = "snps,axs10x-reset";
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#reset-cells = <1>;
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reg = <0x11220 0x4>;
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};
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// Specifying reset lines connected to IP modules:
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ethernet {
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resets = <&reset 5>;
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};
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