39 lines
1.0 KiB
C
39 lines
1.0 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Definitions for PCI support.
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*/
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#define FL_BASE_MASK 0x0007
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#define FL_BASE0 0x0000
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#define FL_BASE1 0x0001
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#define FL_BASE2 0x0002
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#define FL_BASE3 0x0003
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#define FL_BASE4 0x0004
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#define FL_GET_BASE(x) (x & FL_BASE_MASK)
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/* Use successive BARs (PCI base address registers),
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else use offset into some specified BAR */
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#define FL_BASE_BARS 0x0008
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/* do not assign an irq */
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#define FL_NOIRQ 0x0080
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/* Use the Base address register size to cap number of ports */
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#define FL_REGION_SZ_CAP 0x0100
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struct pciserial_board {
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unsigned int flags;
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unsigned int num_ports;
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unsigned int base_baud;
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unsigned int uart_offset;
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unsigned int reg_shift;
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unsigned int first_offset;
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};
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struct serial_private;
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struct serial_private *
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pciserial_init_ports(struct pci_dev *dev, const struct pciserial_board *board);
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void pciserial_remove_ports(struct serial_private *priv);
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void pciserial_suspend_ports(struct serial_private *priv);
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void pciserial_resume_ports(struct serial_private *priv);
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