50 lines
1.3 KiB
C
50 lines
1.3 KiB
C
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (C) 2021 Nuvoton Technologies.
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* Author: Tomer Maimon <tomer.maimon@nuvoton.com>
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*
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* Device Tree binding constants for NPCM8XX clock controller.
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*/
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#ifndef __DT_BINDINGS_CLOCK_NPCM8XX_H
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#define __DT_BINDINGS_CLOCK_NPCM8XX_H
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#define NPCM8XX_CLK_CPU 0
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#define NPCM8XX_CLK_GFX_PIXEL 1
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#define NPCM8XX_CLK_MC 2
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#define NPCM8XX_CLK_ADC 3
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#define NPCM8XX_CLK_AHB 4
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#define NPCM8XX_CLK_TIMER 5
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#define NPCM8XX_CLK_UART 6
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#define NPCM8XX_CLK_UART2 7
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#define NPCM8XX_CLK_MMC 8
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#define NPCM8XX_CLK_SPI3 9
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#define NPCM8XX_CLK_PCI 10
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#define NPCM8XX_CLK_AXI 11
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#define NPCM8XX_CLK_APB4 12
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#define NPCM8XX_CLK_APB3 13
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#define NPCM8XX_CLK_APB2 14
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#define NPCM8XX_CLK_APB1 15
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#define NPCM8XX_CLK_APB5 16
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#define NPCM8XX_CLK_CLKOUT 17
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#define NPCM8XX_CLK_GFX 18
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#define NPCM8XX_CLK_SU 19
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#define NPCM8XX_CLK_SU48 20
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#define NPCM8XX_CLK_SDHC 21
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#define NPCM8XX_CLK_SPI0 22
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#define NPCM8XX_CLK_SPI1 23
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#define NPCM8XX_CLK_SPIX 24
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#define NPCM8XX_CLK_RG 25
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#define NPCM8XX_CLK_RCP 26
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#define NPCM8XX_CLK_PRE_ADC 27
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#define NPCM8XX_CLK_ATB 28
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#define NPCM8XX_CLK_PRE_CLK 29
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#define NPCM8XX_CLK_TH 30
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#define NPCM8XX_CLK_REFCLK 31
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#define NPCM8XX_CLK_SYSBYPCK 32
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#define NPCM8XX_CLK_MCBYPCK 33
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#define NPCM8XX_NUM_CLOCKS (NPCM8XX_CLK_MCBYPCK + 1)
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#endif
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