635 lines
15 KiB
C
635 lines
15 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Driver for ICPlus PHYs
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*
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* Copyright (c) 2007 Freescale Semiconductor, Inc.
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*/
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/unistd.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/phy.h>
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#include <linux/property.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <linux/uaccess.h>
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MODULE_DESCRIPTION("ICPlus IP175C/IP101A/IP101G/IC1001 PHY drivers");
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MODULE_AUTHOR("Michael Barkowski");
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MODULE_LICENSE("GPL");
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/* IP101A/G - IP1001 */
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#define IP10XX_SPEC_CTRL_STATUS 16 /* Spec. Control Register */
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#define IP1001_RXPHASE_SEL BIT(0) /* Add delay on RX_CLK */
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#define IP1001_TXPHASE_SEL BIT(1) /* Add delay on TX_CLK */
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#define IP1001_SPEC_CTRL_STATUS_2 20 /* IP1001 Spec. Control Reg 2 */
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#define IP1001_APS_ON 11 /* IP1001 APS Mode bit */
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#define IP101A_G_APS_ON BIT(1) /* IP101A/G APS Mode bit */
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#define IP101A_G_AUTO_MDIX_DIS BIT(11)
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#define IP101A_G_IRQ_CONF_STATUS 0x11 /* Conf Info IRQ & Status Reg */
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#define IP101A_G_IRQ_PIN_USED BIT(15) /* INTR pin used */
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#define IP101A_G_IRQ_ALL_MASK BIT(11) /* IRQ's inactive */
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#define IP101A_G_IRQ_SPEED_CHANGE BIT(2)
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#define IP101A_G_IRQ_DUPLEX_CHANGE BIT(1)
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#define IP101A_G_IRQ_LINK_CHANGE BIT(0)
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#define IP101A_G_PHY_STATUS 18
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#define IP101A_G_MDIX BIT(9)
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#define IP101A_G_PHY_SPEC_CTRL 30
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#define IP101A_G_FORCE_MDIX BIT(3)
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#define IP101G_PAGE_CONTROL 0x14
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#define IP101G_PAGE_CONTROL_MASK GENMASK(4, 0)
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#define IP101G_DIGITAL_IO_SPEC_CTRL 0x1d
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#define IP101G_DIGITAL_IO_SPEC_CTRL_SEL_INTR32 BIT(2)
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#define IP101G_DEFAULT_PAGE 16
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#define IP101G_P1_CNT_CTRL 17
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#define CNT_CTRL_RX_EN BIT(13)
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#define IP101G_P8_CNT_CTRL 17
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#define CNT_CTRL_RDCLR_EN BIT(15)
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#define IP101G_CNT_REG 18
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#define IP175C_PHY_ID 0x02430d80
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#define IP1001_PHY_ID 0x02430d90
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#define IP101A_PHY_ID 0x02430c54
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/* The 32-pin IP101GR package can re-configure the mode of the RXER/INTR_32 pin
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* (pin number 21). The hardware default is RXER (receive error) mode. But it
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* can be configured to interrupt mode manually.
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*/
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enum ip101gr_sel_intr32 {
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IP101GR_SEL_INTR32_KEEP,
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IP101GR_SEL_INTR32_INTR,
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IP101GR_SEL_INTR32_RXER,
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};
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struct ip101g_hw_stat {
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const char *name;
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int page;
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};
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static struct ip101g_hw_stat ip101g_hw_stats[] = {
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{ "phy_crc_errors", 1 },
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{ "phy_symbol_errors", 11, },
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};
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struct ip101a_g_phy_priv {
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enum ip101gr_sel_intr32 sel_intr32;
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u64 stats[ARRAY_SIZE(ip101g_hw_stats)];
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};
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static int ip175c_config_init(struct phy_device *phydev)
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{
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int err, i;
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static int full_reset_performed;
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if (full_reset_performed == 0) {
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/* master reset */
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err = mdiobus_write(phydev->mdio.bus, 30, 0, 0x175c);
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if (err < 0)
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return err;
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/* ensure no bus delays overlap reset period */
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err = mdiobus_read(phydev->mdio.bus, 30, 0);
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/* data sheet specifies reset period is 2 msec */
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mdelay(2);
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/* enable IP175C mode */
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err = mdiobus_write(phydev->mdio.bus, 29, 31, 0x175c);
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if (err < 0)
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return err;
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/* Set MII0 speed and duplex (in PHY mode) */
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err = mdiobus_write(phydev->mdio.bus, 29, 22, 0x420);
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if (err < 0)
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return err;
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/* reset switch ports */
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for (i = 0; i < 5; i++) {
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err = mdiobus_write(phydev->mdio.bus, i,
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MII_BMCR, BMCR_RESET);
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if (err < 0)
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return err;
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}
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for (i = 0; i < 5; i++)
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err = mdiobus_read(phydev->mdio.bus, i, MII_BMCR);
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mdelay(2);
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full_reset_performed = 1;
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}
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if (phydev->mdio.addr != 4) {
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phydev->state = PHY_RUNNING;
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phydev->speed = SPEED_100;
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phydev->duplex = DUPLEX_FULL;
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phydev->link = 1;
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netif_carrier_on(phydev->attached_dev);
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}
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return 0;
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}
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static int ip1001_config_init(struct phy_device *phydev)
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{
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int c;
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/* Enable Auto Power Saving mode */
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c = phy_read(phydev, IP1001_SPEC_CTRL_STATUS_2);
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if (c < 0)
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return c;
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c |= IP1001_APS_ON;
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c = phy_write(phydev, IP1001_SPEC_CTRL_STATUS_2, c);
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if (c < 0)
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return c;
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if (phy_interface_is_rgmii(phydev)) {
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c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
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if (c < 0)
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return c;
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c &= ~(IP1001_RXPHASE_SEL | IP1001_TXPHASE_SEL);
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
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c |= (IP1001_RXPHASE_SEL | IP1001_TXPHASE_SEL);
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else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
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c |= IP1001_RXPHASE_SEL;
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else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
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c |= IP1001_TXPHASE_SEL;
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c = phy_write(phydev, IP10XX_SPEC_CTRL_STATUS, c);
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if (c < 0)
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return c;
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}
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return 0;
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}
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static int ip175c_read_status(struct phy_device *phydev)
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{
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if (phydev->mdio.addr == 4) /* WAN port */
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genphy_read_status(phydev);
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else
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/* Don't need to read status for switch ports */
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phydev->irq = PHY_MAC_INTERRUPT;
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return 0;
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}
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static int ip175c_config_aneg(struct phy_device *phydev)
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{
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if (phydev->mdio.addr == 4) /* WAN port */
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genphy_config_aneg(phydev);
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return 0;
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}
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static int ip101a_g_probe(struct phy_device *phydev)
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{
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struct device *dev = &phydev->mdio.dev;
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struct ip101a_g_phy_priv *priv;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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/* Both functions (RX error and interrupt status) are sharing the same
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* pin on the 32-pin IP101GR, so this is an exclusive choice.
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*/
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if (device_property_read_bool(dev, "icplus,select-rx-error") &&
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device_property_read_bool(dev, "icplus,select-interrupt")) {
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dev_err(dev,
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"RXER and INTR mode cannot be selected together\n");
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return -EINVAL;
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}
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if (device_property_read_bool(dev, "icplus,select-rx-error"))
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priv->sel_intr32 = IP101GR_SEL_INTR32_RXER;
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else if (device_property_read_bool(dev, "icplus,select-interrupt"))
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priv->sel_intr32 = IP101GR_SEL_INTR32_INTR;
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else
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priv->sel_intr32 = IP101GR_SEL_INTR32_KEEP;
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phydev->priv = priv;
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return 0;
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}
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static int ip101a_g_config_intr_pin(struct phy_device *phydev)
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{
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struct ip101a_g_phy_priv *priv = phydev->priv;
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int oldpage, err = 0;
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oldpage = phy_select_page(phydev, IP101G_DEFAULT_PAGE);
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if (oldpage < 0)
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goto out;
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/* configure the RXER/INTR_32 pin of the 32-pin IP101GR if needed: */
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switch (priv->sel_intr32) {
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case IP101GR_SEL_INTR32_RXER:
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err = __phy_modify(phydev, IP101G_DIGITAL_IO_SPEC_CTRL,
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IP101G_DIGITAL_IO_SPEC_CTRL_SEL_INTR32, 0);
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if (err < 0)
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goto out;
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break;
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case IP101GR_SEL_INTR32_INTR:
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err = __phy_modify(phydev, IP101G_DIGITAL_IO_SPEC_CTRL,
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IP101G_DIGITAL_IO_SPEC_CTRL_SEL_INTR32,
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IP101G_DIGITAL_IO_SPEC_CTRL_SEL_INTR32);
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if (err < 0)
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goto out;
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break;
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default:
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/* Don't touch IP101G_DIGITAL_IO_SPEC_CTRL because it's not
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* documented on IP101A and it's not clear whether this would
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* cause problems.
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* For the 32-pin IP101GR we simply keep the SEL_INTR32
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* configuration as set by the bootloader when not configured
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* to one of the special functions.
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*/
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break;
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}
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out:
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return phy_restore_page(phydev, oldpage, err);
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}
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static int ip101a_config_init(struct phy_device *phydev)
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{
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int ret;
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/* Enable Auto Power Saving mode */
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ret = phy_set_bits(phydev, IP10XX_SPEC_CTRL_STATUS, IP101A_G_APS_ON);
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if (ret)
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return ret;
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return ip101a_g_config_intr_pin(phydev);
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}
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static int ip101g_config_init(struct phy_device *phydev)
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{
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int ret;
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/* Enable the PHY counters */
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ret = phy_modify_paged(phydev, 1, IP101G_P1_CNT_CTRL,
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CNT_CTRL_RX_EN, CNT_CTRL_RX_EN);
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if (ret)
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return ret;
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/* Clear error counters on read */
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ret = phy_modify_paged(phydev, 8, IP101G_P8_CNT_CTRL,
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CNT_CTRL_RDCLR_EN, CNT_CTRL_RDCLR_EN);
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if (ret)
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return ret;
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return ip101a_g_config_intr_pin(phydev);
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}
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static int ip101a_g_read_status(struct phy_device *phydev)
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{
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int oldpage, ret, stat1, stat2;
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ret = genphy_read_status(phydev);
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if (ret)
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return ret;
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oldpage = phy_select_page(phydev, IP101G_DEFAULT_PAGE);
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if (oldpage < 0)
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goto out;
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ret = __phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
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if (ret < 0)
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goto out;
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stat1 = ret;
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ret = __phy_read(phydev, IP101A_G_PHY_SPEC_CTRL);
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if (ret < 0)
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goto out;
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stat2 = ret;
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if (stat1 & IP101A_G_AUTO_MDIX_DIS) {
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if (stat2 & IP101A_G_FORCE_MDIX)
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phydev->mdix_ctrl = ETH_TP_MDI_X;
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else
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phydev->mdix_ctrl = ETH_TP_MDI;
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} else {
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phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
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}
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if (stat2 & IP101A_G_MDIX)
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phydev->mdix = ETH_TP_MDI_X;
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else
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phydev->mdix = ETH_TP_MDI;
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ret = 0;
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out:
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return phy_restore_page(phydev, oldpage, ret);
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}
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static int ip101a_g_config_mdix(struct phy_device *phydev)
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{
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u16 ctrl = 0, ctrl2 = 0;
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int oldpage;
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int ret = 0;
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switch (phydev->mdix_ctrl) {
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case ETH_TP_MDI:
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ctrl = IP101A_G_AUTO_MDIX_DIS;
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break;
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case ETH_TP_MDI_X:
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ctrl = IP101A_G_AUTO_MDIX_DIS;
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ctrl2 = IP101A_G_FORCE_MDIX;
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break;
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case ETH_TP_MDI_AUTO:
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break;
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default:
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return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
oldpage = phy_select_page(phydev, IP101G_DEFAULT_PAGE);
|
||
|
|
if (oldpage < 0)
|
||
|
|
goto out;
|
||
|
|
|
||
|
|
ret = __phy_modify(phydev, IP10XX_SPEC_CTRL_STATUS,
|
||
|
|
IP101A_G_AUTO_MDIX_DIS, ctrl);
|
||
|
|
if (ret)
|
||
|
|
goto out;
|
||
|
|
|
||
|
|
ret = __phy_modify(phydev, IP101A_G_PHY_SPEC_CTRL,
|
||
|
|
IP101A_G_FORCE_MDIX, ctrl2);
|
||
|
|
|
||
|
|
out:
|
||
|
|
return phy_restore_page(phydev, oldpage, ret);
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ip101a_g_config_aneg(struct phy_device *phydev)
|
||
|
|
{
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
ret = ip101a_g_config_mdix(phydev);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
return genphy_config_aneg(phydev);
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ip101a_g_ack_interrupt(struct phy_device *phydev)
|
||
|
|
{
|
||
|
|
int err;
|
||
|
|
|
||
|
|
err = phy_read_paged(phydev, IP101G_DEFAULT_PAGE,
|
||
|
|
IP101A_G_IRQ_CONF_STATUS);
|
||
|
|
if (err < 0)
|
||
|
|
return err;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ip101a_g_config_intr(struct phy_device *phydev)
|
||
|
|
{
|
||
|
|
u16 val;
|
||
|
|
int err;
|
||
|
|
|
||
|
|
if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
|
||
|
|
err = ip101a_g_ack_interrupt(phydev);
|
||
|
|
if (err)
|
||
|
|
return err;
|
||
|
|
|
||
|
|
/* INTR pin used: Speed/link/duplex will cause an interrupt */
|
||
|
|
val = IP101A_G_IRQ_PIN_USED;
|
||
|
|
err = phy_write_paged(phydev, IP101G_DEFAULT_PAGE,
|
||
|
|
IP101A_G_IRQ_CONF_STATUS, val);
|
||
|
|
} else {
|
||
|
|
val = IP101A_G_IRQ_ALL_MASK;
|
||
|
|
err = phy_write_paged(phydev, IP101G_DEFAULT_PAGE,
|
||
|
|
IP101A_G_IRQ_CONF_STATUS, val);
|
||
|
|
if (err)
|
||
|
|
return err;
|
||
|
|
|
||
|
|
err = ip101a_g_ack_interrupt(phydev);
|
||
|
|
}
|
||
|
|
|
||
|
|
return err;
|
||
|
|
}
|
||
|
|
|
||
|
|
static irqreturn_t ip101a_g_handle_interrupt(struct phy_device *phydev)
|
||
|
|
{
|
||
|
|
int irq_status;
|
||
|
|
|
||
|
|
irq_status = phy_read_paged(phydev, IP101G_DEFAULT_PAGE,
|
||
|
|
IP101A_G_IRQ_CONF_STATUS);
|
||
|
|
if (irq_status < 0) {
|
||
|
|
phy_error(phydev);
|
||
|
|
return IRQ_NONE;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (!(irq_status & (IP101A_G_IRQ_SPEED_CHANGE |
|
||
|
|
IP101A_G_IRQ_DUPLEX_CHANGE |
|
||
|
|
IP101A_G_IRQ_LINK_CHANGE)))
|
||
|
|
return IRQ_NONE;
|
||
|
|
|
||
|
|
phy_trigger_machine(phydev);
|
||
|
|
|
||
|
|
return IRQ_HANDLED;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* The IP101A doesn't really have a page register. We just pretend to have one
|
||
|
|
* so we can use the paged versions of the callbacks of the IP101G.
|
||
|
|
*/
|
||
|
|
static int ip101a_read_page(struct phy_device *phydev)
|
||
|
|
{
|
||
|
|
return IP101G_DEFAULT_PAGE;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ip101a_write_page(struct phy_device *phydev, int page)
|
||
|
|
{
|
||
|
|
WARN_ONCE(page != IP101G_DEFAULT_PAGE, "wrong page selected\n");
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ip101g_read_page(struct phy_device *phydev)
|
||
|
|
{
|
||
|
|
return __phy_read(phydev, IP101G_PAGE_CONTROL);
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ip101g_write_page(struct phy_device *phydev, int page)
|
||
|
|
{
|
||
|
|
return __phy_write(phydev, IP101G_PAGE_CONTROL, page);
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ip101a_g_has_page_register(struct phy_device *phydev)
|
||
|
|
{
|
||
|
|
int oldval, val, ret;
|
||
|
|
|
||
|
|
oldval = phy_read(phydev, IP101G_PAGE_CONTROL);
|
||
|
|
if (oldval < 0)
|
||
|
|
return oldval;
|
||
|
|
|
||
|
|
ret = phy_write(phydev, IP101G_PAGE_CONTROL, 0xffff);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
val = phy_read(phydev, IP101G_PAGE_CONTROL);
|
||
|
|
if (val < 0)
|
||
|
|
return val;
|
||
|
|
|
||
|
|
ret = phy_write(phydev, IP101G_PAGE_CONTROL, oldval);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
return val == IP101G_PAGE_CONTROL_MASK;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ip101a_g_match_phy_device(struct phy_device *phydev, bool ip101a)
|
||
|
|
{
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
if (phydev->phy_id != IP101A_PHY_ID)
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
/* The IP101A and the IP101G share the same PHY identifier.The IP101G
|
||
|
|
* seems to be a successor of the IP101A and implements more functions.
|
||
|
|
* Amongst other things there is a page select register, which is not
|
||
|
|
* available on the IP101A. Use this to distinguish these two.
|
||
|
|
*/
|
||
|
|
ret = ip101a_g_has_page_register(phydev);
|
||
|
|
if (ret < 0)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
return ip101a == !ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ip101a_match_phy_device(struct phy_device *phydev)
|
||
|
|
{
|
||
|
|
return ip101a_g_match_phy_device(phydev, true);
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ip101g_match_phy_device(struct phy_device *phydev)
|
||
|
|
{
|
||
|
|
return ip101a_g_match_phy_device(phydev, false);
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ip101g_get_sset_count(struct phy_device *phydev)
|
||
|
|
{
|
||
|
|
return ARRAY_SIZE(ip101g_hw_stats);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void ip101g_get_strings(struct phy_device *phydev, u8 *data)
|
||
|
|
{
|
||
|
|
int i;
|
||
|
|
|
||
|
|
for (i = 0; i < ARRAY_SIZE(ip101g_hw_stats); i++)
|
||
|
|
strscpy(data + i * ETH_GSTRING_LEN,
|
||
|
|
ip101g_hw_stats[i].name, ETH_GSTRING_LEN);
|
||
|
|
}
|
||
|
|
|
||
|
|
static u64 ip101g_get_stat(struct phy_device *phydev, int i)
|
||
|
|
{
|
||
|
|
struct ip101g_hw_stat stat = ip101g_hw_stats[i];
|
||
|
|
struct ip101a_g_phy_priv *priv = phydev->priv;
|
||
|
|
int val;
|
||
|
|
u64 ret;
|
||
|
|
|
||
|
|
val = phy_read_paged(phydev, stat.page, IP101G_CNT_REG);
|
||
|
|
if (val < 0) {
|
||
|
|
ret = U64_MAX;
|
||
|
|
} else {
|
||
|
|
priv->stats[i] += val;
|
||
|
|
ret = priv->stats[i];
|
||
|
|
}
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void ip101g_get_stats(struct phy_device *phydev,
|
||
|
|
struct ethtool_stats *stats, u64 *data)
|
||
|
|
{
|
||
|
|
int i;
|
||
|
|
|
||
|
|
for (i = 0; i < ARRAY_SIZE(ip101g_hw_stats); i++)
|
||
|
|
data[i] = ip101g_get_stat(phydev, i);
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct phy_driver icplus_driver[] = {
|
||
|
|
{
|
||
|
|
PHY_ID_MATCH_MODEL(IP175C_PHY_ID),
|
||
|
|
.name = "ICPlus IP175C",
|
||
|
|
/* PHY_BASIC_FEATURES */
|
||
|
|
.config_init = ip175c_config_init,
|
||
|
|
.config_aneg = ip175c_config_aneg,
|
||
|
|
.read_status = ip175c_read_status,
|
||
|
|
.suspend = genphy_suspend,
|
||
|
|
.resume = genphy_resume,
|
||
|
|
}, {
|
||
|
|
PHY_ID_MATCH_MODEL(IP1001_PHY_ID),
|
||
|
|
.name = "ICPlus IP1001",
|
||
|
|
/* PHY_GBIT_FEATURES */
|
||
|
|
.config_init = ip1001_config_init,
|
||
|
|
.soft_reset = genphy_soft_reset,
|
||
|
|
.suspend = genphy_suspend,
|
||
|
|
.resume = genphy_resume,
|
||
|
|
}, {
|
||
|
|
.name = "ICPlus IP101A",
|
||
|
|
.match_phy_device = ip101a_match_phy_device,
|
||
|
|
.probe = ip101a_g_probe,
|
||
|
|
.read_page = ip101a_read_page,
|
||
|
|
.write_page = ip101a_write_page,
|
||
|
|
.config_intr = ip101a_g_config_intr,
|
||
|
|
.handle_interrupt = ip101a_g_handle_interrupt,
|
||
|
|
.config_init = ip101a_config_init,
|
||
|
|
.config_aneg = ip101a_g_config_aneg,
|
||
|
|
.read_status = ip101a_g_read_status,
|
||
|
|
.soft_reset = genphy_soft_reset,
|
||
|
|
.suspend = genphy_suspend,
|
||
|
|
.resume = genphy_resume,
|
||
|
|
}, {
|
||
|
|
.name = "ICPlus IP101G",
|
||
|
|
.match_phy_device = ip101g_match_phy_device,
|
||
|
|
.probe = ip101a_g_probe,
|
||
|
|
.read_page = ip101g_read_page,
|
||
|
|
.write_page = ip101g_write_page,
|
||
|
|
.config_intr = ip101a_g_config_intr,
|
||
|
|
.handle_interrupt = ip101a_g_handle_interrupt,
|
||
|
|
.config_init = ip101g_config_init,
|
||
|
|
.config_aneg = ip101a_g_config_aneg,
|
||
|
|
.read_status = ip101a_g_read_status,
|
||
|
|
.soft_reset = genphy_soft_reset,
|
||
|
|
.get_sset_count = ip101g_get_sset_count,
|
||
|
|
.get_strings = ip101g_get_strings,
|
||
|
|
.get_stats = ip101g_get_stats,
|
||
|
|
.suspend = genphy_suspend,
|
||
|
|
.resume = genphy_resume,
|
||
|
|
} };
|
||
|
|
|
||
|
|
module_phy_driver(icplus_driver);
|
||
|
|
|
||
|
|
static struct mdio_device_id __maybe_unused icplus_tbl[] = {
|
||
|
|
{ PHY_ID_MATCH_MODEL(IP175C_PHY_ID) },
|
||
|
|
{ PHY_ID_MATCH_MODEL(IP1001_PHY_ID) },
|
||
|
|
{ PHY_ID_MATCH_EXACT(IP101A_PHY_ID) },
|
||
|
|
{ }
|
||
|
|
};
|
||
|
|
|
||
|
|
MODULE_DEVICE_TABLE(mdio, icplus_tbl);
|