304 lines
8.0 KiB
C
304 lines
8.0 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
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* Copyright (C) 2018-2022 Linaro Ltd.
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*/
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/* DOC: IPA Interrupts
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*
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* The IPA has an interrupt line distinct from the interrupt used by the GSI
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* code. Whereas GSI interrupts are generally related to channel events (like
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* transfer completions), IPA interrupts are related to other events related
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* to the IPA. Some of the IPA interrupts come from a microcontroller
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* embedded in the IPA. Each IPA interrupt type can be both masked and
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* acknowledged independent of the others.
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*
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* Two of the IPA interrupts are initiated by the microcontroller. A third
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* can be generated to signal the need for a wakeup/resume when an IPA
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* endpoint has been suspended. There are other IPA events, but at this
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* time only these three are supported.
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*/
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/pm_runtime.h>
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#include "ipa.h"
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#include "ipa_reg.h"
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#include "ipa_endpoint.h"
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#include "ipa_interrupt.h"
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/**
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* struct ipa_interrupt - IPA interrupt information
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* @ipa: IPA pointer
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* @irq: Linux IRQ number used for IPA interrupts
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* @enabled: Mask indicating which interrupts are enabled
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* @handler: Array of handlers indexed by IPA interrupt ID
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*/
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struct ipa_interrupt {
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struct ipa *ipa;
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u32 irq;
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u32 enabled;
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ipa_irq_handler_t handler[IPA_IRQ_COUNT];
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};
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/* Returns true if the interrupt type is associated with the microcontroller */
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static bool ipa_interrupt_uc(struct ipa_interrupt *interrupt, u32 irq_id)
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{
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return irq_id == IPA_IRQ_UC_0 || irq_id == IPA_IRQ_UC_1;
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}
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/* Process a particular interrupt type that has been received */
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static void ipa_interrupt_process(struct ipa_interrupt *interrupt, u32 irq_id)
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{
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bool uc_irq = ipa_interrupt_uc(interrupt, irq_id);
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struct ipa *ipa = interrupt->ipa;
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const struct ipa_reg *reg;
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u32 mask = BIT(irq_id);
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u32 offset;
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/* For microcontroller interrupts, clear the interrupt right away,
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* "to avoid clearing unhandled interrupts."
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*/
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reg = ipa_reg(ipa, IPA_IRQ_CLR);
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offset = ipa_reg_offset(reg);
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if (uc_irq)
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iowrite32(mask, ipa->reg_virt + offset);
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if (irq_id < IPA_IRQ_COUNT && interrupt->handler[irq_id])
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interrupt->handler[irq_id](interrupt->ipa, irq_id);
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/* Clearing the SUSPEND_TX interrupt also clears the register
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* that tells us which suspended endpoint(s) caused the interrupt,
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* so defer clearing until after the handler has been called.
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*/
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if (!uc_irq)
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iowrite32(mask, ipa->reg_virt + offset);
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}
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/* IPA IRQ handler is threaded */
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static irqreturn_t ipa_isr_thread(int irq, void *dev_id)
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{
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struct ipa_interrupt *interrupt = dev_id;
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struct ipa *ipa = interrupt->ipa;
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u32 enabled = interrupt->enabled;
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const struct ipa_reg *reg;
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struct device *dev;
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u32 pending;
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u32 offset;
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u32 mask;
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int ret;
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dev = &ipa->pdev->dev;
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ret = pm_runtime_get_sync(dev);
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if (WARN_ON(ret < 0))
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goto out_power_put;
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/* The status register indicates which conditions are present,
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* including conditions whose interrupt is not enabled. Handle
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* only the enabled ones.
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*/
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reg = ipa_reg(ipa, IPA_IRQ_STTS);
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offset = ipa_reg_offset(reg);
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pending = ioread32(ipa->reg_virt + offset);
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while ((mask = pending & enabled)) {
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do {
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u32 irq_id = __ffs(mask);
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mask ^= BIT(irq_id);
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ipa_interrupt_process(interrupt, irq_id);
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} while (mask);
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pending = ioread32(ipa->reg_virt + offset);
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}
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/* If any disabled interrupts are pending, clear them */
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if (pending) {
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dev_dbg(dev, "clearing disabled IPA interrupts 0x%08x\n",
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pending);
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reg = ipa_reg(ipa, IPA_IRQ_CLR);
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offset = ipa_reg_offset(reg);
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iowrite32(pending, ipa->reg_virt + offset);
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}
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out_power_put:
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pm_runtime_mark_last_busy(dev);
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(void)pm_runtime_put_autosuspend(dev);
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return IRQ_HANDLED;
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}
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void ipa_interrupt_irq_disable(struct ipa *ipa)
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{
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disable_irq(ipa->interrupt->irq);
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}
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void ipa_interrupt_irq_enable(struct ipa *ipa)
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{
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enable_irq(ipa->interrupt->irq);
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}
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/* Common function used to enable/disable TX_SUSPEND for an endpoint */
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static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt,
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u32 endpoint_id, bool enable)
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{
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struct ipa *ipa = interrupt->ipa;
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u32 mask = BIT(endpoint_id);
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const struct ipa_reg *reg;
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u32 offset;
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u32 val;
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WARN_ON(!(mask & ipa->available));
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/* IPA version 3.0 does not support TX_SUSPEND interrupt control */
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if (ipa->version == IPA_VERSION_3_0)
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return;
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reg = ipa_reg(ipa, IRQ_SUSPEND_EN);
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offset = ipa_reg_offset(reg);
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val = ioread32(ipa->reg_virt + offset);
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if (enable)
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val |= mask;
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else
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val &= ~mask;
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iowrite32(val, ipa->reg_virt + offset);
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}
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/* Enable TX_SUSPEND for an endpoint */
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void
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ipa_interrupt_suspend_enable(struct ipa_interrupt *interrupt, u32 endpoint_id)
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{
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ipa_interrupt_suspend_control(interrupt, endpoint_id, true);
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}
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/* Disable TX_SUSPEND for an endpoint */
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void
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ipa_interrupt_suspend_disable(struct ipa_interrupt *interrupt, u32 endpoint_id)
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{
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ipa_interrupt_suspend_control(interrupt, endpoint_id, false);
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}
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/* Clear the suspend interrupt for all endpoints that signaled it */
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void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt)
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{
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struct ipa *ipa = interrupt->ipa;
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const struct ipa_reg *reg;
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u32 val;
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reg = ipa_reg(ipa, IRQ_SUSPEND_INFO);
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val = ioread32(ipa->reg_virt + ipa_reg_offset(reg));
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/* SUSPEND interrupt status isn't cleared on IPA version 3.0 */
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if (ipa->version == IPA_VERSION_3_0)
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return;
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reg = ipa_reg(ipa, IRQ_SUSPEND_CLR);
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iowrite32(val, ipa->reg_virt + ipa_reg_offset(reg));
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}
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/* Simulate arrival of an IPA TX_SUSPEND interrupt */
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void ipa_interrupt_simulate_suspend(struct ipa_interrupt *interrupt)
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{
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ipa_interrupt_process(interrupt, IPA_IRQ_TX_SUSPEND);
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}
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/* Add a handler for an IPA interrupt */
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void ipa_interrupt_add(struct ipa_interrupt *interrupt,
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enum ipa_irq_id ipa_irq, ipa_irq_handler_t handler)
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{
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struct ipa *ipa = interrupt->ipa;
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const struct ipa_reg *reg;
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if (WARN_ON(ipa_irq >= IPA_IRQ_COUNT))
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return;
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interrupt->handler[ipa_irq] = handler;
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/* Update the IPA interrupt mask to enable it */
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interrupt->enabled |= BIT(ipa_irq);
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reg = ipa_reg(ipa, IPA_IRQ_EN);
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iowrite32(interrupt->enabled, ipa->reg_virt + ipa_reg_offset(reg));
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}
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/* Remove the handler for an IPA interrupt type */
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void
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ipa_interrupt_remove(struct ipa_interrupt *interrupt, enum ipa_irq_id ipa_irq)
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{
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struct ipa *ipa = interrupt->ipa;
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const struct ipa_reg *reg;
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if (WARN_ON(ipa_irq >= IPA_IRQ_COUNT))
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return;
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/* Update the IPA interrupt mask to disable it */
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interrupt->enabled &= ~BIT(ipa_irq);
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reg = ipa_reg(ipa, IPA_IRQ_EN);
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iowrite32(interrupt->enabled, ipa->reg_virt + ipa_reg_offset(reg));
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interrupt->handler[ipa_irq] = NULL;
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}
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/* Configure the IPA interrupt framework */
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struct ipa_interrupt *ipa_interrupt_config(struct ipa *ipa)
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{
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struct device *dev = &ipa->pdev->dev;
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struct ipa_interrupt *interrupt;
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const struct ipa_reg *reg;
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unsigned int irq;
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int ret;
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ret = platform_get_irq_byname(ipa->pdev, "ipa");
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if (ret <= 0) {
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dev_err(dev, "DT error %d getting \"ipa\" IRQ property\n",
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ret);
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return ERR_PTR(ret ? : -EINVAL);
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}
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irq = ret;
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interrupt = kzalloc(sizeof(*interrupt), GFP_KERNEL);
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if (!interrupt)
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return ERR_PTR(-ENOMEM);
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interrupt->ipa = ipa;
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interrupt->irq = irq;
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/* Start with all IPA interrupts disabled */
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reg = ipa_reg(ipa, IPA_IRQ_EN);
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iowrite32(0, ipa->reg_virt + ipa_reg_offset(reg));
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ret = request_threaded_irq(irq, NULL, ipa_isr_thread, IRQF_ONESHOT,
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"ipa", interrupt);
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if (ret) {
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dev_err(dev, "error %d requesting \"ipa\" IRQ\n", ret);
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goto err_kfree;
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}
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ret = enable_irq_wake(irq);
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if (ret) {
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dev_err(dev, "error %d enabling wakeup for \"ipa\" IRQ\n", ret);
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goto err_free_irq;
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}
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return interrupt;
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err_free_irq:
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free_irq(interrupt->irq, interrupt);
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err_kfree:
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kfree(interrupt);
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return ERR_PTR(ret);
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}
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/* Inverse of ipa_interrupt_config() */
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void ipa_interrupt_deconfig(struct ipa_interrupt *interrupt)
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{
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struct device *dev = &interrupt->ipa->pdev->dev;
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int ret;
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ret = disable_irq_wake(interrupt->irq);
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if (ret)
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dev_err(dev, "error %d disabling \"ipa\" IRQ wakeup\n", ret);
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free_irq(interrupt->irq, interrupt);
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kfree(interrupt);
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}
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