273 lines
6.1 KiB
C
273 lines
6.1 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* OMAP7xx specific gpio init
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*
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* Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
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*
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* Author:
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* Charulatha V <charu@ti.com>
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*/
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#include <linux/gpio.h>
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#include <linux/platform_data/gpio-omap.h>
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#include "irqs.h"
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#include "soc.h"
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#define OMAP7XX_GPIO1_BASE 0xfffbc000
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#define OMAP7XX_GPIO2_BASE 0xfffbc800
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#define OMAP7XX_GPIO3_BASE 0xfffbd000
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#define OMAP7XX_GPIO4_BASE 0xfffbd800
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#define OMAP7XX_GPIO5_BASE 0xfffbe000
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#define OMAP7XX_GPIO6_BASE 0xfffbe800
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#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
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/* mpu gpio */
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static struct resource omap7xx_mpu_gpio_resources[] = {
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{
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.start = OMAP1_MPUIO_VBASE,
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.end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_7XX_MPUIO,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
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.revision = USHRT_MAX,
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.direction = OMAP_MPUIO_IO_CNTL / 2,
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.datain = OMAP_MPUIO_INPUT_LATCH / 2,
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.dataout = OMAP_MPUIO_OUTPUT / 2,
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.irqstatus = OMAP_MPUIO_GPIO_INT / 2,
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.irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
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.irqenable_inv = true,
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.irqctrl = OMAP_MPUIO_GPIO_INT_EDGE >> 1,
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};
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static struct omap_gpio_platform_data omap7xx_mpu_gpio_config = {
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.is_mpuio = true,
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.bank_width = 16,
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.bank_stride = 2,
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.regs = &omap7xx_mpuio_regs,
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};
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static struct platform_device omap7xx_mpu_gpio = {
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.name = "omap_gpio",
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.id = 0,
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.dev = {
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.platform_data = &omap7xx_mpu_gpio_config,
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},
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.num_resources = ARRAY_SIZE(omap7xx_mpu_gpio_resources),
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.resource = omap7xx_mpu_gpio_resources,
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};
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/* gpio1 */
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static struct resource omap7xx_gpio1_resources[] = {
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{
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.start = OMAP7XX_GPIO1_BASE,
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.end = OMAP7XX_GPIO1_BASE + SZ_2K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_7XX_GPIO_BANK1,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
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.revision = USHRT_MAX,
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.direction = OMAP7XX_GPIO_DIR_CONTROL,
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.datain = OMAP7XX_GPIO_DATA_INPUT,
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.dataout = OMAP7XX_GPIO_DATA_OUTPUT,
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.irqstatus = OMAP7XX_GPIO_INT_STATUS,
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.irqenable = OMAP7XX_GPIO_INT_MASK,
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.irqenable_inv = true,
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.irqctrl = OMAP7XX_GPIO_INT_CONTROL,
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};
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static struct omap_gpio_platform_data omap7xx_gpio1_config = {
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.bank_width = 32,
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.regs = &omap7xx_gpio_regs,
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};
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static struct platform_device omap7xx_gpio1 = {
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.name = "omap_gpio",
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.id = 1,
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.dev = {
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.platform_data = &omap7xx_gpio1_config,
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},
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.num_resources = ARRAY_SIZE(omap7xx_gpio1_resources),
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.resource = omap7xx_gpio1_resources,
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};
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/* gpio2 */
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static struct resource omap7xx_gpio2_resources[] = {
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{
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.start = OMAP7XX_GPIO2_BASE,
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.end = OMAP7XX_GPIO2_BASE + SZ_2K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_7XX_GPIO_BANK2,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct omap_gpio_platform_data omap7xx_gpio2_config = {
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.bank_width = 32,
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.regs = &omap7xx_gpio_regs,
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};
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static struct platform_device omap7xx_gpio2 = {
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.name = "omap_gpio",
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.id = 2,
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.dev = {
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.platform_data = &omap7xx_gpio2_config,
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},
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.num_resources = ARRAY_SIZE(omap7xx_gpio2_resources),
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.resource = omap7xx_gpio2_resources,
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};
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/* gpio3 */
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static struct resource omap7xx_gpio3_resources[] = {
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{
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.start = OMAP7XX_GPIO3_BASE,
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.end = OMAP7XX_GPIO3_BASE + SZ_2K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_7XX_GPIO_BANK3,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct omap_gpio_platform_data omap7xx_gpio3_config = {
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.bank_width = 32,
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.regs = &omap7xx_gpio_regs,
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};
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static struct platform_device omap7xx_gpio3 = {
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.name = "omap_gpio",
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.id = 3,
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.dev = {
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.platform_data = &omap7xx_gpio3_config,
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},
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.num_resources = ARRAY_SIZE(omap7xx_gpio3_resources),
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.resource = omap7xx_gpio3_resources,
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};
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/* gpio4 */
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static struct resource omap7xx_gpio4_resources[] = {
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{
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.start = OMAP7XX_GPIO4_BASE,
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.end = OMAP7XX_GPIO4_BASE + SZ_2K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_7XX_GPIO_BANK4,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct omap_gpio_platform_data omap7xx_gpio4_config = {
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.bank_width = 32,
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.regs = &omap7xx_gpio_regs,
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};
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static struct platform_device omap7xx_gpio4 = {
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.name = "omap_gpio",
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.id = 4,
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.dev = {
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.platform_data = &omap7xx_gpio4_config,
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},
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.num_resources = ARRAY_SIZE(omap7xx_gpio4_resources),
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.resource = omap7xx_gpio4_resources,
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};
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/* gpio5 */
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static struct resource omap7xx_gpio5_resources[] = {
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{
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.start = OMAP7XX_GPIO5_BASE,
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.end = OMAP7XX_GPIO5_BASE + SZ_2K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_7XX_GPIO_BANK5,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct omap_gpio_platform_data omap7xx_gpio5_config = {
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.bank_width = 32,
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.regs = &omap7xx_gpio_regs,
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};
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static struct platform_device omap7xx_gpio5 = {
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.name = "omap_gpio",
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.id = 5,
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.dev = {
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.platform_data = &omap7xx_gpio5_config,
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},
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.num_resources = ARRAY_SIZE(omap7xx_gpio5_resources),
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.resource = omap7xx_gpio5_resources,
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};
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/* gpio6 */
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static struct resource omap7xx_gpio6_resources[] = {
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{
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.start = OMAP7XX_GPIO6_BASE,
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.end = OMAP7XX_GPIO6_BASE + SZ_2K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_7XX_GPIO_BANK6,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct omap_gpio_platform_data omap7xx_gpio6_config = {
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.bank_width = 32,
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.regs = &omap7xx_gpio_regs,
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};
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static struct platform_device omap7xx_gpio6 = {
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.name = "omap_gpio",
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.id = 6,
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.dev = {
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.platform_data = &omap7xx_gpio6_config,
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},
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.num_resources = ARRAY_SIZE(omap7xx_gpio6_resources),
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.resource = omap7xx_gpio6_resources,
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};
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static struct platform_device *omap7xx_gpio_dev[] __initdata = {
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&omap7xx_mpu_gpio,
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&omap7xx_gpio1,
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&omap7xx_gpio2,
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&omap7xx_gpio3,
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&omap7xx_gpio4,
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&omap7xx_gpio5,
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&omap7xx_gpio6,
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};
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/*
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* omap7xx_gpio_init needs to be done before
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* machine_init functions access gpio APIs.
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* Hence omap7xx_gpio_init is a postcore_initcall.
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*/
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static int __init omap7xx_gpio_init(void)
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{
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int i;
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if (!cpu_is_omap7xx())
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return -EINVAL;
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for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++)
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platform_device_register(omap7xx_gpio_dev[i]);
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return 0;
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}
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postcore_initcall(omap7xx_gpio_init);
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